LLVM  13.0.0git
CSKYMCCodeEmitter.cpp
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1 //===-- CSKYMCCodeEmitter.cpp - CSKY Code Emitter interface ---------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the CSKYMCCodeEmitter class.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "CSKYMCCodeEmitter.h"
15 #include "llvm/ADT/Statistic.h"
16 #include "llvm/MC/MCInstBuilder.h"
17 #include "llvm/MC/MCInstrInfo.h"
19 
20 using namespace llvm;
21 
22 #define DEBUG_TYPE "csky-mccode-emitter"
23 
24 STATISTIC(MCNumEmitted, "Number of MC instructions emitted");
25 
26 unsigned CSKYMCCodeEmitter::getOImmOpValue(const MCInst &MI, unsigned Idx,
28  const MCSubtargetInfo &STI) const {
29  const MCOperand &MO = MI.getOperand(Idx);
30  assert(MO.isImm() && "Unexpected MO type.");
31  return MO.getImm() - 1;
32 }
33 
36  const MCSubtargetInfo &STI) const {
37  const MCInstrDesc &Desc = MII.get(MI.getOpcode());
38  unsigned Size = Desc.getSize();
40 
41  uint16_t LO16 = static_cast<uint16_t>(Bin);
42  uint16_t HI16 = static_cast<uint16_t>(Bin >> 16);
43 
44  if (Size == 4)
45  support::endian::write<uint16_t>(OS, HI16, support::little);
46 
47  support::endian::write<uint16_t>(OS, LO16, support::little);
48  ++MCNumEmitted; // Keep track of the # of mi's emitted.
49 }
50 
51 unsigned
54  const MCSubtargetInfo &STI) const {
55  if (MO.isReg())
56  return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
57 
58  if (MO.isImm())
59  return static_cast<unsigned>(MO.getImm());
60 
61  llvm_unreachable("Unhandled expression!");
62  return 0;
63 }
64 
66  const CSKYMCExpr *CSKYExpr = cast<CSKYMCExpr>(Expr);
67 
68  switch (CSKYExpr->getKind()) {
69  default:
70  llvm_unreachable("Unhandled fixup kind!");
73  }
74 }
75 
77  const MCRegisterInfo &MRI,
78  MCContext &Ctx) {
79  return new CSKYMCCodeEmitter(Ctx, MCII);
80 }
81 
82 #include "CSKYGenMCCodeEmitter.inc"
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:100
llvm
Definition: AllocatorList.h:23
llvm::MCOperand::isReg
bool isReg() const
Definition: MCInst.h:60
llvm::MCContext
Context object for machine code objects.
Definition: MCContext.h:71
llvm::MCContext::getRegisterInfo
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:421
Statistic.h
llvm::createCSKYMCCodeEmitter
MCCodeEmitter * createCSKYMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Definition: CSKYMCCodeEmitter.cpp:76
MCInstBuilder.h
llvm::MCRegisterInfo::getEncodingValue
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
Definition: MCRegisterInfo.h:553
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:183
llvm::MCInstrDesc::getSize
unsigned getSize() const
Return the number of bytes in the encoding of this instruction, or zero if the encoding size cannot b...
Definition: MCInstrDesc.h:616
llvm::CSKYMCCodeEmitter::getBinaryCodeForInstr
uint64_t getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
llvm::support::little
@ little
Definition: Endian.h:27
llvm::CSKYMCExpr::VK_CSKY_ADDR
@ VK_CSKY_ADDR
Definition: CSKYMCExpr.h:21
MCInstrInfo.h
llvm::MCOperand::getImm
int64_t getImm() const
Definition: MCInst.h:79
llvm::CSKYMCExpr::getKind
VariantKind getKind() const
Definition: CSKYMCExpr.h:44
llvm::MCInstrDesc
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:195
llvm::AArch64::Fixups
Fixups
Definition: AArch64FixupKinds.h:17
llvm::STATISTIC
STATISTIC(NumFunctions, "Total number of functions")
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:50
llvm::CSKYMCCodeEmitter::getOImmOpValue
unsigned getOImmOpValue(const MCInst &MI, unsigned Idx, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:26
CSKYMCCodeEmitter.h
llvm::CSKYMCCodeEmitter::getTargetFixup
MCFixupKind getTargetFixup(const MCExpr *Expr) const
Definition: CSKYMCCodeEmitter.cpp:65
llvm::MCOperand::isImm
bool isImm() const
Definition: MCInst.h:61
llvm::CSKYMCExpr
Definition: CSKYMCExpr.h:17
llvm::CSKYMCCodeEmitter::encodeInstruction
void encodeInstruction(const MCInst &Inst, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
Definition: CSKYMCCodeEmitter.cpp:34
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::CSKYMCCodeEmitter
Definition: CSKYMCCodeEmitter.h:23
CSKYMCTargetDesc.h
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
uint32_t
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::MCInstrInfo
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:25
EndianStream.h
uint16_t
llvm::MCCodeEmitter
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
llvm::MCFixupKind
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::MCOperand
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:35
llvm::CSKY::fixup_csky_addr32
@ fixup_csky_addr32
Definition: CSKYFixupKinds.h:17
llvm::MCInstrInfo::get
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode.
Definition: MCInstrInfo.h:62
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::CSKYMCCodeEmitter::getMachineOpValue
unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Definition: CSKYMCCodeEmitter.cpp:52
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
llvm::MCOperand::getReg
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:68