LLVM 19.0.0git
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HexagonMCInstrInfo.h File Reference
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/MC/MCInst.h"
#include "llvm/Support/MathExtras.h"
#include <cstddef>
#include <cstdint>

Go to the source code of this file.


class  llvm::DuplexCandidate
class  llvm::Hexagon::PacketIterator
class  llvm::HexagonMCInstrInfo::PredicateInfo


namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.
namespace  llvm::Hexagon
namespace  llvm::HexagonMCInstrInfo


void llvm::HexagonMCInstrInfo::addConstant (MCInst &MI, uint64_t Value, MCContext &Context)
void llvm::HexagonMCInstrInfo::addConstExtender (MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI)
iterator_range< Hexagon::PacketIteratorllvm::HexagonMCInstrInfo::bundleInstructions (MCInstrInfo const &MCII, MCInst const &MCI)
iterator_range< MCInst::const_iteratorllvm::HexagonMCInstrInfo::bundleInstructions (MCInst const &MCI)
size_t llvm::HexagonMCInstrInfo::bundleSize (MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::canonicalizePacket (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCB, HexagonMCChecker *Checker, bool AttemptCompatibility=false)
bool llvm::HexagonMCInstrInfo::IsABranchingInst (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &I)
MCInstllvm::HexagonMCInstrInfo::deriveDuplex (MCContext &Context, unsigned iClass, MCInst const &inst0, MCInst const &inst1)
MCInst llvm::HexagonMCInstrInfo::deriveExtender (MCInstrInfo const &MCII, MCInst const &Inst, MCOperand const &MO)
MCInst llvm::HexagonMCInstrInfo::deriveSubInst (MCInst const &Inst)
MCInst constllvm::HexagonMCInstrInfo::extenderForIndex (MCInst const &MCB, size_t Index)
void llvm::HexagonMCInstrInfo::extendIfNeeded (MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI)
unsigned llvm::HexagonMCInstrInfo::getMemAccessSize (MCInstrInfo const &MCII, MCInst const &MCI)
unsigned llvm::HexagonMCInstrInfo::getAddrMode (MCInstrInfo const &MCII, MCInst const &MCI)
MCInstrDesc constllvm::HexagonMCInstrInfo::getDesc (MCInstrInfo const &MCII, MCInst const &MCI)
unsigned llvm::HexagonMCInstrInfo::getDuplexCandidateGroup (MCInst const &MI)
SmallVector< DuplexCandidate, 8 > llvm::HexagonMCInstrInfo::getDuplexPossibilties (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCB)
unsigned llvm::HexagonMCInstrInfo::getDuplexRegisterNumbering (unsigned Reg)
MCExpr constllvm::HexagonMCInstrInfo::getExpr (MCExpr const &Expr)
unsigned short llvm::HexagonMCInstrInfo::getExtendableOp (MCInstrInfo const &MCII, MCInst const &MCI)
MCOperand constllvm::HexagonMCInstrInfo::getExtendableOperand (MCInstrInfo const &MCII, MCInst const &MCI)
unsigned llvm::HexagonMCInstrInfo::getExtentAlignment (MCInstrInfo const &MCII, MCInst const &MCI)
unsigned llvm::HexagonMCInstrInfo::getExtentBits (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isExtentSigned (MCInstrInfo const &MCII, MCInst const &MCI)
int llvm::HexagonMCInstrInfo::getMaxValue (MCInstrInfo const &MCII, MCInst const &MCI)
 Return the maximum value of an extendable operand.
int llvm::HexagonMCInstrInfo::getMinValue (MCInstrInfo const &MCII, MCInst const &MCI)
 Return the minimum value of an extendable operand.
StringRef llvm::HexagonMCInstrInfo::getName (MCInstrInfo const &MCII, MCInst const &MCI)
unsigned short llvm::HexagonMCInstrInfo::getNewValueOp (MCInstrInfo const &MCII, MCInst const &MCI)
MCOperand constllvm::HexagonMCInstrInfo::getNewValueOperand (MCInstrInfo const &MCII, MCInst const &MCI)
unsigned short llvm::HexagonMCInstrInfo::getNewValueOp2 (MCInstrInfo const &MCII, MCInst const &MCI)
 Return the new value or the newly produced value.
MCOperand constllvm::HexagonMCInstrInfo::getNewValueOperand2 (MCInstrInfo const &MCII, MCInst const &MCI)
unsigned llvm::HexagonMCInstrInfo::getType (MCInstrInfo const &MCII, MCInst const &MCI)
 Return the Hexagon ISA class for the insn.
unsigned llvm::HexagonMCInstrInfo::getCVIResources (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)
 Return the resources used by this instruction.
unsigned llvm::HexagonMCInstrInfo::getUnits (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)
 Return the slots used by the insn.
unsigned llvm::HexagonMCInstrInfo::getOtherReservedSlots (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)
 Return the slots this instruction consumes in addition to the slot(s) it can execute out of.
bool llvm::HexagonMCInstrInfo::hasDuplex (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::hasExtenderForIndex (MCInst const &MCB, size_t Index)
bool llvm::HexagonMCInstrInfo::hasImmExt (MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::hasNewValue (MCInstrInfo const &MCII, MCInst const &MCI)
 Return whether the insn produces a value.
bool llvm::HexagonMCInstrInfo::hasNewValue2 (MCInstrInfo const &MCII, MCInst const &MCI)
 Return whether the insn produces a second value.
bool llvm::HexagonMCInstrInfo::hasTmpDst (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::hasHvxTmp (MCInstrInfo const &MCII, MCInst const &MCI)
unsigned llvm::HexagonMCInstrInfo::iClassOfDuplexPair (unsigned Ga, unsigned Gb)
int64_t llvm::HexagonMCInstrInfo::minConstant (MCInst const &MCI, size_t Index)
template<unsigned N, unsigned S>
bool llvm::HexagonMCInstrInfo::inRange (MCInst const &MCI, size_t Index)
template<unsigned N, unsigned S>
bool llvm::HexagonMCInstrInfo::inSRange (MCInst const &MCI, size_t Index)
template<unsigned N>
bool llvm::HexagonMCInstrInfo::inRange (MCInst const &MCI, size_t Index)
MCInst constllvm::HexagonMCInstrInfo::instruction (MCInst const &MCB, size_t Index)
bool llvm::HexagonMCInstrInfo::isAccumulator (MCInstrInfo const &MCII, MCInst const &MCI)
 Return where the instruction is an accumulator.
bool llvm::HexagonMCInstrInfo::isBundle (MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isCanon (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isCofMax1 (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isCofRelax1 (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isCofRelax2 (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isCompound (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isConstExtended (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isCVINew (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isDblRegForSubInst (unsigned Reg)
bool llvm::HexagonMCInstrInfo::isDuplex (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isDuplexPair (MCInst const &MIa, MCInst const &MIb)
 Symmetrical. See if these two instructions are fit for duplex pair.
bool llvm::HexagonMCInstrInfo::isDuplexPairMatch (unsigned Ga, unsigned Gb)
bool llvm::HexagonMCInstrInfo::isExtendable (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isExtended (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isFloat (MCInstrInfo const &MCII, MCInst const &MCI)
 Return whether it is a floating-point insn.
bool llvm::HexagonMCInstrInfo::isHVX (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isImmext (MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isInnerLoop (MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isIntReg (unsigned Reg)
bool llvm::HexagonMCInstrInfo::isIntRegForSubInst (unsigned Reg)
bool llvm::HexagonMCInstrInfo::isMemReorderDisabled (MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isNewValue (MCInstrInfo const &MCII, MCInst const &MCI)
 Return whether the insn expects newly produced value.
bool llvm::HexagonMCInstrInfo::isNewValueStore (MCInstrInfo const &MCII, MCInst const &MCI)
 Return true if the operand is a new-value store insn.
bool llvm::HexagonMCInstrInfo::isOpExtendable (MCInstrInfo const &MCII, MCInst const &MCI, unsigned short)
 Return whether the operand is extendable.
bool llvm::HexagonMCInstrInfo::isOrderedDuplexPair (MCInstrInfo const &MCII, MCInst const &MIa, bool ExtendedA, MCInst const &MIb, bool ExtendedB, bool bisReversable, MCSubtargetInfo const &STI)
 non-Symmetrical. See if these two instructions are fit for duplex pair.
bool llvm::HexagonMCInstrInfo::isOuterLoop (MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isPredicated (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isPredicateLate (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isPredicatedNew (MCInstrInfo const &MCII, MCInst const &MCI)
 Return whether the insn is newly predicated.
bool llvm::HexagonMCInstrInfo::isPredicatedTrue (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isPredReg (MCRegisterInfo const &MRI, unsigned Reg)
bool llvm::HexagonMCInstrInfo::isPredRegister (MCInstrInfo const &MCII, MCInst const &Inst, unsigned I)
bool llvm::HexagonMCInstrInfo::isPrefix (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isSolo (MCInstrInfo const &MCII, MCInst const &MCI)
 Return whether the insn is solo, i.e., cannot be in a packet.
bool llvm::HexagonMCInstrInfo::isSoloAX (MCInstrInfo const &MCII, MCInst const &MCI)
 Return whether the insn can be packaged only with A and X-type insns.
bool llvm::HexagonMCInstrInfo::isRestrictSlot1AOK (MCInstrInfo const &MCII, MCInst const &MCI)
 Return whether the insn can be packaged only with an A-type insn in slot #1.
bool llvm::HexagonMCInstrInfo::isRestrictNoSlot1Store (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isSubInstruction (MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::isVector (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::mustExtend (MCExpr const &Expr)
bool llvm::HexagonMCInstrInfo::mustNotExtend (MCExpr const &Expr)
bool llvm::HexagonMCInstrInfo::requiresSlot (MCSubtargetInfo const &STI, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::LoopNeedsPadding (MCInst const &MCB)
unsigned llvm::HexagonMCInstrInfo::packetSize (StringRef CPU)
unsigned llvm::HexagonMCInstrInfo::packetSizeSlots (MCSubtargetInfo const &STI)
unsigned llvm::HexagonMCInstrInfo::slotsConsumed (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)
void llvm::HexagonMCInstrInfo::padEndloop (MCInst &MCI, MCContext &Context)
PredicateInfo llvm::HexagonMCInstrInfo::predicateInfo (MCInstrInfo const &MCII, MCInst const &MCI)
bool llvm::HexagonMCInstrInfo::prefersSlot3 (MCInstrInfo const &MCII, MCInst const &MCI)
void llvm::HexagonMCInstrInfo::replaceDuplex (MCContext &Context, MCInst &MCI, DuplexCandidate Candidate)
bool llvm::HexagonMCInstrInfo::s27_2_reloc (MCExpr const &Expr)
void llvm::HexagonMCInstrInfo::setInnerLoop (MCInst &MCI)
void llvm::HexagonMCInstrInfo::setMemReorderDisabled (MCInst &MCI)
void llvm::HexagonMCInstrInfo::setMustExtend (MCExpr const &Expr, bool Val=true)
void llvm::HexagonMCInstrInfo::setMustNotExtend (MCExpr const &Expr, bool Val=true)
void llvm::HexagonMCInstrInfo::setS27_2_reloc (MCExpr const &Expr, bool Val=true)
void llvm::HexagonMCInstrInfo::setOuterLoop (MCInst &MCI)
bool llvm::HexagonMCInstrInfo::subInstWouldBeExtended (MCInst const &potentialDuplex)
unsigned llvm::HexagonMCInstrInfo::SubregisterBit (unsigned Consumer, unsigned Producer, unsigned Producer2)
bool llvm::HexagonMCInstrInfo::IsVecRegSingle (unsigned VecReg)
bool llvm::HexagonMCInstrInfo::IsVecRegPair (unsigned VecReg)
bool llvm::HexagonMCInstrInfo::IsReverseVecRegPair (unsigned VecReg)
bool llvm::HexagonMCInstrInfo::IsSingleConsumerRefPairProducer (unsigned Producer, unsigned Consumer)
std::pair< unsigned, unsignedllvm::HexagonMCInstrInfo::GetVecRegPairIndices (unsigned VecRegPair)
 Returns an ordered pair of the constituent register ordinals for each of the elements of VecRegPair.
void llvm::HexagonMCInstrInfo::tryCompound (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCI)
 tryCompound - Given a bundle check for compound insns when one is found update the contents fo the bundle with the compound insn.


constexpr size_t llvm::HexagonMCInstrInfo::innerLoopOffset = 0
constexpr int64_t llvm::HexagonMCInstrInfo::innerLoopMask = 1 << innerLoopOffset
constexpr size_t llvm::HexagonMCInstrInfo::outerLoopOffset = 1
constexpr int64_t llvm::HexagonMCInstrInfo::outerLoopMask = 1 << outerLoopOffset
constexpr size_t llvm::HexagonMCInstrInfo::memReorderDisabledOffset = 2
constexpr int64_t llvm::HexagonMCInstrInfo::memReorderDisabledMask = 1 << memReorderDisabledOffset
constexpr size_t llvm::HexagonMCInstrInfo::splitNoMemOrderOffset = 3
constexpr int64_t llvm::HexagonMCInstrInfo::splitNoMemorderMask = 1 << splitNoMemOrderOffset
constexpr size_t llvm::HexagonMCInstrInfo::noShuffleOffset = 4
constexpr int64_t llvm::HexagonMCInstrInfo::noShuffleMask = 1 << noShuffleOffset
constexpr size_t llvm::HexagonMCInstrInfo::bundleInstructionsOffset = 1