LLVM 18.0.0git
Macros | Functions
LegalizeVectorOps.cpp File Reference
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include <cassert>
#include <cstdint>
#include <iterator>
#include <utility>
#include "llvm/IR/ConstrainedOps.def"
#include "llvm/IR/VPIntrinsics.def"

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "legalizevectorops"
 
#define DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN)    case ISD::STRICT_##DAGN:
 
#define BEGIN_REGISTER_VP_SDNODE(VPID, LEGALPOS, ...)
 
#define DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN)    case ISD::STRICT_##DAGN:
 

Functions

static void createBSWAPShuffleMask (EVT VT, SmallVectorImpl< int > &ShuffleMask)
 

Macro Definition Documentation

◆ BEGIN_REGISTER_VP_SDNODE

#define BEGIN_REGISTER_VP_SDNODE (   VPID,
  LEGALPOS,
  ... 
)
Value:
case ISD::VPID: { \
EVT LegalizeVT = LEGALPOS < 0 ? Node->getValueType(-(1 + LEGALPOS)) \
: Node->getOperand(LEGALPOS).getValueType(); \
if (ISD::VPID == ISD::VP_SETCC) { \
ISD::CondCode CCCode = cast<CondCodeSDNode>(Node->getOperand(2))->get(); \
Action = TLI.getCondCodeAction(CCCode, LegalizeVT.getSimpleVT()); \
if (Action != TargetLowering::Legal) \
break; \
} \
Action = TLI.getOperationAction(Node->getOpcode(), LegalizeVT); \
} break;
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out,...
Definition: ISDOpcodes.h:1506
Extended Value Type.
Definition: ValueTypes.h:34
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition: ValueTypes.h:299

◆ DAG_INSTRUCTION [1/2]

#define DAG_INSTRUCTION (   NAME,
  NARG,
  ROUND_MODE,
  INTRINSIC,
  DAGN 
)     case ISD::STRICT_##DAGN:

◆ DAG_INSTRUCTION [2/2]

#define DAG_INSTRUCTION (   NAME,
  NARG,
  ROUND_MODE,
  INTRINSIC,
  DAGN 
)     case ISD::STRICT_##DAGN:

◆ DEBUG_TYPE

#define DEBUG_TYPE   "legalizevectorops"

Definition at line 49 of file LegalizeVectorOps.cpp.

Function Documentation

◆ createBSWAPShuffleMask()

static void createBSWAPShuffleMask ( EVT  VT,
SmallVectorImpl< int > &  ShuffleMask 
)
static