LLVM  13.0.0git
MipsOptionRecord.cpp
Go to the documentation of this file.
1 //===- MipsOptionRecord.cpp - Abstraction for storing information ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "MipsOptionRecord.h"
10 #include "MipsABIInfo.h"
11 #include "MipsELFStreamer.h"
12 #include "MipsTargetStreamer.h"
13 #include "llvm/BinaryFormat/ELF.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCContext.h"
16 #include "llvm/MC/MCRegisterInfo.h"
17 #include "llvm/MC/MCSectionELF.h"
18 #include <cassert>
19 
20 using namespace llvm;
21 
23  MCAssembler &MCA = Streamer->getAssembler();
24  MipsTargetStreamer *MTS =
25  static_cast<MipsTargetStreamer *>(Streamer->getTargetStreamer());
26 
27  Streamer->PushSection();
28 
29  // We need to distinguish between N64 and the rest because at the moment
30  // we don't emit .Mips.options for other ELFs other than N64.
31  // Since .reginfo has the same information as .Mips.options (ODK_REGINFO),
32  // we can use the same abstraction (MipsRegInfoRecord class) to handle both.
33  if (MTS->getABI().IsN64()) {
34  // The EntrySize value of 1 seems strange since the records are neither
35  // 1-byte long nor fixed length but it matches the value GAS emits.
36  MCSectionELF *Sec =
37  Context.getELFSection(".MIPS.options", ELF::SHT_MIPS_OPTIONS,
39  MCA.registerSection(*Sec);
40  Sec->setAlignment(Align(8));
41  Streamer->SwitchSection(Sec);
42 
43  Streamer->emitInt8(ELF::ODK_REGINFO); // kind
44  Streamer->emitInt8(40); // size
45  Streamer->emitInt16(0); // section
46  Streamer->emitInt32(0); // info
47  Streamer->emitInt32(ri_gprmask);
48  Streamer->emitInt32(0); // pad
49  Streamer->emitInt32(ri_cprmask[0]);
50  Streamer->emitInt32(ri_cprmask[1]);
51  Streamer->emitInt32(ri_cprmask[2]);
52  Streamer->emitInt32(ri_cprmask[3]);
53  Streamer->emitIntValue(ri_gp_value, 8);
54  } else {
55  MCSectionELF *Sec = Context.getELFSection(".reginfo", ELF::SHT_MIPS_REGINFO,
56  ELF::SHF_ALLOC, 24);
57  MCA.registerSection(*Sec);
58  Sec->setAlignment(MTS->getABI().IsN32() ? Align(8) : Align(4));
59  Streamer->SwitchSection(Sec);
60 
61  Streamer->emitInt32(ri_gprmask);
62  Streamer->emitInt32(ri_cprmask[0]);
63  Streamer->emitInt32(ri_cprmask[1]);
64  Streamer->emitInt32(ri_cprmask[2]);
65  Streamer->emitInt32(ri_cprmask[3]);
66  assert((ri_gp_value & 0xffffffff) == ri_gp_value);
67  Streamer->emitInt32(ri_gp_value);
68  }
69 
70  Streamer->PopSection();
71 }
72 
74  const MCRegisterInfo *MCRegInfo) {
75  unsigned Value = 0;
76 
77  for (const MCPhysReg &SubReg : MCRegInfo->subregs_inclusive(Reg)) {
78  unsigned EncVal = MCRegInfo->getEncodingValue(SubReg);
79  Value |= 1 << EncVal;
80 
81  if (GPR32RegClass->contains(SubReg) || GPR64RegClass->contains(SubReg))
82  ri_gprmask |= Value;
83  else if (COP0RegClass->contains(SubReg))
84  ri_cprmask[0] |= Value;
85  // MIPS COP1 is the FPU.
86  else if (FGR32RegClass->contains(SubReg) ||
87  FGR64RegClass->contains(SubReg) ||
88  AFGR64RegClass->contains(SubReg) ||
89  MSA128BRegClass->contains(SubReg))
90  ri_cprmask[1] |= Value;
91  else if (COP2RegClass->contains(SubReg))
92  ri_cprmask[2] |= Value;
93  else if (COP3RegClass->contains(SubReg))
94  ri_cprmask[3] |= Value;
95  }
96 }
llvm::MipsABIInfo::IsN64
bool IsN64() const
Definition: MipsABIInfo.h:42
llvm
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
MipsELFStreamer.h
llvm::MipsELFStreamer::emitIntValue
void emitIntValue(uint64_t Value, unsigned Size) override
Special case of EmitValue that avoids the client having to pass in a MCExpr for constant integers.
Definition: MipsELFStreamer.cpp:105
MCSectionELF.h
llvm::MCStreamer::emitInt8
void emitInt8(uint64_t Value)
Definition: MCStreamer.h:700
llvm::MipsELFStreamer::SwitchSection
void SwitchSection(MCSection *Section, const MCExpr *Subsection=nullptr) override
Overriding this function allows us to dismiss all labels that are candidates for marking as microMIPS...
Definition: MipsELFStreamer.cpp:93
llvm::ELF::SHF_ALLOC
@ SHF_ALLOC
Definition: ELF.h:981
MCAssembler.h
llvm::MCRegisterInfo::getEncodingValue
uint16_t getEncodingValue(MCRegister RegNo) const
Returns the encoding for RegNo.
Definition: MCRegisterInfo.h:553
llvm::MCStreamer::emitInt32
void emitInt32(uint64_t Value)
Definition: MCStreamer.h:702
llvm::MCRegisterClass::contains
bool contains(MCRegister Reg) const
contains - Return true if the specified register is included in this register class.
Definition: MCRegisterInfo.h:68
llvm::MCSectionELF
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:28
llvm::ELF::ODK_REGINFO
@ ODK_REGINFO
Definition: ELF.h:580
llvm::MipsRegInfoRecord::SetPhysRegUsed
void SetPhysRegUsed(unsigned Reg, const MCRegisterInfo *MCRegInfo)
Definition: MipsOptionRecord.cpp:73
ELF.h
llvm::MCRegisterInfo::subregs_inclusive
iterator_range< mc_subreg_iterator > subregs_inclusive(MCRegister Reg) const
Return an iterator range over all sub-registers of Reg, including Reg.
Definition: MCRegisterInfo.h:316
MipsTargetStreamer.h
MCContext.h
llvm::ELF::SHT_MIPS_OPTIONS
@ SHT_MIPS_OPTIONS
Definition: ELF.h:962
llvm::MCContext::getELFSection
MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)
Definition: MCContext.h:521
MipsOptionRecord.h
Align
uint64_t Align
Definition: ELFObjHandler.cpp:83
llvm::MCStreamer::emitInt16
void emitInt16(uint64_t Value)
Definition: MCStreamer.h:701
llvm::MCAssembler
Definition: MCAssembler.h:60
MCRegisterInfo.h
llvm::MCStreamer::PopSection
bool PopSection()
Restore the current and previous section from the section stack.
Definition: MCStreamer.h:405
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::MCObjectStreamer::getAssembler
MCAssembler & getAssembler()
Definition: MCObjectStreamer.h:112
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition: MCRegisterInfo.h:135
llvm::ELF::SHT_MIPS_REGINFO
@ SHT_MIPS_REGINFO
Definition: ELF.h:961
llvm::MCSection::setAlignment
void setAlignment(Align Value)
Definition: MCSection.h:132
uint16_t
llvm::MCStreamer::PushSection
void PushSection()
Save the current and previous section on the section stack.
Definition: MCStreamer.h:396
MipsABIInfo.h
llvm::MipsTargetStreamer
Definition: MipsTargetStreamer.h:24
llvm::TargetStackID::Value
Value
Definition: TargetFrameLowering.h:27
llvm::MipsABIInfo::IsN32
bool IsN32() const
Definition: MipsABIInfo.h:41
llvm::MCAssembler::registerSection
bool registerSection(MCSection &Section)
Definition: MCAssembler.cpp:123
llvm::MCStreamer::getTargetStreamer
MCTargetStreamer * getTargetStreamer()
Definition: MCStreamer.h:285
llvm::MipsTargetStreamer::getABI
const MipsABIInfo & getABI() const
Definition: MipsTargetStreamer.h:180
llvm::ELF::SHF_MIPS_NOSTRIP
@ SHF_MIPS_NOSTRIP
Definition: ELF.h:1058
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
SubReg
unsigned SubReg
Definition: AArch64AdvSIMDScalarPass.cpp:104
llvm::MipsRegInfoRecord::EmitMipsOptionRecord
void EmitMipsOptionRecord() override
Definition: MipsOptionRecord.cpp:22