LLVM 19.0.0git
RISCVMCTargetDesc.h
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1//===-- RISCVMCTargetDesc.h - RISC-V Target Descriptions --------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file provides RISC-V specific target descriptions.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H
14#define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVMCTARGETDESC_H
15
16#include "llvm/Config/config.h"
19#include <memory>
20
21namespace llvm {
22class MCAsmBackend;
23class MCCodeEmitter;
24class MCContext;
25class MCInstrInfo;
26class MCObjectTargetWriter;
27class MCRegisterInfo;
28class MCSubtargetInfo;
29class Target;
30
31MCCodeEmitter *createRISCVMCCodeEmitter(const MCInstrInfo &MCII,
32 MCContext &Ctx);
33
34MCAsmBackend *createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI,
35 const MCRegisterInfo &MRI,
36 const MCTargetOptions &Options);
37
38std::unique_ptr<MCObjectTargetWriter> createRISCVELFObjectWriter(uint8_t OSABI,
39 bool Is64Bit);
40
41namespace RISCVVInversePseudosTable {
42
43struct PseudoInfo {
46 uint8_t VLMul;
47 uint8_t SEW;
48};
49
50#define GET_RISCVVInversePseudosTable_DECL
51#include "RISCVGenSearchableTables.inc"
52
53} // namespace RISCVVInversePseudosTable
54} // namespace llvm
55
56// Defines symbolic names for RISC-V registers.
57#define GET_REGINFO_ENUM
58#include "RISCVGenRegisterInfo.inc"
59
60// Defines symbolic names for RISC-V instructions.
61#define GET_INSTRINFO_ENUM
62#define GET_INSTRINFO_MC_HELPER_DECLS
63#include "RISCVGenInstrInfo.inc"
64
65#define GET_SUBTARGETINFO_ENUM
66#include "RISCVGenSubtargetInfo.inc"
67
68#endif
unsigned const MachineRegisterInfo * MRI
static LVOptions Options
Definition: LVOptions.cpp:25
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
std::unique_ptr< MCObjectTargetWriter > createRISCVELFObjectWriter(uint8_t OSABI, bool Is64Bit)
MCCodeEmitter * createRISCVMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
MCAsmBackend * createRISCVAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)