LLVM  14.0.0git
Sparc.h
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1 //===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the entry points for global functions defined in the LLVM
10 // Sparc back-end.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_SPARC_SPARC_H
15 #define LLVM_LIB_TARGET_SPARC_SPARC_H
16 
20 
21 namespace llvm {
22  class FunctionPass;
23  class SparcTargetMachine;
24  class AsmPrinter;
25  class MCInst;
26  class MachineInstr;
27 
28  FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
29  FunctionPass *createSparcDelaySlotFillerPass();
30 
31  void LowerSparcMachineInstrToMCInst(const MachineInstr *MI,
32  MCInst &OutMI,
33  AsmPrinter &AP);
34 } // end namespace llvm;
35 
36 namespace llvm {
37  // Enums corresponding to Sparc condition codes, both icc's and fcc's. These
38  // values must be kept in sync with the ones in the .td file.
39  namespace SPCC {
40  enum CondCodes {
41  ICC_A = 8 , // Always
42  ICC_N = 0 , // Never
43  ICC_NE = 9 , // Not Equal
44  ICC_E = 1 , // Equal
45  ICC_G = 10 , // Greater
46  ICC_LE = 2 , // Less or Equal
47  ICC_GE = 11 , // Greater or Equal
48  ICC_L = 3 , // Less
49  ICC_GU = 12 , // Greater Unsigned
50  ICC_LEU = 4 , // Less or Equal Unsigned
51  ICC_CC = 13 , // Carry Clear/Great or Equal Unsigned
52  ICC_CS = 5 , // Carry Set/Less Unsigned
53  ICC_POS = 14 , // Positive
54  ICC_NEG = 6 , // Negative
55  ICC_VC = 15 , // Overflow Clear
56  ICC_VS = 7 , // Overflow Set
57 
58  FCC_A = 8+16, // Always
59  FCC_N = 0+16, // Never
60  FCC_U = 7+16, // Unordered
61  FCC_G = 6+16, // Greater
62  FCC_UG = 5+16, // Unordered or Greater
63  FCC_L = 4+16, // Less
64  FCC_UL = 3+16, // Unordered or Less
65  FCC_LG = 2+16, // Less or Greater
66  FCC_NE = 1+16, // Not Equal
67  FCC_E = 9+16, // Equal
68  FCC_UE = 10+16, // Unordered or Equal
69  FCC_GE = 11+16, // Greater or Equal
70  FCC_UGE = 12+16, // Unordered or Greater or Equal
71  FCC_LE = 13+16, // Less or Equal
72  FCC_ULE = 14+16, // Unordered or Less or Equal
73  FCC_O = 15+16, // Ordered
74 
75  CPCC_A = 8+32, // Always
76  CPCC_N = 0+32, // Never
77  CPCC_3 = 7+32,
78  CPCC_2 = 6+32,
79  CPCC_23 = 5+32,
80  CPCC_1 = 4+32,
81  CPCC_13 = 3+32,
82  CPCC_12 = 2+32,
83  CPCC_123 = 1+32,
84  CPCC_0 = 9+32,
85  CPCC_03 = 10+32,
86  CPCC_02 = 11+32,
87  CPCC_023 = 12+32,
88  CPCC_01 = 13+32,
89  CPCC_013 = 14+32,
90  CPCC_012 = 15+32
91  };
92  }
93 
94  inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) {
95  switch (CC) {
96  case SPCC::ICC_A: return "a";
97  case SPCC::ICC_N: return "n";
98  case SPCC::ICC_NE: return "ne";
99  case SPCC::ICC_E: return "e";
100  case SPCC::ICC_G: return "g";
101  case SPCC::ICC_LE: return "le";
102  case SPCC::ICC_GE: return "ge";
103  case SPCC::ICC_L: return "l";
104  case SPCC::ICC_GU: return "gu";
105  case SPCC::ICC_LEU: return "leu";
106  case SPCC::ICC_CC: return "cc";
107  case SPCC::ICC_CS: return "cs";
108  case SPCC::ICC_POS: return "pos";
109  case SPCC::ICC_NEG: return "neg";
110  case SPCC::ICC_VC: return "vc";
111  case SPCC::ICC_VS: return "vs";
112  case SPCC::FCC_A: return "a";
113  case SPCC::FCC_N: return "n";
114  case SPCC::FCC_U: return "u";
115  case SPCC::FCC_G: return "g";
116  case SPCC::FCC_UG: return "ug";
117  case SPCC::FCC_L: return "l";
118  case SPCC::FCC_UL: return "ul";
119  case SPCC::FCC_LG: return "lg";
120  case SPCC::FCC_NE: return "ne";
121  case SPCC::FCC_E: return "e";
122  case SPCC::FCC_UE: return "ue";
123  case SPCC::FCC_GE: return "ge";
124  case SPCC::FCC_UGE: return "uge";
125  case SPCC::FCC_LE: return "le";
126  case SPCC::FCC_ULE: return "ule";
127  case SPCC::FCC_O: return "o";
128  case SPCC::CPCC_A: return "a";
129  case SPCC::CPCC_N: return "n";
130  case SPCC::CPCC_3: return "3";
131  case SPCC::CPCC_2: return "2";
132  case SPCC::CPCC_23: return "23";
133  case SPCC::CPCC_1: return "1";
134  case SPCC::CPCC_13: return "13";
135  case SPCC::CPCC_12: return "12";
136  case SPCC::CPCC_123: return "123";
137  case SPCC::CPCC_0: return "0";
138  case SPCC::CPCC_03: return "03";
139  case SPCC::CPCC_02: return "02";
140  case SPCC::CPCC_023: return "023";
141  case SPCC::CPCC_01: return "01";
142  case SPCC::CPCC_013: return "013";
143  case SPCC::CPCC_012: return "012";
144  }
145  llvm_unreachable("Invalid cond code");
146  }
147 
148  inline static unsigned HI22(int64_t imm) {
149  return (unsigned)((imm >> 10) & ((1 << 22)-1));
150  }
151 
152  inline static unsigned LO10(int64_t imm) {
153  return (unsigned)(imm & 0x3FF);
154  }
155 
156  inline static unsigned HIX22(int64_t imm) {
157  return HI22(~imm);
158  }
159 
160  inline static unsigned LOX10(int64_t imm) {
161  return ~LO10(~imm);
162  }
163 
164 } // end namespace llvm
165 #endif
llvm::HI22
static unsigned HI22(int64_t imm)
Definition: Sparc.h:148
llvm::SPCC::ICC_CS
@ ICC_CS
Definition: Sparc.h:52
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:105
llvm
This file implements support for optimizing divisions by a constant.
Definition: AllocatorList.h:23
llvm::SPCC::FCC_N
@ FCC_N
Definition: Sparc.h:59
llvm::SPCC::FCC_G
@ FCC_G
Definition: Sparc.h:61
llvm::SPCC::ICC_VS
@ ICC_VS
Definition: Sparc.h:56
llvm::SPCC::FCC_LE
@ FCC_LE
Definition: Sparc.h:71
llvm::SPCC::ICC_LE
@ ICC_LE
Definition: Sparc.h:46
SparcMCTargetDesc.h
llvm::SPCC::CPCC_1
@ CPCC_1
Definition: Sparc.h:80
llvm::SPCC::FCC_UE
@ FCC_UE
Definition: Sparc.h:68
llvm::SPCC::CPCC_13
@ CPCC_13
Definition: Sparc.h:81
llvm::SPCC::ICC_L
@ ICC_L
Definition: Sparc.h:48
ErrorHandling.h
llvm::SPCC::CPCC_A
@ CPCC_A
Definition: Sparc.h:75
llvm::SPCC::FCC_UG
@ FCC_UG
Definition: Sparc.h:62
llvm::SPCC::FCC_O
@ FCC_O
Definition: Sparc.h:73
llvm::SPCC::ICC_LEU
@ ICC_LEU
Definition: Sparc.h:50
llvm::SPCC::ICC_VC
@ ICC_VC
Definition: Sparc.h:55
llvm::SPCC::CondCodes
CondCodes
Definition: Sparc.h:40
llvm::SPCC::CPCC_0
@ CPCC_0
Definition: Sparc.h:84
llvm::SPCC::CPCC_12
@ CPCC_12
Definition: Sparc.h:82
llvm::SPCC::FCC_ULE
@ FCC_ULE
Definition: Sparc.h:72
llvm::SPCC::CPCC_01
@ CPCC_01
Definition: Sparc.h:88
llvm::SPCC::FCC_LG
@ FCC_LG
Definition: Sparc.h:65
llvm::SPCC::ICC_NEG
@ ICC_NEG
Definition: Sparc.h:54
TargetMachine.h
llvm::SPCC::ICC_CC
@ ICC_CC
Definition: Sparc.h:51
llvm::createSparcISelDag
FunctionPass * createSparcISelDag(SparcTargetMachine &TM)
createSparcISelDag - This pass converts a legalized DAG into a SPARC-specific DAG,...
Definition: SparcISelDAGToDAG.cpp:398
llvm::SPCC::CPCC_03
@ CPCC_03
Definition: Sparc.h:85
llvm::SPCC::FCC_L
@ FCC_L
Definition: Sparc.h:63
llvm::createSparcDelaySlotFillerPass
FunctionPass * createSparcDelaySlotFillerPass()
createSparcDelaySlotFillerPass - Returns a pass that fills in delay slots in Sparc MachineFunctions
Definition: DelaySlotFiller.cpp:98
llvm::SPCC::CPCC_3
@ CPCC_3
Definition: Sparc.h:77
llvm::SPCC::FCC_NE
@ FCC_NE
Definition: Sparc.h:66
llvm::LowerSparcMachineInstrToMCInst
void LowerSparcMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP)
Definition: SparcMCInstLower.cpp:93
llvm::SPCC::CPCC_N
@ CPCC_N
Definition: Sparc.h:76
llvm::HIX22
static unsigned HIX22(int64_t imm)
Definition: Sparc.h:156
llvm::SPCC::ICC_GE
@ ICC_GE
Definition: Sparc.h:47
llvm::SPCC::CPCC_123
@ CPCC_123
Definition: Sparc.h:83
llvm::SPCC::ICC_A
@ ICC_A
Definition: Sparc.h:41
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:134
llvm::SPARCCondCodeToString
static const char * SPARCCondCodeToString(SPCC::CondCodes CC)
Definition: Sparc.h:94
llvm::SPCC::ICC_G
@ ICC_G
Definition: Sparc.h:45
llvm::SPCC::CPCC_23
@ CPCC_23
Definition: Sparc.h:79
llvm::SPCC::FCC_GE
@ FCC_GE
Definition: Sparc.h:69
llvm::SPCC::ICC_N
@ ICC_N
Definition: Sparc.h:42
llvm::SPCC::CPCC_013
@ CPCC_013
Definition: Sparc.h:89
llvm::SPCC::CPCC_02
@ CPCC_02
Definition: Sparc.h:86
llvm::SPCC::FCC_U
@ FCC_U
Definition: Sparc.h:60
llvm::SPCC::CPCC_2
@ CPCC_2
Definition: Sparc.h:78
llvm::SPCC::FCC_E
@ FCC_E
Definition: Sparc.h:67
llvm::SPCC::ICC_NE
@ ICC_NE
Definition: Sparc.h:43
llvm::SPCC::FCC_UL
@ FCC_UL
Definition: Sparc.h:64
llvm::SPCC::ICC_E
@ ICC_E
Definition: Sparc.h:44
llvm::SPCC::ICC_GU
@ ICC_GU
Definition: Sparc.h:49
llvm::SPCC::FCC_A
@ FCC_A
Definition: Sparc.h:58
llvm::SPCC::FCC_UGE
@ FCC_UGE
Definition: Sparc.h:70
llvm::LOX10
static unsigned LOX10(int64_t imm)
Definition: Sparc.h:160
TM
const char LLVMTargetMachineRef TM
Definition: PassBuilderBindings.cpp:47
llvm::SPCC::CPCC_012
@ CPCC_012
Definition: Sparc.h:90
llvm::LO10
static unsigned LO10(int64_t imm)
Definition: Sparc.h:152
llvm::SPCC::ICC_POS
@ ICC_POS
Definition: Sparc.h:53
llvm::SPCC::CPCC_023
@ CPCC_023
Definition: Sparc.h:87