LLVM 18.0.0git
SparcTargetMachine.h
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1//===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the Sparc specific subclass of TargetMachine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
14#define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
15
16#include "SparcInstrInfo.h"
17#include "SparcSubtarget.h"
19#include <optional>
20
21namespace llvm {
22
24 std::unique_ptr<TargetLoweringObjectFile> TLOF;
25 SparcSubtarget Subtarget;
26 bool is64Bit;
28
29public:
30 SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
32 std::optional<Reloc::Model> RM,
33 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
34 bool JIT, bool is64bit);
36
37 const SparcSubtarget *getSubtargetImpl() const { return &Subtarget; }
38 const SparcSubtarget *getSubtargetImpl(const Function &) const override;
39
40 // Pass Pipeline Configuration
43 return TLOF.get();
44 }
45
48 const TargetSubtargetInfo *STI) const override;
49};
50
51/// Sparc 32-bit target machine
52///
54 virtual void anchor();
55
56public:
57 SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
59 std::optional<Reloc::Model> RM,
60 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
61 bool JIT);
62};
63
64/// Sparc 64-bit target machine
65///
67 virtual void anchor();
68
69public:
70 SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
72 std::optional<Reloc::Model> RM,
73 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
74 bool JIT);
75};
76
78 virtual void anchor();
79
80public:
81 SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
83 std::optional<Reloc::Model> RM,
84 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
85 bool JIT);
86};
87
88} // end namespace llvm
89
90#endif
#define F(x, y, z)
Definition: MD5.cpp:55
Basic Register Allocator
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
This class describes a target machine that is implemented with the LLVM target-independent code gener...
TargetLoweringObjectFile * getObjFileLowering() const override
const SparcSubtarget * getSubtargetImpl() const
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
~SparcTargetMachine() override
Sparc 32-bit target machine.
Sparc 64-bit target machine.
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition: StringMap.h:112
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
std::unique_ptr< const MCSubtargetInfo > STI
TargetOptions Options
Target-Independent Code Generator Pass Configuration Options.
TargetSubtargetInfo - Generic base class for all target subtargets.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
CodeGenOptLevel
Code generation optimization level.
Definition: CodeGen.h:54
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...