31constexpr GPUInfo R600GPUs[] = {
64constexpr GPUInfo AMDGCNGPUs[] = {
126 GPUInfo Search = { {
""}, {
""}, AK, AMDGPU::FEATURE_NONE };
130 return A.Kind <
B.Kind;
133 if (
I == Table.
end())
141 if (
const auto *Entry = getArchEntry(AK, AMDGCNGPUs))
142 return Entry->CanonicalName;
147 if (
const auto *Entry = getArchEntry(AK, R600GPUs))
148 return Entry->CanonicalName;
153 for (
const auto &
C : AMDGCNGPUs) {
158 return AMDGPU::GPUKind::GK_NONE;
162 for (
const auto &
C : R600GPUs) {
167 return AMDGPU::GPUKind::GK_NONE;
170unsigned AMDGPU::getArchAttrAMDGCN(
GPUKind AK) {
171 if (
const auto *Entry = getArchEntry(AK, AMDGCNGPUs))
172 return Entry->Features;
177 if (
const auto *Entry = getArchEntry(AK, R600GPUs))
178 return Entry->Features;
184 for (
const auto &
C : AMDGCNGPUs)
189 for (
const auto &
C : R600GPUs)
195 if (AK == AMDGPU::GPUKind::GK_NONE) {
196 if (GPU ==
"generic-hsa")
198 if (GPU ==
"generic")
242 default:
return {0, 0, 0};
264 Features[
"ci-insts"] =
true;
265 Features[
"dot5-insts"] =
true;
266 Features[
"dot7-insts"] =
true;
267 Features[
"dot8-insts"] =
true;
268 Features[
"dot9-insts"] =
true;
269 Features[
"dot10-insts"] =
true;
270 Features[
"dl-insts"] =
true;
271 Features[
"16-bit-insts"] =
true;
272 Features[
"dpp"] =
true;
273 Features[
"gfx8-insts"] =
true;
274 Features[
"gfx9-insts"] =
true;
275 Features[
"gfx10-insts"] =
true;
276 Features[
"gfx10-3-insts"] =
true;
277 Features[
"gfx11-insts"] =
true;
278 Features[
"atomic-fadd-rtn-insts"] =
true;
287 Features[
"ci-insts"] =
true;
288 Features[
"dot1-insts"] =
true;
289 Features[
"dot2-insts"] =
true;
290 Features[
"dot5-insts"] =
true;
291 Features[
"dot6-insts"] =
true;
292 Features[
"dot7-insts"] =
true;
293 Features[
"dot10-insts"] =
true;
294 Features[
"dl-insts"] =
true;
295 Features[
"16-bit-insts"] =
true;
296 Features[
"dpp"] =
true;
297 Features[
"gfx8-insts"] =
true;
298 Features[
"gfx9-insts"] =
true;
299 Features[
"gfx10-insts"] =
true;
300 Features[
"gfx10-3-insts"] =
true;
301 Features[
"s-memrealtime"] =
true;
302 Features[
"s-memtime-inst"] =
true;
306 Features[
"dot1-insts"] =
true;
307 Features[
"dot2-insts"] =
true;
308 Features[
"dot5-insts"] =
true;
309 Features[
"dot6-insts"] =
true;
310 Features[
"dot7-insts"] =
true;
311 Features[
"dot10-insts"] =
true;
315 Features[
"dl-insts"] =
true;
316 Features[
"ci-insts"] =
true;
317 Features[
"16-bit-insts"] =
true;
318 Features[
"dpp"] =
true;
319 Features[
"gfx8-insts"] =
true;
320 Features[
"gfx9-insts"] =
true;
321 Features[
"gfx10-insts"] =
true;
322 Features[
"s-memrealtime"] =
true;
323 Features[
"s-memtime-inst"] =
true;
326 Features[
"gfx940-insts"] =
true;
327 Features[
"fp8-insts"] =
true;
328 Features[
"atomic-ds-pk-add-16-insts"] =
true;
329 Features[
"atomic-flat-pk-add-16-insts"] =
true;
330 Features[
"atomic-global-pk-add-bf16-inst"] =
true;
333 Features[
"gfx90a-insts"] =
true;
334 Features[
"atomic-buffer-global-pk-add-f16-insts"] =
true;
335 Features[
"atomic-fadd-rtn-insts"] =
true;
338 Features[
"dot3-insts"] =
true;
339 Features[
"dot4-insts"] =
true;
340 Features[
"dot5-insts"] =
true;
341 Features[
"dot6-insts"] =
true;
342 Features[
"mai-insts"] =
true;
345 Features[
"dl-insts"] =
true;
346 Features[
"dot1-insts"] =
true;
347 Features[
"dot2-insts"] =
true;
348 Features[
"dot7-insts"] =
true;
349 Features[
"dot10-insts"] =
true;
356 Features[
"gfx9-insts"] =
true;
363 Features[
"gfx8-insts"] =
true;
364 Features[
"16-bit-insts"] =
true;
365 Features[
"dpp"] =
true;
366 Features[
"s-memrealtime"] =
true;
374 Features[
"ci-insts"] =
true;
379 Features[
"s-memtime-inst"] =
true;
417 bool IsWave32Capable =
false;
420 switch (parseArchAMDGCN(GPU)) {
436 IsWave32Capable =
true;
442 return IsWave32Capable;
447 std::string &ErrorMsg) {
449 const bool IsNullGPU = GPU.
empty();
451 const bool HaveWave32 =
452 (IsWave32Capable || IsNullGPU) && Features.
count(
"wavefrontsize32");
453 const bool HaveWave64 = Features.
count(
"wavefrontsize64");
454 if (HaveWave32 && HaveWave64) {
455 ErrorMsg =
"'wavefrontsize32' and 'wavefrontsize64' are mutually exclusive";
461 if (!HaveWave32 && !HaveWave64) {
463 IsWave32Capable ?
"wavefrontsize32" :
"wavefrontsize64";
464 Features.
insert(std::make_pair(DefaultWaveSizeFeature,
true));
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file implements the StringSwitch template, which mimics a switch() statement whose cases are str...
static bool isWave32Capable(StringRef GPU, const Triple &T)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
A wrapper around a string literal that serves as a proxy for constructing global tables of StringRefs...
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
size_type count(StringRef Key) const
count - Return 1 if the element is in the map, 0 otherwise.
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
StringRef - Represent a constant reference to a string, i.e.
constexpr bool empty() const
empty - Check if the string is empty.
Triple - Helper class for working with autoconf configuration names.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
StringRef getArchNameR600(GPUKind AK)
GPUKind
GPU kinds supported by the AMDGPU target.
GPUKind parseArchAMDGCN(StringRef CPU)
@ FEATURE_FAST_DENORMAL_F32
StringRef getArchNameAMDGCN(GPUKind AK)
GPUKind parseArchR600(StringRef CPU)
@ C
The default llvm calling convention, compatible with C.
This is an optimization pass for GlobalISel generic memory operations.
auto lower_bound(R &&Range, T &&Value)
Provide wrappers to std::lower_bound which take ranges instead of having to pass begin/end explicitly...
Instruction set architecture version.