#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/TargetLowering.h"

Go to the source code of this file.

Classes
class	llvm::X86TargetLowering

class	llvm::X86MaskedGatherScatterSDNode

class	llvm::X86MaskedGatherSDNode

class	llvm::X86MaskedScatterSDNode

Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.

namespace	llvm::X86ISD

namespace	llvm::X86
	Define some predicates that are used for node matching.

Enumerations
enum	llvm::X86ISD::NodeType : unsigned { llvm::X86ISD::FIRST_NUMBER = ISD::BUILTIN_OP_END , llvm::X86ISD::BSF , llvm::X86ISD::BSR , llvm::X86ISD::FSHL , llvm::X86ISD::FSHR , llvm::X86ISD::FAND , llvm::X86ISD::FOR , llvm::X86ISD::FXOR , llvm::X86ISD::FANDN , llvm::X86ISD::CALL , llvm::X86ISD::NT_CALL , llvm::X86ISD::CALL_RVMARKER , llvm::X86ISD::CMP , llvm::X86ISD::FCMP , llvm::X86ISD::COMI , llvm::X86ISD::UCOMI , llvm::X86ISD::BT , llvm::X86ISD::SETCC , llvm::X86ISD::SELECTS , llvm::X86ISD::SETCC_CARRY , llvm::X86ISD::FSETCC , llvm::X86ISD::FSETCCM , llvm::X86ISD::FSETCCM_SAE , llvm::X86ISD::CMOV , llvm::X86ISD::BRCOND , llvm::X86ISD::NT_BRIND , llvm::X86ISD::RET_GLUE , llvm::X86ISD::IRET , llvm::X86ISD::REP_STOS , llvm::X86ISD::REP_MOVS , llvm::X86ISD::GlobalBaseReg , llvm::X86ISD::Wrapper , llvm::X86ISD::WrapperRIP , llvm::X86ISD::MOVQ2DQ , llvm::X86ISD::MOVDQ2Q , llvm::X86ISD::MMX_MOVD2W , llvm::X86ISD::MMX_MOVW2D , llvm::X86ISD::PEXTRB , llvm::X86ISD::PEXTRW , llvm::X86ISD::INSERTPS , llvm::X86ISD::PINSRB , llvm::X86ISD::PINSRW , llvm::X86ISD::PSHUFB , llvm::X86ISD::PSADBW , llvm::X86ISD::DBPSADBW , llvm::X86ISD::ANDNP , llvm::X86ISD::BLENDI , llvm::X86ISD::BLENDV , llvm::X86ISD::ADDSUB , llvm::X86ISD::FADD_RND , llvm::X86ISD::FADDS , llvm::X86ISD::FADDS_RND , llvm::X86ISD::FSUB_RND , llvm::X86ISD::FSUBS , llvm::X86ISD::FSUBS_RND , llvm::X86ISD::FMUL_RND , llvm::X86ISD::FMULS , llvm::X86ISD::FMULS_RND , llvm::X86ISD::FDIV_RND , llvm::X86ISD::FDIVS , llvm::X86ISD::FDIVS_RND , llvm::X86ISD::FMAX_SAE , llvm::X86ISD::FMAXS_SAE , llvm::X86ISD::FMIN_SAE , llvm::X86ISD::FMINS_SAE , llvm::X86ISD::FSQRT_RND , llvm::X86ISD::FSQRTS , llvm::X86ISD::FSQRTS_RND , llvm::X86ISD::FGETEXP , llvm::X86ISD::FGETEXP_SAE , llvm::X86ISD::FGETEXPS , llvm::X86ISD::FGETEXPS_SAE , llvm::X86ISD::VGETMANT , llvm::X86ISD::VGETMANT_SAE , llvm::X86ISD::VGETMANTS , llvm::X86ISD::VGETMANTS_SAE , llvm::X86ISD::SCALEF , llvm::X86ISD::SCALEF_RND , llvm::X86ISD::SCALEFS , llvm::X86ISD::SCALEFS_RND , llvm::X86ISD::HADD , llvm::X86ISD::HSUB , llvm::X86ISD::FHADD , llvm::X86ISD::FHSUB , llvm::X86ISD::CONFLICT , llvm::X86ISD::FMAX , llvm::X86ISD::FMIN , llvm::X86ISD::FMAXC , llvm::X86ISD::FMINC , llvm::X86ISD::FMAXS , llvm::X86ISD::FMINS , llvm::X86ISD::FRSQRT , llvm::X86ISD::FRCP , llvm::X86ISD::RSQRT14 , llvm::X86ISD::RSQRT14S , llvm::X86ISD::RCP14 , llvm::X86ISD::RCP14S , llvm::X86ISD::TLSADDR , llvm::X86ISD::TLSBASEADDR , llvm::X86ISD::TLSCALL , llvm::X86ISD::EH_RETURN , llvm::X86ISD::EH_SJLJ_SETJMP , llvm::X86ISD::EH_SJLJ_LONGJMP , llvm::X86ISD::EH_SJLJ_SETUP_DISPATCH , llvm::X86ISD::TC_RETURN , llvm::X86ISD::VZEXT_MOVL , llvm::X86ISD::VTRUNC , llvm::X86ISD::VTRUNCUS , llvm::X86ISD::VTRUNCS , llvm::X86ISD::VMTRUNC , llvm::X86ISD::VMTRUNCUS , llvm::X86ISD::VMTRUNCS , llvm::X86ISD::VFPEXT , llvm::X86ISD::VFPEXT_SAE , llvm::X86ISD::VFPEXTS , llvm::X86ISD::VFPEXTS_SAE , llvm::X86ISD::VFPROUND , llvm::X86ISD::VFPROUND_RND , llvm::X86ISD::VFPROUNDS , llvm::X86ISD::VFPROUNDS_RND , llvm::X86ISD::VMFPROUND , llvm::X86ISD::VSHLDQ , llvm::X86ISD::VSRLDQ , llvm::X86ISD::VSHL , llvm::X86ISD::VSRL , llvm::X86ISD::VSRA , llvm::X86ISD::VSHLV , llvm::X86ISD::VSRLV , llvm::X86ISD::VSRAV , llvm::X86ISD::VSHLI , llvm::X86ISD::VSRLI , llvm::X86ISD::VSRAI , llvm::X86ISD::KSHIFTL , llvm::X86ISD::KSHIFTR , llvm::X86ISD::VROTLI , llvm::X86ISD::VROTRI , llvm::X86ISD::CMPP , llvm::X86ISD::PCMPEQ , llvm::X86ISD::PCMPGT , llvm::X86ISD::PHMINPOS , llvm::X86ISD::MULTISHIFT , llvm::X86ISD::CMPM , llvm::X86ISD::CMPMM , llvm::X86ISD::CMPMM_SAE , llvm::X86ISD::ADD , llvm::X86ISD::SUB , llvm::X86ISD::ADC , llvm::X86ISD::SBB , llvm::X86ISD::SMUL , llvm::X86ISD::UMUL , llvm::X86ISD::OR , llvm::X86ISD::XOR , llvm::X86ISD::AND , llvm::X86ISD::BEXTR , llvm::X86ISD::BEXTRI , llvm::X86ISD::BZHI , llvm::X86ISD::PDEP , llvm::X86ISD::PEXT , llvm::X86ISD::MUL_IMM , llvm::X86ISD::MOVMSK , llvm::X86ISD::PTEST , llvm::X86ISD::TESTP , llvm::X86ISD::KORTEST , llvm::X86ISD::KTEST , llvm::X86ISD::KADD , llvm::X86ISD::PACKSS , llvm::X86ISD::PACKUS , llvm::X86ISD::PALIGNR , llvm::X86ISD::VALIGN , llvm::X86ISD::PSHUFD , llvm::X86ISD::PSHUFHW , llvm::X86ISD::PSHUFLW , llvm::X86ISD::SHUFP , llvm::X86ISD::VSHLD , llvm::X86ISD::VSHRD , llvm::X86ISD::VSHLDV , llvm::X86ISD::VSHRDV , llvm::X86ISD::SHUF128 , llvm::X86ISD::MOVDDUP , llvm::X86ISD::MOVSHDUP , llvm::X86ISD::MOVSLDUP , llvm::X86ISD::MOVLHPS , llvm::X86ISD::MOVHLPS , llvm::X86ISD::MOVSD , llvm::X86ISD::MOVSS , llvm::X86ISD::MOVSH , llvm::X86ISD::UNPCKL , llvm::X86ISD::UNPCKH , llvm::X86ISD::VPERMILPV , llvm::X86ISD::VPERMILPI , llvm::X86ISD::VPERMI , llvm::X86ISD::VPERM2X128 , llvm::X86ISD::VPERMV , llvm::X86ISD::VPERMV3 , llvm::X86ISD::VPTERNLOG , llvm::X86ISD::VFIXUPIMM , llvm::X86ISD::VFIXUPIMM_SAE , llvm::X86ISD::VFIXUPIMMS , llvm::X86ISD::VFIXUPIMMS_SAE , llvm::X86ISD::VRANGE , llvm::X86ISD::VRANGE_SAE , llvm::X86ISD::VRANGES , llvm::X86ISD::VRANGES_SAE , llvm::X86ISD::VREDUCE , llvm::X86ISD::VREDUCE_SAE , llvm::X86ISD::VREDUCES , llvm::X86ISD::VREDUCES_SAE , llvm::X86ISD::VRNDSCALE , llvm::X86ISD::VRNDSCALE_SAE , llvm::X86ISD::VRNDSCALES , llvm::X86ISD::VRNDSCALES_SAE , llvm::X86ISD::VFPCLASS , llvm::X86ISD::VFPCLASSS , llvm::X86ISD::VBROADCAST , llvm::X86ISD::VBROADCASTM , llvm::X86ISD::EXTRQI , llvm::X86ISD::INSERTQI , llvm::X86ISD::VPSHA , llvm::X86ISD::VPSHL , llvm::X86ISD::VPCOM , llvm::X86ISD::VPCOMU , llvm::X86ISD::VPPERM , llvm::X86ISD::VPERMIL2 , llvm::X86ISD::PMULUDQ , llvm::X86ISD::PMULDQ , llvm::X86ISD::MULHRS , llvm::X86ISD::VPMADDUBSW , llvm::X86ISD::VPMADDWD , llvm::X86ISD::VPMADD52L , llvm::X86ISD::VPMADD52H , llvm::X86ISD::VPDPBUSD , llvm::X86ISD::VPDPBUSDS , llvm::X86ISD::VPDPWSSD , llvm::X86ISD::VPDPWSSDS , llvm::X86ISD::FNMADD , llvm::X86ISD::FMSUB , llvm::X86ISD::FNMSUB , llvm::X86ISD::FMADDSUB , llvm::X86ISD::FMSUBADD , llvm::X86ISD::FMADD_RND , llvm::X86ISD::FNMADD_RND , llvm::X86ISD::FMSUB_RND , llvm::X86ISD::FNMSUB_RND , llvm::X86ISD::FMADDSUB_RND , llvm::X86ISD::FMSUBADD_RND , llvm::X86ISD::VFMADDC , llvm::X86ISD::VFMADDC_RND , llvm::X86ISD::VFCMADDC , llvm::X86ISD::VFCMADDC_RND , llvm::X86ISD::VFMULC , llvm::X86ISD::VFMULC_RND , llvm::X86ISD::VFCMULC , llvm::X86ISD::VFCMULC_RND , llvm::X86ISD::VFMADDCSH , llvm::X86ISD::VFMADDCSH_RND , llvm::X86ISD::VFCMADDCSH , llvm::X86ISD::VFCMADDCSH_RND , llvm::X86ISD::VFMULCSH , llvm::X86ISD::VFMULCSH_RND , llvm::X86ISD::VFCMULCSH , llvm::X86ISD::VFCMULCSH_RND , llvm::X86ISD::VPDPBSUD , llvm::X86ISD::VPDPBSUDS , llvm::X86ISD::VPDPBUUD , llvm::X86ISD::VPDPBUUDS , llvm::X86ISD::VPDPBSSD , llvm::X86ISD::VPDPBSSDS , llvm::X86ISD::COMPRESS , llvm::X86ISD::EXPAND , llvm::X86ISD::VPSHUFBITQMB , llvm::X86ISD::SINT_TO_FP_RND , llvm::X86ISD::UINT_TO_FP_RND , llvm::X86ISD::SCALAR_SINT_TO_FP , llvm::X86ISD::SCALAR_UINT_TO_FP , llvm::X86ISD::SCALAR_SINT_TO_FP_RND , llvm::X86ISD::SCALAR_UINT_TO_FP_RND , llvm::X86ISD::CVTP2SI , llvm::X86ISD::CVTP2UI , llvm::X86ISD::CVTP2SI_RND , llvm::X86ISD::CVTP2UI_RND , llvm::X86ISD::CVTS2SI , llvm::X86ISD::CVTS2UI , llvm::X86ISD::CVTS2SI_RND , llvm::X86ISD::CVTS2UI_RND , llvm::X86ISD::CVTTP2SI , llvm::X86ISD::CVTTP2UI , llvm::X86ISD::CVTTP2SI_SAE , llvm::X86ISD::CVTTP2UI_SAE , llvm::X86ISD::CVTTS2SI , llvm::X86ISD::CVTTS2UI , llvm::X86ISD::CVTTS2SI_SAE , llvm::X86ISD::CVTTS2UI_SAE , llvm::X86ISD::CVTSI2P , llvm::X86ISD::CVTUI2P , llvm::X86ISD::MCVTP2SI , llvm::X86ISD::MCVTP2UI , llvm::X86ISD::MCVTTP2SI , llvm::X86ISD::MCVTTP2UI , llvm::X86ISD::MCVTSI2P , llvm::X86ISD::MCVTUI2P , llvm::X86ISD::CVTNE2PS2BF16 , llvm::X86ISD::CVTNEPS2BF16 , llvm::X86ISD::MCVTNEPS2BF16 , llvm::X86ISD::DPBF16PS , llvm::X86ISD::DYN_ALLOCA , llvm::X86ISD::SEG_ALLOCA , llvm::X86ISD::PROBED_ALLOCA , llvm::X86ISD::MFENCE , llvm::X86ISD::RDRAND , llvm::X86ISD::RDSEED , llvm::X86ISD::RDPKRU , llvm::X86ISD::WRPKRU , llvm::X86ISD::PCMPISTR , llvm::X86ISD::PCMPESTR , llvm::X86ISD::XTEST , llvm::X86ISD::RSQRT28 , llvm::X86ISD::RSQRT28_SAE , llvm::X86ISD::RSQRT28S , llvm::X86ISD::RSQRT28S_SAE , llvm::X86ISD::RCP28 , llvm::X86ISD::RCP28_SAE , llvm::X86ISD::RCP28S , llvm::X86ISD::RCP28S_SAE , llvm::X86ISD::EXP2 , llvm::X86ISD::EXP2_SAE , llvm::X86ISD::CVTPS2PH , llvm::X86ISD::CVTPS2PH_SAE , llvm::X86ISD::CVTPH2PS , llvm::X86ISD::CVTPH2PS_SAE , llvm::X86ISD::MCVTPS2PH , llvm::X86ISD::MCVTPS2PH_SAE , llvm::X86ISD::GF2P8AFFINEINVQB , llvm::X86ISD::GF2P8AFFINEQB , llvm::X86ISD::GF2P8MULB , llvm::X86ISD::LWPINS , llvm::X86ISD::UMWAIT , llvm::X86ISD::TPAUSE , llvm::X86ISD::ENQCMD , llvm::X86ISD::ENQCMDS , llvm::X86ISD::VP2INTERSECT , llvm::X86ISD::TESTUI , llvm::X86ISD::FP80_ADD , llvm::X86ISD::STRICT_FCMP = ISD::FIRST_TARGET_STRICTFP_OPCODE , llvm::X86ISD::STRICT_FCMPS , llvm::X86ISD::STRICT_CMPP , llvm::X86ISD::STRICT_CMPM , llvm::X86ISD::STRICT_CVTTP2SI , llvm::X86ISD::STRICT_CVTTP2UI , llvm::X86ISD::STRICT_VFPEXT , llvm::X86ISD::STRICT_VFPROUND , llvm::X86ISD::STRICT_VRNDSCALE , llvm::X86ISD::STRICT_CVTSI2P , llvm::X86ISD::STRICT_CVTUI2P , llvm::X86ISD::STRICT_FNMADD , llvm::X86ISD::STRICT_FMSUB , llvm::X86ISD::STRICT_FNMSUB , llvm::X86ISD::STRICT_CVTPS2PH , llvm::X86ISD::STRICT_CVTPH2PS , llvm::X86ISD::STRICT_FP80_ADD , llvm::X86ISD::LCMPXCHG_DAG = ISD::FIRST_TARGET_MEMORY_OPCODE , llvm::X86ISD::LCMPXCHG8_DAG , llvm::X86ISD::LCMPXCHG16_DAG , llvm::X86ISD::LCMPXCHG16_SAVE_RBX_DAG , llvm::X86ISD::LADD , llvm::X86ISD::LSUB , llvm::X86ISD::LOR , llvm::X86ISD::LXOR , llvm::X86ISD::LAND , llvm::X86ISD::LBTS , llvm::X86ISD::LBTC , llvm::X86ISD::LBTR , llvm::X86ISD::LBTS_RM , llvm::X86ISD::LBTC_RM , llvm::X86ISD::LBTR_RM , llvm::X86ISD::AADD , llvm::X86ISD::AOR , llvm::X86ISD::AXOR , llvm::X86ISD::AAND , llvm::X86ISD::VZEXT_LOAD , llvm::X86ISD::VEXTRACT_STORE , llvm::X86ISD::VBROADCAST_LOAD , llvm::X86ISD::SUBV_BROADCAST_LOAD , llvm::X86ISD::FNSTCW16m , llvm::X86ISD::FLDCW16m , llvm::X86ISD::FNSTENVm , llvm::X86ISD::FLDENVm , llvm::X86ISD::FP_TO_INT_IN_MEM , llvm::X86ISD::FILD , llvm::X86ISD::FIST , llvm::X86ISD::FLD , llvm::X86ISD::FST , llvm::X86ISD::VAARG_64 , llvm::X86ISD::VAARG_X32 , llvm::X86ISD::VTRUNCSTOREUS , llvm::X86ISD::VTRUNCSTORES , llvm::X86ISD::VMTRUNCSTOREUS , llvm::X86ISD::VMTRUNCSTORES , llvm::X86ISD::MGATHER , llvm::X86ISD::MSCATTER , llvm::X86ISD::AESENC128KL , llvm::X86ISD::AESDEC128KL , llvm::X86ISD::AESENC256KL , llvm::X86ISD::AESDEC256KL , llvm::X86ISD::AESENCWIDE128KL , llvm::X86ISD::AESDECWIDE128KL , llvm::X86ISD::AESENCWIDE256KL , llvm::X86ISD::AESDECWIDE256KL , llvm::X86ISD::CMPCCXADD , llvm::X86ISD::VASTART_SAVE_XMM_REGS }

enum	llvm::X86::RoundingMode { llvm::X86::rmToNearest = 0 , llvm::X86::rmDownward = 1 << 10 , llvm::X86::rmUpward = 2 << 10 , llvm::X86::rmTowardZero = 3 << 10 , llvm::X86::rmMask = 3 << 10 }
	Current rounding mode is represented in bits 11:10 of FPSR. More...

Functions
bool	llvm::X86::isZeroNode (SDValue Elt)
	Returns true if Elt is a constant zero or floating point constant +0.0.

bool	llvm::X86::isOffsetSuitableForCodeModel (int64_t Offset, CodeModel::Model M, bool hasSymbolicDisplacement)
	Returns true of the given offset can be fit into displacement field of the instruction.

bool	llvm::X86::isCalleePop (CallingConv::ID CallingConv, bool is64Bit, bool IsVarArg, bool GuaranteeTCO)
	Determines whether the callee is required to pop its own arguments.

bool	llvm::X86::isConstantSplat (SDValue Op, APInt &SplatVal, bool AllowPartialUndefs=true)
	If Op is a constant whose elements are all the same constant or undefined, return true and return the constant value in `SplatVal`.

bool	llvm::X86::mayFoldLoad (SDValue Op, const X86Subtarget &Subtarget, bool AssumeSingleUse=false)
	Check if Op is a load operation that could be folded into some other x86 instruction as a memory operand.

bool	llvm::X86::mayFoldLoadIntoBroadcastFromMem (SDValue Op, MVT EltVT, const X86Subtarget &Subtarget, bool AssumeSingleUse=false)
	Check if Op is a load operation that could be folded into a vector splat instruction as a memory operand.

bool	llvm::X86::mayFoldIntoStore (SDValue Op)
	Check if Op is a value that could be used to fold a store into some other x86 instruction as a memory operand.

bool	llvm::X86::mayFoldIntoZeroExtend (SDValue Op)
	Check if Op is an operation that could be folded into a zero extend x86 instruction.

FastISel *	llvm::X86::createFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)

void	llvm::createUnpackShuffleMask (EVT VT, SmallVectorImpl< int > &Mask, bool Lo, bool Unary)
	Generate unpacklo/unpackhi shuffle mask.

void	llvm::createSplat2ShuffleMask (MVT VT, SmallVectorImpl< int > &Mask, bool Lo)
	Similar to unpacklo/unpackhi, but without the 128-bit lane limitation imposed by AVX and specific to the unary pattern.

Classes

Namespaces

Enumerations

Functions