llvm::MVT Class Reference

Machine Value Type. More...

#include "llvm/Support/MachineValueType.h"

Collaboration diagram for llvm::MVT:

Public Types
enum	SimpleValueType : uint8_t {   INVALID_SIMPLE_VALUE_TYPE = 0, Other = 1, i1 = 2, i8 = 3,   i16 = 4, i32 = 5, i64 = 6, i128 = 7,   FIRST_INTEGER_VALUETYPE = i1, LAST_INTEGER_VALUETYPE = i128, bf16 = 8, f16 = 9,   f32 = 10, f64 = 11, f80 = 12, f128 = 13,   ppcf128 = 14, FIRST_FP_VALUETYPE = bf16, LAST_FP_VALUETYPE = ppcf128, v1i1 = 15,   v2i1 = 16, v4i1 = 17, v8i1 = 18, v16i1 = 19,   v32i1 = 20, v64i1 = 21, v128i1 = 22, v256i1 = 23,   v512i1 = 24, v1024i1 = 25, v1i8 = 26, v2i8 = 27,   v4i8 = 28, v8i8 = 29, v16i8 = 30, v32i8 = 31,   v64i8 = 32, v128i8 = 33, v256i8 = 34, v512i8 = 35,   v1024i8 = 36, v1i16 = 37, v2i16 = 38, v3i16 = 39,   v4i16 = 40, v8i16 = 41, v16i16 = 42, v32i16 = 43,   v64i16 = 44, v128i16 = 45, v256i16 = 46, v512i16 = 47,   v1i32 = 48, v2i32 = 49, v3i32 = 50, v4i32 = 51,   v5i32 = 52, v6i32 = 53, v7i32 = 54, v8i32 = 55,   v16i32 = 56, v32i32 = 57, v64i32 = 58, v128i32 = 59,   v256i32 = 60, v512i32 = 61, v1024i32 = 62, v2048i32 = 63,   v1i64 = 64, v2i64 = 65, v3i64 = 66, v4i64 = 67,   v8i64 = 68, v16i64 = 69, v32i64 = 70, v64i64 = 71,   v128i64 = 72, v256i64 = 73, v1i128 = 74, FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i1,   LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE = v1i128, v1f16 = 75, v2f16 = 76, v3f16 = 77,   v4f16 = 78, v8f16 = 79, v16f16 = 80, v32f16 = 81,   v64f16 = 82, v128f16 = 83, v256f16 = 84, v512f16 = 85,   v2bf16 = 86, v3bf16 = 87, v4bf16 = 88, v8bf16 = 89,   v16bf16 = 90, v32bf16 = 91, v64bf16 = 92, v128bf16 = 93,   v1f32 = 94, v2f32 = 95, v3f32 = 96, v4f32 = 97,   v5f32 = 98, v6f32 = 99, v7f32 = 100, v8f32 = 101,   v16f32 = 102, v32f32 = 103, v64f32 = 104, v128f32 = 105,   v256f32 = 106, v512f32 = 107, v1024f32 = 108, v2048f32 = 109,   v1f64 = 110, v2f64 = 111, v3f64 = 112, v4f64 = 113,   v8f64 = 114, v16f64 = 115, v32f64 = 116, v64f64 = 117,   v128f64 = 118, v256f64 = 119, FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE = v1f16, LAST_FP_FIXEDLEN_VECTOR_VALUETYPE = v256f64,   FIRST_FIXEDLEN_VECTOR_VALUETYPE = v1i1, LAST_FIXEDLEN_VECTOR_VALUETYPE = v256f64, nxv1i1 = 120, nxv2i1 = 121,   nxv4i1 = 122, nxv8i1 = 123, nxv16i1 = 124, nxv32i1 = 125,   nxv64i1 = 126, nxv1i8 = 127, nxv2i8 = 128, nxv4i8 = 129,   nxv8i8 = 130, nxv16i8 = 131, nxv32i8 = 132, nxv64i8 = 133,   nxv1i16 = 134, nxv2i16 = 135, nxv4i16 = 136, nxv8i16 = 137,   nxv16i16 = 138, nxv32i16 = 139, nxv1i32 = 140, nxv2i32 = 141,   nxv4i32 = 142, nxv8i32 = 143, nxv16i32 = 144, nxv32i32 = 145,   nxv1i64 = 146, nxv2i64 = 147, nxv4i64 = 148, nxv8i64 = 149,   nxv16i64 = 150, nxv32i64 = 151, FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv1i1, LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE = nxv32i64,   nxv1f16 = 152, nxv2f16 = 153, nxv4f16 = 154, nxv8f16 = 155,   nxv16f16 = 156, nxv32f16 = 157, nxv1bf16 = 158, nxv2bf16 = 159,   nxv4bf16 = 160, nxv8bf16 = 161, nxv1f32 = 162, nxv2f32 = 163,   nxv4f32 = 164, nxv8f32 = 165, nxv16f32 = 166, nxv1f64 = 167,   nxv2f64 = 168, nxv4f64 = 169, nxv8f64 = 170, FIRST_FP_SCALABLE_VECTOR_VALUETYPE = nxv1f16,   LAST_FP_SCALABLE_VECTOR_VALUETYPE = nxv8f64, FIRST_SCALABLE_VECTOR_VALUETYPE = nxv1i1, LAST_SCALABLE_VECTOR_VALUETYPE = nxv8f64, FIRST_VECTOR_VALUETYPE = v1i1,   LAST_VECTOR_VALUETYPE = nxv8f64, x86mmx = 171, Glue = 172, isVoid = 173,   Untyped = 174, funcref = 175, externref = 176, x86amx = 177,   i64x8 = 178, FIRST_VALUETYPE = 1, LAST_VALUETYPE = i64x8, VALUETYPE_SIZE = LAST_VALUETYPE + 1,   MAX_ALLOWED_VALUETYPE = 192, token = 248, Metadata = 249, iPTRAny = 250,   vAny = 251, fAny = 252, iAny = 253, iPTR = 254,   Any = 255 }

Public Member Functions
constexpr	MVT ()=default
constexpr	MVT (SimpleValueType SVT)
bool	operator> (const MVT &S) const
bool	operator< (const MVT &S) const
bool	operator== (const MVT &S) const
bool	operator!= (const MVT &S) const
bool	operator>= (const MVT &S) const
bool	operator<= (const MVT &S) const
bool	isValid () const
	Return true if this is a valid simple valuetype. More...
bool	isFloatingPoint () const
	Return true if this is a FP or a vector FP type. More...
bool	isInteger () const
	Return true if this is an integer or a vector integer type. More...
bool	isScalarInteger () const
	Return true if this is an integer, not including vectors. More...
bool	isVector () const
	Return true if this is a vector value type. More...
bool	isScalableVector () const
	Return true if this is a vector value type where the runtime length is machine dependent. More...
bool	isFixedLengthVector () const
bool	is16BitVector () const
	Return true if this is a 16-bit vector type. More...
bool	is32BitVector () const
	Return true if this is a 32-bit vector type. More...
bool	is64BitVector () const
	Return true if this is a 64-bit vector type. More...
bool	is128BitVector () const
	Return true if this is a 128-bit vector type. More...
bool	is256BitVector () const
	Return true if this is a 256-bit vector type. More...
bool	is512BitVector () const
	Return true if this is a 512-bit vector type. More...
bool	is1024BitVector () const
	Return true if this is a 1024-bit vector type. More...
bool	is2048BitVector () const
	Return true if this is a 2048-bit vector type. More...
bool	isOverloaded () const
	Return true if this is an overloaded type for TableGen. More...
MVT	changeVectorElementTypeToInteger () const
	Return a vector with the same number of elements as this vector, but with the element type converted to an integer type with the same bitwidth. More...
MVT	changeVectorElementType (MVT EltVT) const
	Return a VT for a vector type whose attributes match ourselves with the exception of the element type that is chosen by the caller. More...
MVT	changeTypeToInteger ()
	Return the type converted to an equivalently sized integer or vector with integer element type. More...
MVT	getHalfNumVectorElementsVT () const
	Return a VT for a vector type with the same element type but half the number of elements. More...
bool	isPow2VectorType () const
	Returns true if the given vector is a power of 2. More...
MVT	getPow2VectorType () const
	Widens the length of the given vector MVT up to the nearest power of 2 and returns that type. More...
MVT	getScalarType () const
	If this is a vector, return the element type, otherwise return this. More...
MVT	getVectorElementType () const
unsigned	getVectorMinNumElements () const
	Given a vector type, return the minimum number of elements it contains. More...
ElementCount	getVectorElementCount () const
unsigned	getVectorNumElements () const
TypeSize	getSizeInBits () const
	Returns the size of the specified MVT in bits. More...
uint64_t	getFixedSizeInBits () const
	Return the size of the specified fixed width value type in bits. More...
uint64_t	getScalarSizeInBits () const
TypeSize	getStoreSize () const
	Return the number of bytes overwritten by a store of the specified value type. More...
TypeSize	getStoreSizeInBits () const
	Return the number of bits overwritten by a store of the specified value type. More...
bool	isByteSized () const
	Returns true if the number of bits for the type is a multiple of an 8-bit byte. More...
bool	knownBitsGT (MVT VT) const
	Return true if we know at compile time this has more bits than VT. More...
bool	knownBitsGE (MVT VT) const
	Return true if we know at compile time this has more than or the same bits as VT. More...
bool	knownBitsLT (MVT VT) const
	Return true if we know at compile time this has fewer bits than VT. More...
bool	knownBitsLE (MVT VT) const
	Return true if we know at compile time this has fewer than or the same bits as VT. More...
bool	bitsGT (MVT VT) const
	Return true if this has more bits than VT. More...
bool	bitsGE (MVT VT) const
	Return true if this has no less bits than VT. More...
bool	bitsLT (MVT VT) const
	Return true if this has less bits than VT. More...
bool	bitsLE (MVT VT) const
	Return true if this has no more bits than VT. More...

Static Public Member Functions
static MVT	getFloatingPointVT (unsigned BitWidth)
static MVT	getIntegerVT (unsigned BitWidth)
static MVT	getVectorVT (MVT VT, unsigned NumElements)
static MVT	getScalableVectorVT (MVT VT, unsigned NumElements)
static MVT	getVectorVT (MVT VT, unsigned NumElements, bool IsScalable)
static MVT	getVectorVT (MVT VT, ElementCount EC)
static MVT	getVT (Type *Ty, bool HandleUnknown=false)
	Return the value type corresponding to the specified type. More...
static auto	all_valuetypes ()
	SimpleValueType Iteration. More...
static auto	integer_valuetypes ()
static auto	fp_valuetypes ()
static auto	vector_valuetypes ()
static auto	fixedlen_vector_valuetypes ()
static auto	scalable_vector_valuetypes ()
static auto	integer_fixedlen_vector_valuetypes ()
static auto	fp_fixedlen_vector_valuetypes ()
static auto	integer_scalable_vector_valuetypes ()
static auto	fp_scalable_vector_valuetypes ()

Public Attributes
SimpleValueType	SimpleTy = INVALID_SIMPLE_VALUE_TYPE

Detailed Description

Machine Value Type.

Every type that is supported natively by some processor targeted by LLVM occurs here. This means that any legal value type can be represented by an MVT.

Definition at line 31 of file MachineValueType.h.

Member Enumeration Documentation

SimpleValueType

enum llvm::MVT::SimpleValueType : uint8_t

Enumerator
INVALID_SIMPLE_VALUE_TYPE
Other
i1
i8
i16
i32
i64
i128
FIRST_INTEGER_VALUETYPE
LAST_INTEGER_VALUETYPE
bf16
f16
f32
f64
f80
f128
ppcf128
FIRST_FP_VALUETYPE
LAST_FP_VALUETYPE
v1i1
v2i1
v4i1
v8i1
v16i1
v32i1
v64i1
v128i1
v256i1
v512i1
v1024i1
v1i8
v2i8
v4i8
v8i8
v16i8
v32i8
v64i8
v128i8
v256i8
v512i8
v1024i8
v1i16
v2i16
v3i16
v4i16
v8i16
v16i16
v32i16
v64i16
v128i16
v256i16
v512i16
v1i32
v2i32
v3i32
v4i32
v5i32
v6i32
v7i32
v8i32
v16i32
v32i32
v64i32
v128i32
v256i32
v512i32
v1024i32
v2048i32
v1i64
v2i64
v3i64
v4i64
v8i64
v16i64
v32i64
v64i64
v128i64
v256i64
v1i128
FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE
LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE
v1f16
v2f16
v3f16
v4f16
v8f16
v16f16
v32f16
v64f16
v128f16
v256f16
v512f16
v2bf16
v3bf16
v4bf16
v8bf16
v16bf16
v32bf16
v64bf16
v128bf16
v1f32
v2f32
v3f32
v4f32
v5f32
v6f32
v7f32
v8f32
v16f32
v32f32
v64f32
v128f32
v256f32
v512f32
v1024f32
v2048f32
v1f64
v2f64
v3f64
v4f64
v8f64
v16f64
v32f64
v64f64
v128f64
v256f64
FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE
LAST_FP_FIXEDLEN_VECTOR_VALUETYPE
FIRST_FIXEDLEN_VECTOR_VALUETYPE
LAST_FIXEDLEN_VECTOR_VALUETYPE
nxv1i1
nxv2i1
nxv4i1
nxv8i1
nxv16i1
nxv32i1
nxv64i1
nxv1i8
nxv2i8
nxv4i8
nxv8i8
nxv16i8
nxv32i8
nxv64i8
nxv1i16
nxv2i16
nxv4i16
nxv8i16
nxv16i16
nxv32i16
nxv1i32
nxv2i32
nxv4i32
nxv8i32
nxv16i32
nxv32i32
nxv1i64
nxv2i64
nxv4i64
nxv8i64
nxv16i64
nxv32i64
FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE
LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE
nxv1f16
nxv2f16
nxv4f16
nxv8f16
nxv16f16
nxv32f16
nxv1bf16
nxv2bf16
nxv4bf16
nxv8bf16
nxv1f32
nxv2f32
nxv4f32
nxv8f32
nxv16f32
nxv1f64
nxv2f64
nxv4f64
nxv8f64
FIRST_FP_SCALABLE_VECTOR_VALUETYPE
LAST_FP_SCALABLE_VECTOR_VALUETYPE
FIRST_SCALABLE_VECTOR_VALUETYPE
LAST_SCALABLE_VECTOR_VALUETYPE
FIRST_VECTOR_VALUETYPE
LAST_VECTOR_VALUETYPE
x86mmx
Glue
isVoid
Untyped
funcref
externref
x86amx
i64x8
FIRST_VALUETYPE
LAST_VALUETYPE
VALUETYPE_SIZE
MAX_ALLOWED_VALUETYPE
token
Metadata
iPTRAny
vAny
fAny
iAny
iPTR
Any

Definition at line 33 of file MachineValueType.h.

Constructor & Destructor Documentation

MVT() [1/2]

constexpr llvm::MVT::MVT ( )

constexprdefault

Referenced by getVT().

MVT() [2/2]

constexpr llvm::MVT::MVT ( SimpleValueType  SVT )

inlineconstexpr

Definition at line 324 of file MachineValueType.h.

Member Function Documentation

all_valuetypes()

static auto llvm::MVT::all_valuetypes ( )

inlinestatic

SimpleValueType Iteration.

Definition at line 1411 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_VALUETYPE.

Referenced by llvm::TargetLoweringBase::initActions().

bitsGE()

bool llvm::MVT::bitsGE ( MVT  VT ) const

inline

Return true if this has no less bits than VT.

Definition at line 1125 of file MachineValueType.h.

References assert(), isScalableVector(), and knownBitsGE().

bitsGT()

bool llvm::MVT::bitsGT ( MVT  VT ) const

inline

Return true if this has more bits than VT.

Definition at line 1118 of file MachineValueType.h.

References assert(), isScalableVector(), and knownBitsGT().

Referenced by getRVVFPExtendOrRound(), LowerFCOPYSIGN(), LowerShiftByScalarVariable(), and lowerVECTOR_SHUFFLE().

bitsLE()

bool llvm::MVT::bitsLE ( MVT  VT ) const

inline

Return true if this has no more bits than VT.

Definition at line 1139 of file MachineValueType.h.

References assert(), isScalableVector(), and knownBitsLE().

Referenced by getMaskNode(), llvm::SITargetLowering::getPreferredVectorAction(), lowerBUILD_VECTOR(), and LowerShiftByScalarVariable().

bitsLT()

bool llvm::MVT::bitsLT ( MVT  VT ) const

inline

Return true if this has less bits than VT.

Definition at line 1132 of file MachineValueType.h.

References assert(), isScalableVector(), and knownBitsLT().

Referenced by LowerFCOPYSIGN(), llvm::RISCVTargetLowering::LowerOperation(), LowerShiftByScalarVariable(), lowerVectorIntrinsicSplats(), and selectVSplatSimmHelper().

changeTypeToInteger()

MVT llvm::MVT::changeTypeToInteger ( )

inline

Return the type converted to an equivalently sized integer or vector with integer element type.

Similar to changeVectorElementTypeToInteger, but also handles scalars.

Definition at line 481 of file MachineValueType.h.

References changeVectorElementTypeToInteger(), getIntegerVT(), getSizeInBits(), and isVector().

Referenced by llvm::EVT::changeTypeToInteger(), lowerShuffleWithPERMV(), lowerVECTOR_SHUFFLE(), and matchBinaryShuffle().

changeVectorElementType()

MVT llvm::MVT::changeVectorElementType ( MVT  EltVT ) const

inline

Return a VT for a vector type whose attributes match ourselves with the exception of the element type that is chosen by the caller.

Definition at line 471 of file MachineValueType.h.

References assert(), getVectorElementCount(), getVectorVT(), INVALID_SIMPLE_VALUE_TYPE, and SimpleTy.

Referenced by llvm::EVT::changeVectorElementType(), lowerBUILD_VECTOR(), llvm::RISCVTargetLowering::LowerOperation(), lowerVECTOR_SHUFFLE(), and matchUnaryShuffle().

changeVectorElementTypeToInteger()

MVT llvm::MVT::changeVectorElementTypeToInteger ( ) const

inline

Return a vector with the same number of elements as this vector, but with the element type converted to an integer type with the same bitwidth.

Definition at line 460 of file MachineValueType.h.

References assert(), getIntegerVT(), getSizeInBits(), getVectorElementCount(), getVectorElementType(), getVectorVT(), INVALID_SIMPLE_VALUE_TYPE, and SimpleTy.

Referenced by changeTypeToInteger(), llvm::EVT::changeVectorElementTypeToInteger(), lowerCTLZ_CTTZ_ZERO_UNDEF(), and lowerFTRUNC_FCEIL_FFLOOR().

fixedlen_vector_valuetypes()

static auto llvm::MVT::fixedlen_vector_valuetypes ( )

inlinestatic

Definition at line 1433 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_FIXEDLEN_VECTOR_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_FIXEDLEN_VECTOR_VALUETYPE.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::MipsSETargetLowering::MipsSETargetLowering(), llvm::NVPTXTargetLowering::NVPTXTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), llvm::WebAssemblyTargetLowering::WebAssemblyTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

fp_fixedlen_vector_valuetypes()

static auto llvm::MVT::fp_fixedlen_vector_valuetypes ( )

inlinestatic

Definition at line 1451 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_FP_FIXEDLEN_VECTOR_VALUETYPE.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), and llvm::RISCVTargetLowering::RISCVTargetLowering().

fp_scalable_vector_valuetypes()

static auto llvm::MVT::fp_scalable_vector_valuetypes ( )

inlinestatic

Definition at line 1463 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_FP_SCALABLE_VECTOR_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_FP_SCALABLE_VECTOR_VALUETYPE.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

fp_valuetypes()

static auto llvm::MVT::fp_valuetypes ( )

inlinestatic

Definition at line 1422 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_FP_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_FP_VALUETYPE.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::TargetLoweringBase::initActions(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), and llvm::SystemZTargetLowering::SystemZTargetLowering().

getFixedSizeInBits()

uint64_t llvm::MVT::getFixedSizeInBits ( ) const

inline

Return the size of the specified fixed width value type in bits.

The function will assert if the type is scalable.

Definition at line 1062 of file MachineValueType.h.

References llvm::TypeSize::getFixedSize(), and getSizeInBits().

Referenced by CC_AIX(), combineInsertSubvector(), combineTargetShuffle(), llvm::TargetLoweringBase::computeRegisterProperties(), getCopyToPartsVector(), llvm::MipsTargetLowering::getVectorTypeBreakdownForCallingConv(), LowerEXTEND_VECTOR_INREG(), LowerVSETCC(), MatchingStackOffset(), truncateScalarIntegerArg(), useRVVForFixedLengthVectorVT(), and widenSubVector().

getFloatingPointVT()

static MVT llvm::MVT::getFloatingPointVT ( unsigned  BitWidth )

inlinestatic

Definition at line 1145 of file MachineValueType.h.

References llvm::BitWidth, f128, f16, f32, f64, f80, and llvm_unreachable.

Referenced by combineBitcast(), combineCVTP2I_CVTTP2I(), combinePredicateReduction(), combineX86ShuffleChain(), combineX86ShufflesConstants(), EltsFromConsecutiveLoads(), llvm::EVT::getFloatingPointVT(), lower256BitShuffle(), lowerVECTOR_SHUFFLE(), and tryWidenMaskForShuffle().

getHalfNumVectorElementsVT()

MVT llvm::MVT::getHalfNumVectorElementsVT ( ) const

inline

Return a VT for a vector type with the same element type but half the number of elements.

Definition at line 489 of file MachineValueType.h.

References assert(), getVectorElementCount(), getVectorElementType(), and getVectorVT().

Referenced by combineTargetShuffle(), llvm::RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs(), getHopForBuildVector(), getShuffleHalfVectors(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), lowerShuffleWithUndefHalf(), LowerSIGN_EXTEND(), and lowerV2X128Shuffle().

getIntegerVT()

static MVT llvm::MVT::getIntegerVT ( unsigned  BitWidth )

inlinestatic

Definition at line 1162 of file MachineValueType.h.

References llvm::BitWidth, i1, i128, i16, i32, i64, i8, and INVALID_SIMPLE_VALUE_TYPE.

Referenced by changeTypeToInteger(), changeVectorElementTypeToInteger(), combineBitcast(), combineConcatVectorOps(), combineMUL_VLToVWMUL(), combineX86INT_TO_FP(), combineX86ShuffleChain(), combineX86ShufflesConstants(), llvm::computeSignatureVTs(), EltsFromConsecutiveLoads(), ExtractBitFromMaskVector(), llvm::EVT::getIntegerVT(), llvm::getMVTForLLT(), getPermuteNode(), llvm::TargetLoweringBase::getPointerMemTy(), llvm::TargetLoweringBase::getPointerTy(), llvm::AArch64TargetLowering::getPointerTy(), getRegistersForValue(), llvm::M68kTargetLowering::getScalarShiftAmountTy(), llvm::TargetLoweringBase::getScalarShiftAmountTy(), llvm::ARMTargetLowering::getTgtMemIntrinsic(), getVT(), llvm::TargetLoweringBase::hasFastEqualityCompare(), llvm::X86TargetLowering::hasFastEqualityCompare(), llvm::TargetLoweringBase::initActions(), insert1BitVector(), InsertBitToMaskVector(), is128BitUnpackShuffleMask(), llvm::SystemZVectorConstantInfo::isVectorConstantLegal(), lowerBUILD_VECTOR(), LowerBUILD_VECTORvXi1(), lowerBuildVectorAsBroadcast(), LowerCTPOP(), lowerFCOPYSIGN64(), LowerFunnelShift(), llvm::RISCVTargetLowering::LowerOperation(), LowerRotate(), llvm::HexagonTargetLowering::LowerSETCC(), lowerShuffleAsBlend(), lowerShuffleAsPermuteAndUnpack(), lowerShuffleAsSpecificZeroOrAnyExtend(), lowerShuffleAsVTRUNC(), lowerShuffleToEXPAND(), lowerShuffleWithPACK(), LowerTruncateVecI1(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), lowerVECTOR_SHUFFLE(), LowerVectorCTLZInRegLUT(), llvm::HexagonTargetLowering::LowerVSELECT(), lowerX86FPLogicOp(), matchShuffleAsBitRotate(), matchShuffleAsShift(), matchShuffleAsVTRUNC(), matchShuffleWithPACK(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), memsetStore(), llvm::TargetLowering::ParseConstraints(), PerformVECREDUCE_ADDCombine(), PerformVQDMULHCombine(), llvm::X86TargetLowering::ReplaceNodeResults(), scaleVectorType(), llvm::AArch64TargetLowering::shouldTransformSignedTruncationCheck(), llvm::X86TargetLowering::shouldTransformSignedTruncationCheck(), ShrinkLoadReplaceStoreWithStore(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::HexagonDAGToDAGISel::StoreInstrForLoadIntrinsic(), llvm::SystemZTargetLowering::SystemZTargetLowering(), TryCombineBaseUpdate(), tryWidenMaskForShuffle(), unpackFromMemLoc(), and llvm::X86TargetLowering::X86TargetLowering().

getPow2VectorType()

MVT llvm::MVT::getPow2VectorType ( ) const

inline

Widens the length of the given vector MVT up to the nearest power of 2 and returns that type.

Definition at line 504 of file MachineValueType.h.

References llvm::LinearPolySize< ElementCount >::get(), llvm::LinearPolySize< LeafTy >::getKnownMinValue(), getVectorElementCount(), getVectorElementType(), getVectorVT(), isPow2VectorType(), llvm::LinearPolySize< LeafTy >::isScalable(), and llvm::Log2_32_Ceil().

Referenced by llvm::TargetLoweringBase::computeRegisterProperties().

getScalableVectorVT()

static MVT llvm::MVT::getScalableVectorVT ( MVT  VT, unsigned  NumElements  )

inlinestatic

Definition at line 1314 of file MachineValueType.h.

References bf16, f16, f32, f64, i1, i16, i32, i64, i8, INVALID_SIMPLE_VALUE_TYPE, nxv16f16, nxv16f32, nxv16i1, nxv16i16, nxv16i32, nxv16i64, nxv16i8, nxv1bf16, nxv1f16, nxv1f32, nxv1f64, nxv1i1, nxv1i16, nxv1i32, nxv1i64, nxv1i8, nxv2bf16, nxv2f16, nxv2f32, nxv2f64, nxv2i1, nxv2i16, nxv2i32, nxv2i64, nxv2i8, nxv32f16, nxv32i1, nxv32i16, nxv32i32, nxv32i64, nxv32i8, nxv4bf16, nxv4f16, nxv4f32, nxv4f64, nxv4i1, nxv4i16, nxv4i32, nxv4i64, nxv4i8, nxv64i1, nxv64i8, nxv8bf16, nxv8f16, nxv8f32, nxv8f64, nxv8i1, nxv8i16, nxv8i32, nxv8i64, nxv8i8, and SimpleTy.

Referenced by getContainerForFixedLengthVector(), getLMUL1VT(), and getVectorVT().

getScalarSizeInBits()

uint64_t llvm::MVT::getScalarSizeInBits ( ) const

inline

Definition at line 1066 of file MachineValueType.h.

References llvm::TypeSize::getFixedSize(), getScalarType(), and getSizeInBits().

Referenced by canonicalizeBitSelect(), CC_RISCV(), CC_RISCV_FastCC(), combineAddOfPMADDWD(), combineAndnp(), combineConcatVectorOps(), combineCVTP2I_CVTTP2I(), combineMOVMSK(), combineMUL_VLToVWMUL(), combineSetCCMOVMSK(), combineStore(), combineTargetShuffle(), combineVEXTRACT_STORE(), combineX86INT_TO_FP(), combineX86ShuffleChain(), llvm::X86TargetLowering::ComputeNumSignBitsForTargetNode(), llvm::TargetLoweringBase::computeRegisterProperties(), createPackShuffleMask(), createVariablePermute(), DecodePALIGNRMask(), expandFP_TO_UINT_SSE(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), getAVX512Node(), getAVX512TruncNode(), llvm::X86TTIImpl::getCmpSelInstrCost(), getConstantVector(), getConstVector(), llvm::RegsForValue::getCopyFromRegs(), getFauxShuffleMask(), getMemCmpLoad(), getPack(), llvm::SystemZTargetLowering::getPreferredVectorAction(), llvm::PPCTargetLowering::getPreferredVectorAction(), getPSHUFShuffleMask(), llvm::X86TTIImpl::getReplicationShuffleCost(), getScalarValueForVectorElement(), getTargetShuffleMask(), getTargetVShiftNode(), getVectorTypeBreakdownMVT(), is128BitLaneCrossingShuffleMask(), isHorizontalBinOp(), isRepeatedShuffleMask(), isRepeatedTargetShuffleMask(), lower256BitShuffle(), LowerADDSAT_SUBSAT(), LowerBITREVERSE_XOP(), lowerBUILD_VECTOR(), lowerBuildVectorAsBroadcast(), lowerBuildVectorToBitOp(), lowerCTLZ_CTTZ_ZERO_UNDEF(), LowerCTTZ(), LowerEXTEND_VECTOR_INREG(), LowerFABSorFNEG(), LowerFCOPYSIGN(), LowerFunnelShift(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), LowerMSTORE(), LowerRotate(), LowerShift(), LowerShiftByScalarImmediate(), lowerShuffleAsBitRotate(), lowerShuffleAsBlend(), lowerShuffleAsBlendAndPermute(), lowerShuffleAsBroadcast(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsByteShiftMask(), lowerShuffleAsLanePermuteAndRepeatedMask(), lowerShuffleAsPermuteAndUnpack(), lowerShuffleAsRepeatedMaskAndLanePermute(), lowerShuffleAsShift(), lowerShuffleAsSpecificZeroOrAnyExtend(), lowerShuffleAsVTRUNC(), lowerShuffleAsZeroOrAnyExtend(), lowerShuffleOfExtractsAsVperm(), lowerShuffleWithPACK(), lowerShuffleWithPSHUFB(), lowerShuffleWithVPMOV(), LowerTruncateVecI1(), lowerV4X128Shuffle(), lowerVECTOR_SHUFFLE(), LowerVectorCTLZInRegLUT(), LowerVSETCC(), lowerX86FPLogicOp(), LowerZERO_EXTEND_Mask(), matchBinaryPermuteShuffle(), matchBinaryShuffle(), matchShuffleAsEXTRQ(), matchShuffleAsINSERTQ(), matchShuffleAsVTRUNC(), matchShuffleWithPACK(), matchShuffleWithSHUFPD(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), llvm::X86::mayFoldLoadIntoBroadcastFromMem(), PerformVQDMULHCombine(), scaleVectorType(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), supportedVectorShiftWithImm(), supportedVectorVarShift(), and vectorizeExtractedCast().

getScalarType()

MVT llvm::MVT::getScalarType ( ) const

inline

If this is a vector, return the element type, otherwise return this.

Definition at line 515 of file MachineValueType.h.

References getVectorElementType(), and isVector().

Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), combineConcatVectorOps(), combineExtractSubvector(), combineStore(), combineVectorSignBitsTruncation(), constructDup(), createVariablePermute(), llvm::TargetLowering::expandBSWAP(), getAVX512Node(), getAVX512TruncNode(), getFauxShuffleMask(), llvm::SITargetLowering::getPreferredVectorAction(), llvm::NVPTXTargetLowering::getPreferredVectorAction(), llvm::X86TTIImpl::getReplicationShuffleCost(), getScalarSizeInBits(), getTargetShuffleMask(), llvm::X86TargetLowering::isShuffleMaskLegal(), LowerBITREVERSE(), lowerBuildVectorAsBroadcast(), lowerBuildVectorToBitOp(), LowerMINMAX(), LowerMLOAD(), LowerMSTORE(), lowerShuffleAsBroadcast(), lowerShuffleAsVALIGN(), lowerShuffleAsVTRUNC(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), lowerVECTOR_SHUFFLE(), LowerVectorCTPOP(), matchUnaryShuffle(), scalarizeVectorStore(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), vectorizeExtractedCast(), and widenSubVector().

getSizeInBits()

TypeSize llvm::MVT::getSizeInBits ( ) const

inline

Returns the size of the specified MVT in bits.

If the value type is a scalable vector type, the scalable property will be set and the runtime size will be a positive integer multiple of the base size.

Definition at line 864 of file MachineValueType.h.

References Any, bf16, externref, f128, f16, f32, f64, f80, fAny, llvm::TypeSize::Fixed(), funcref, i1, i128, i16, i32, i64, i64x8, i8, iAny, iPTR, iPTRAny, llvm_unreachable, Metadata, nxv16f16, nxv16f32, nxv16i1, nxv16i16, nxv16i32, nxv16i64, nxv16i8, nxv1bf16, nxv1f16, nxv1f32, nxv1f64, nxv1i1, nxv1i16, nxv1i32, nxv1i64, nxv1i8, nxv2bf16, nxv2f16, nxv2f32, nxv2f64, nxv2i1, nxv2i16, nxv2i32, nxv2i64, nxv2i8, nxv32f16, nxv32i1, nxv32i16, nxv32i32, nxv32i64, nxv32i8, nxv4bf16, nxv4f16, nxv4f32, nxv4f64, nxv4i1, nxv4i16, nxv4i32, nxv4i64, nxv4i8, nxv64i1, nxv64i8, nxv8bf16, nxv8f16, nxv8f32, nxv8f64, nxv8i1, nxv8i16, nxv8i32, nxv8i64, nxv8i8, Other, ppcf128, llvm::TypeSize::Scalable(), SimpleTy, token, v1024f32, v1024i1, v1024i32, v1024i8, v128bf16, v128f16, v128f32, v128f64, v128i1, v128i16, v128i32, v128i64, v128i8, v16bf16, v16f16, v16f32, v16f64, v16i1, v16i16, v16i32, v16i64, v16i8, v1f16, v1f32, v1f64, v1i1, v1i128, v1i16, v1i32, v1i64, v1i8, v2048f32, v2048i32, v256f16, v256f32, v256f64, v256i1, v256i16, v256i32, v256i64, v256i8, v2bf16, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32bf16, v32f16, v32f32, v32f64, v32i1, v32i16, v32i32, v32i64, v32i8, v3bf16, v3f16, v3f32, v3f64, v3i16, v3i32, v3i64, v4bf16, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512f16, v512f32, v512i1, v512i16, v512i32, v512i8, v5f32, v5i32, v64bf16, v64f16, v64f32, v64f64, v64i1, v64i16, v64i32, v64i64, v64i8, v6f32, v6i32, v7f32, v7i32, v8bf16, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, v8i8, vAny, x86amx, and x86mmx.

Referenced by canonicalizeBitSelect(), CC_ARM_AAPCS_Custom_Aggregate(), CC_Sparc64_Full(), CC_Sparc64_Half(), CC_X86_32_VectorCall(), CC_X86_64_VectorCall(), llvm::CC_XPLINK64_Shadow_Stack(), changeTypeToInteger(), changeVectorElementTypeToInteger(), combineExtractSubvector(), combinePredicateReduction(), combineSetCCMOVMSK(), combineShiftRightArithmetic(), combineTargetShuffle(), combineVectorHADDSUB(), combineVectorSignBitsTruncation(), combineX86ShuffleChain(), combineX86ShufflesConstants(), combineX86ShufflesRecursively(), convertShiftLeftToScale(), createPackShuffleMask(), createShuffleStride(), createVariablePermute(), createVPDPBUSD(), DecodePALIGNRMask(), EltsFromConsecutiveLoads(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), llvm::FastISel::fastEmit_ri_(), finishStackBlock(), genShuffleBland(), getAVX512Node(), getAVX512TruncNode(), getCopyFromParts(), getCopyFromPartsVector(), getCopyToParts(), getCopyToPartsVector(), getFauxShuffleMask(), getFixedSizeInBits(), getHopForBuildVector(), llvm::getLLTForMVT(), llvm::RISCVTargetLowering::getLMUL(), getLMUL1VT(), llvm::TargetLoweringBase::getNumRegisters(), getPack(), llvm::HvxSelector::getPairVT(), getPromotedVectorElementType(), getPSHUFShuffleMask(), llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), llvm::SITargetLowering::getRegForInlineAsmConstraint(), llvm::ARMTargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), getRegistersForValue(), llvm::RegsForValue::getRegsAndSizes(), getScalarSizeInBits(), getScalarValueForVectorElement(), llvm::X86TargetLowering::getSetCCResultType(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::HvxSelector::getSingleVT(), llvm::EVT::getSizeInBits(), getStoreSize(), getTargetShuffleAndZeroables(), getTargetVShiftByConstNode(), getTargetVShiftNode(), llvm::HexagonSubtarget::getTypeAlignment(), llvm::AArch64TargetLowering::getVaListSizeInBits(), llvm::TargetLoweringBase::getVaListSizeInBits(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), llvm::MipsTargetLowering::getVectorTypeBreakdownForCallingConv(), getZeroVector(), group2Shuffle(), hasBZHI(), insert1BitVector(), isByteSized(), IsElementEquivalent(), isHorizontalBinOp(), llvm::HexagonSubtarget::isHVXVectorType(), llvm::X86TargetLowering::isShuffleMaskLegal(), isSupportedType(), isTargetShuffleEquivalent(), llvm::HexagonSubtarget::isTypeForHVX(), llvm::RISCVTargetLowering::joinRegisterPartsIntoValue(), knownBitsGE(), knownBitsGT(), knownBitsLE(), knownBitsLT(), llvm::LLT::LLT(), llvm::X86TargetLowering::LowerAsmOutputForConstraint(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerBITCAST(), LowerBITREVERSE_XOP(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), lowerBUILD_VECTOR(), LowerBUILD_VECTORvXi1(), lowerBuildVectorAsBroadcast(), llvm::SystemZTargetLowering::LowerCall(), llvm::TargetLowering::LowerCallTo(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCTLZ(), LowerEXTEND_VECTOR_INREG(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::VETargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_64(), lowerFPToIntToFP(), LowerHorizontalByteSum(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), LowerMSTORE(), llvm::RISCVTargetLowering::LowerOperation(), LowerPARITY(), LowerSCALAR_TO_VECTOR(), llvm::HexagonTargetLowering::LowerSETCC(), lowerShuffleAsBlend(), lowerShuffleAsBlendOfPSHUFBs(), lowerShuffleAsByteRotate(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsDecomposedShuffleMerge(), lowerShuffleAsElementInsertion(), lowerShuffleAsLanePermuteAndPermute(), lowerShuffleAsLanePermuteAndRepeatedMask(), lowerShuffleAsRepeatedMaskAndLanePermute(), lowerShuffleAsSplitOrBlend(), lowerShuffleAsTruncBroadcast(), lowerShuffleAsUNPCKAndPermute(), lowerShuffleAsZeroOrAnyExtend(), lowerShuffleWithPACK(), lowerShuffleWithPERMV(), lowerShuffleWithPSHUFB(), lowerShuffleWithUndefHalf(), LowerSIGN_EXTEND_Mask(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerStore(), LowerTruncateVecI1(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLE(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTPOP(), llvm::HexagonTargetLowering::LowerVSELECT(), LowerVSETCC(), lowerX86FPLogicOp(), LowerZERO_EXTEND_Mask(), matchBinaryPermuteShuffle(), MatchingStackOffset(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), narrowExtractedVectorSelect(), llvm::TargetLowering::ParseConstraints(), llvm::RISCVTargetLowering::PerformDAGCombine(), performFDivCombine(), performFpToIntCombine(), performScatterStoreCombine(), PerformTruncatingStoreCombine(), PerformVCVTCombine(), PerformVDIVCombine(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::RISCVDAGToDAGISel::selectSExti32(), llvm::HexagonDAGToDAGISel::SelectV2Q(), llvm::HexagonDAGToDAGISel::SelectVAlign(), selectVSplatSimmHelper(), llvm::RISCVDAGToDAGISel::selectZExti32(), setGroupSize(), splitAndLowerShuffle(), llvm::RISCVTargetLowering::splitValueIntoRegisterParts(), TryCombineBaseUpdate(), tryCombineShiftImm(), UnpackFromArgumentSlot(), and useRVVForFixedLengthVectorVT().

getStoreSize()

TypeSize llvm::MVT::getStoreSize ( ) const

inline

Return the number of bytes overwritten by a store of the specified value type.

If the value type is a scalable vector type, the scalable property will be set and the runtime size will be a positive integer multiple of the base size.

Definition at line 1076 of file MachineValueType.h.

References llvm::TypeSize::getKnownMinSize(), getSizeInBits(), and llvm::LinearPolySize< LeafTy >::isScalable().

Referenced by llvm::analyzeArguments(), llvm::analyzeReturnValues(), CC_AIX(), CC_MipsO32(), CC_RISCV(), CC_RISCV_FastCC(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::BasicTTIImplBase< AMDGPUTTIImpl >::getInterleavedMemoryOpCost(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX512(), getStoreSizeInBits(), llvm::SITargetLowering::LowerCall(), lowerShuffleAsBroadcast(), lowerV2X128Shuffle(), lowerVECTOR_SHUFFLE(), and scalarizeVectorStore().

getStoreSizeInBits()

TypeSize llvm::MVT::getStoreSizeInBits ( ) const

inline

Return the number of bits overwritten by a store of the specified value type.

If the value type is a scalable vector type, the scalable property will be set and the runtime size will be a positive integer multiple of the base size.

Definition at line 1087 of file MachineValueType.h.

References getStoreSize().

Referenced by llvm::HexagonTargetLowering::LowerCall(), and llvm::HexagonTargetLowering::LowerFormalArguments().

getVectorElementCount()

ElementCount llvm::MVT::getVectorElementCount ( ) const

inline

Definition at line 846 of file MachineValueType.h.

References llvm::LinearPolySize< ElementCount >::get(), getVectorMinNumElements(), and isScalableVector().

Referenced by changeVectorElementType(), changeVectorElementTypeToInteger(), combineMUL_VLToVWMUL(), llvm::TargetLoweringBase::computeRegisterProperties(), llvm::RISCVTargetLowering::decomposeSubvectorInsertExtractToSubRegs(), getCopyToPartsVector(), getDefaultVLOps(), getHalfNumVectorElementsVT(), llvm::getLLTForMVT(), getPow2VectorType(), llvm::TargetLoweringBase::getPreferredVectorAction(), llvm::EVT::getVectorElementCount(), getVectorTypeBreakdownMVT(), llvm::LLT::LLT(), lowerCTLZ_CTTZ_ZERO_UNDEF(), lowerFTRUNC_FCEIL_FFLOOR(), llvm::RISCVTargetLowering::LowerOperation(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::RISCVTargetLowering::RISCVTargetLowering(), and splatPartsI64WithVL().

getVectorElementType()

MVT llvm::MVT::getVectorElementType ( ) const

inline

Definition at line 519 of file MachineValueType.h.

References bf16, f16, f32, f64, i1, i128, i16, i32, i64, i8, llvm_unreachable, nxv16f16, nxv16f32, nxv16i1, nxv16i16, nxv16i32, nxv16i64, nxv16i8, nxv1bf16, nxv1f16, nxv1f32, nxv1f64, nxv1i1, nxv1i16, nxv1i32, nxv1i64, nxv1i8, nxv2bf16, nxv2f16, nxv2f32, nxv2f64, nxv2i1, nxv2i16, nxv2i32, nxv2i64, nxv2i8, nxv32f16, nxv32i1, nxv32i16, nxv32i32, nxv32i64, nxv32i8, nxv4bf16, nxv4f16, nxv4f32, nxv4f64, nxv4i1, nxv4i16, nxv4i32, nxv4i64, nxv4i8, nxv64i1, nxv64i8, nxv8bf16, nxv8f16, nxv8f32, nxv8f64, nxv8i1, nxv8i16, nxv8i32, nxv8i64, nxv8i8, SimpleTy, v1024f32, v1024i1, v1024i32, v1024i8, v128bf16, v128f16, v128f32, v128f64, v128i1, v128i16, v128i32, v128i64, v128i8, v16bf16, v16f16, v16f32, v16f64, v16i1, v16i16, v16i32, v16i64, v16i8, v1f16, v1f32, v1f64, v1i1, v1i128, v1i16, v1i32, v1i64, v1i8, v2048f32, v2048i32, v256f16, v256f32, v256f64, v256i1, v256i16, v256i32, v256i64, v256i8, v2bf16, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32bf16, v32f16, v32f32, v32f64, v32i1, v32i16, v32i32, v32i64, v32i8, v3bf16, v3f16, v3f32, v3f64, v3i16, v3i32, v3i64, v4bf16, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512f16, v512f32, v512i1, v512i16, v512i32, v512i8, v5f32, v5i32, v64bf16, v64f16, v64f32, v64f64, v64i1, v64i16, v64i32, v64i64, v64i8, v6f32, v6i32, v7f32, v7i32, v8bf16, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.

Referenced by changeVectorElementTypeToInteger(), combineBitcast(), combineExtractSubvector(), combineInsertSubvector(), combineRedundantDWordShuffle(), combineShuffleToAddSubOrFMAddSub(), combineTargetShuffle(), llvm::TargetLoweringBase::computeRegisterProperties(), convertShiftLeftToScale(), ExtendToType(), getConstVector(), getContainerForFixedLengthVector(), getHalfNumVectorElementsVT(), llvm::getLLTForMVT(), llvm::RISCVTargetLowering::getLMUL(), getLMUL1VT(), getPow2VectorType(), llvm::HexagonTargetLowering::getPreferredVectorAction(), llvm::X86TargetLowering::getPreferredVectorAction(), llvm::RISCVTargetLowering::getRegClassIDForVecVT(), getScalarType(), getScalarValueForVectorElement(), llvm::X86TargetLowering::getSetCCResultType(), getShuffleScalarElt(), getTargetVShiftByConstNode(), getTargetVShiftNode(), llvm::X86TargetLowering::getTgtMemIntrinsic(), llvm::X86TTIImpl::getTypeBasedIntrinsicInstrCost(), getUnderlyingExtractedFromVec(), llvm::EVT::getVectorElementType(), getVectorTypeBreakdownMVT(), getZeroVector(), incDecVectorConstant(), llvm::HexagonSubtarget::isHVXElementType(), llvm::HexagonSubtarget::isHVXVectorType(), isLegalT2AddressImmediate(), llvm::RISCVTargetLowering::joinRegisterPartsIntoValue(), llvm::LLT::LLT(), LowerANY_EXTEND(), LowerAVXExtend(), LowerBITCAST(), lowerBUILD_VECTOR(), LowerBUILD_VECTORvXi1(), LowerBuildVectorv4x32(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS(), LowerEXTEND_VECTOR_INREG(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR_ELT(), LowerHorizontalByteSum(), LowerIntVSETCC_AVX512(), LowerLoad(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), llvm::RISCVTargetLowering::LowerOperation(), LowerSCALAR_TO_VECTOR(), llvm::HexagonTargetLowering::LowerSETCC(), LowerShiftByScalarVariable(), lowerShuffleAsBitBlend(), lowerShuffleAsBitMask(), lowerShuffleAsBroadcast(), lowerShuffleAsElementInsertion(), lowerShuffleAsTruncBroadcast(), lowerShuffleWithUndefHalf(), lowerShuffleWithVPMOV(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_Mask(), LowerTruncateVecI1(), lowerV2X128Shuffle(), lowerV4X128Shuffle(), lowerV8I16GeneralSingleInputShuffle(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLE(), LowerVectorCTLZ(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTPOP(), LowerVectorCTPOPInRegLUT(), lowerVectorIntrinsicSplats(), llvm::HexagonTargetLowering::LowerVSELECT(), LowerVSETCC(), LowerVSETCCWithSUBUS(), LowerZERO_EXTEND(), LowerZERO_EXTEND_Mask(), narrowExtractedVectorSelect(), performConcatVectorsCombine(), preAssignMask(), llvm::RISCVDAGToDAGISel::PreprocessISelDAG(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::RISCVTargetLowering::RISCVTargetLowering(), scaleVectorType(), splitAndLowerShuffle(), llvm::RISCVTargetLowering::splitValueIntoRegisterParts(), tryExtendDUPToExtractHigh(), and useRVVForFixedLengthVectorVT().

getVectorMinNumElements()

unsigned llvm::MVT::getVectorMinNumElements ( ) const

inline

Given a vector type, return the minimum number of elements it contains.

Definition at line 683 of file MachineValueType.h.

References llvm_unreachable, nxv16f16, nxv16f32, nxv16i1, nxv16i16, nxv16i32, nxv16i64, nxv16i8, nxv1bf16, nxv1f16, nxv1f32, nxv1f64, nxv1i1, nxv1i16, nxv1i32, nxv1i64, nxv1i8, nxv2bf16, nxv2f16, nxv2f32, nxv2f64, nxv2i1, nxv2i16, nxv2i32, nxv2i64, nxv2i8, nxv32f16, nxv32i1, nxv32i16, nxv32i32, nxv32i64, nxv32i8, nxv4bf16, nxv4f16, nxv4f32, nxv4f64, nxv4i1, nxv4i16, nxv4i32, nxv4i64, nxv4i8, nxv64i1, nxv64i8, nxv8bf16, nxv8f16, nxv8f32, nxv8f64, nxv8i1, nxv8i16, nxv8i32, nxv8i64, nxv8i8, SimpleTy, v1024f32, v1024i1, v1024i32, v1024i8, v128bf16, v128f16, v128f32, v128f64, v128i1, v128i16, v128i32, v128i64, v128i8, v16bf16, v16f16, v16f32, v16f64, v16i1, v16i16, v16i32, v16i64, v16i8, v1f16, v1f32, v1f64, v1i1, v1i128, v1i16, v1i32, v1i64, v1i8, v2048f32, v2048i32, v256f16, v256f32, v256f64, v256i1, v256i16, v256i32, v256i64, v256i8, v2bf16, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32bf16, v32f16, v32f32, v32f64, v32i1, v32i16, v32i32, v32i64, v32i8, v3bf16, v3f16, v3f32, v3f64, v3i16, v3i32, v3i64, v4bf16, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512f16, v512f32, v512i1, v512i16, v512i32, v512i8, v5f32, v5i32, v64bf16, v64f16, v64f32, v64f64, v64i1, v64i16, v64i32, v64i64, v64i8, v6f32, v6i32, v7f32, v7i32, v8bf16, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.

Referenced by llvm::HexagonTargetLowering::getPreferredVectorAction(), getVectorElementCount(), getVectorNumElements(), isPow2VectorType(), and llvm::LLT::LLT().

getVectorNumElements()

unsigned llvm::MVT::getVectorNumElements ( ) const

inline

Definition at line 850 of file MachineValueType.h.

References getVectorMinNumElements(), isScalableVector(), and llvm::reportInvalidSizeRequest().

Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), combineBitcast(), combineConcatVectorOps(), combineCVTP2I_CVTTP2I(), combineExtractSubvector(), combineInsertSubvector(), combineMOVMSK(), combinePredicateReduction(), combineSetCCMOVMSK(), combineStore(), combineTargetShuffle(), combineVectorSignBitsTruncation(), combineVEXTRACT_STORE(), combineX86INT_TO_FP(), combineX86ShuffleChain(), llvm::X86TargetLowering::ComputeNumSignBitsForTargetNode(), convertShiftLeftToScale(), createPackShuffleMask(), createShuffleStride(), llvm::createSplat2ShuffleMask(), createVariablePermute(), DecodePALIGNRMask(), ExpandHorizontalBinOp(), ExtendToType(), ExtractBitFromMaskVector(), genShuffleBland(), getAVX512TruncNode(), getConstVector(), getContainerForFixedLengthVector(), getDefaultVLOps(), getFauxShuffleMask(), getGatherNode(), getHopForBuildVector(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX512(), getMemCmpLoad(), getMOVL(), getPack(), llvm::SITargetLowering::getPreferredVectorAction(), llvm::NVPTXTargetLowering::getPreferredVectorAction(), llvm::PPCTargetLowering::getPreferredVectorAction(), llvm::X86TargetLowering::getPreferredVectorAction(), llvm::X86TTIImpl::getReplicationShuffleCost(), getShuffleHalfVectors(), getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), getTargetShuffleAndZeroables(), getTargetShuffleMask(), llvm::ARMTargetLowering::getTgtMemIntrinsic(), llvm::X86TargetLowering::getTgtMemIntrinsic(), getUnderlyingExtractedFromVec(), getVectorMaskingNode(), llvm::EVT::getVectorNumElements(), getZeroVector(), group2Shuffle(), incDecVectorConstant(), insert1BitVector(), InsertBitToMaskVector(), isAddSubOrSubAdd(), IsElementEquivalent(), isHopBuildVector(), isHorizontalBinOp(), llvm::HexagonSubtarget::isHVXVectorType(), lower1BitShuffle(), lower256BitShuffle(), LowerAsSplatVectorLoad(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), lowerBUILD_VECTOR(), lowerBuildVectorAsBroadcast(), LowerBuildVectorAsInsert(), lowerBuildVectorToBitOp(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerEXTRACT_SUBVECTOR(), LowerFunnelShift(), LowerLoad(), LowerMGATHER(), LowerMSCATTER(), LowerMUL(), LowerMULH(), LowerMULO(), LowerRotate(), LowerSCALAR_TO_VECTOR(), llvm::HexagonTargetLowering::LowerSETCC(), LowerShift(), LowerShiftByScalarImmediate(), LowerShiftByScalarVariable(), lowerShuffleAsBlend(), lowerShuffleAsBroadcast(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsElementInsertion(), lowerShuffleAsLanePermuteAndPermute(), lowerShuffleAsRepeatedMaskAndLanePermute(), lowerShuffleAsShift(), lowerShuffleAsSpecificZeroOrAnyExtend(), lowerShuffleAsVTRUNC(), lowerShuffleAsZeroOrAnyExtend(), lowerShuffleOfExtractsAsVperm(), lowerShuffleToEXPAND(), lowerShuffleWithPERMV(), lowerShuffleWithUndefHalf(), lowerShuffleWithVPMOV(), LowerSIGN_EXTEND(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), LowerSIGN_EXTEND_Mask(), LowerToHorizontalOp(), LowerTruncateVecI1(), lowerV8I16GeneralSingleInputShuffle(), lowerVECTOR_SHUFFLE(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOP(), LowerVectorCTPOPInRegLUT(), llvm::HexagonTargetLowering::LowerVSELECT(), LowerVSETCC(), LowervXi8MulWithUNPCK(), LowerZERO_EXTEND_Mask(), matchBinaryShuffle(), matchShuffleAsEXTRQ(), matchShuffleAsINSERTQ(), matchShuffleWithPACK(), matchShuffleWithSHUFPD(), matchShuffleWithUNPCK(), matchUnaryShuffle(), narrowExtractedVectorSelect(), performConcatVectorsCombine(), PerformVECREDUCE_ADDCombine(), performVECTOR_SHUFFLECombine(), llvm::X86TargetLowering::ReplaceNodeResults(), scalarizeVectorStore(), scaleVectorType(), setGroupSize(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), llvm::X86TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(), splitAndLowerShuffle(), tryExtendDUPToExtractHigh(), useRVVForFixedLengthVectorVT(), and vectorizeExtractedCast().

getVectorVT() [1/3]

static MVT llvm::MVT::getVectorVT ( MVT  VT, ElementCount  EC  )

inlinestatic

Definition at line 1397 of file MachineValueType.h.

References getScalableVectorVT(), and getVectorVT().

getVectorVT() [2/3]

static MVT llvm::MVT::getVectorVT ( MVT  VT, unsigned  NumElements  )

inlinestatic

Definition at line 1181 of file MachineValueType.h.

References bf16, f16, f32, f64, i1, i128, i16, i32, i64, i8, INVALID_SIMPLE_VALUE_TYPE, SimpleTy, v1024f32, v1024i1, v1024i32, v1024i8, v128bf16, v128f16, v128f32, v128f64, v128i1, v128i16, v128i32, v128i64, v128i8, v16bf16, v16f16, v16f32, v16f64, v16i1, v16i16, v16i32, v16i64, v16i8, v1f16, v1f32, v1f64, v1i1, v1i128, v1i16, v1i32, v1i64, v1i8, v2048f32, v2048i32, v256f16, v256f32, v256f64, v256i1, v256i16, v256i32, v256i64, v256i8, v2bf16, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32bf16, v32f16, v32f32, v32f64, v32i1, v32i16, v32i32, v32i64, v32i8, v3bf16, v3f16, v3f32, v3f64, v3i16, v3i32, v3i64, v4bf16, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512f16, v512f32, v512i1, v512i16, v512i32, v512i8, v5f32, v5i32, v64bf16, v64f16, v64f32, v64f64, v64i1, v64i16, v64i32, v64i64, v64i8, v6f32, v6i32, v7f32, v7i32, v8bf16, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.

Referenced by AddCombineBUILD_VECTORToVPADDL(), canonicalizeBitSelect(), canonicalizeShuffleMaskWithHorizOp(), changeVectorElementType(), changeVectorElementTypeToInteger(), combineBitcast(), combineConcatVectorOps(), combineCVTP2I_CVTTP2I(), combineExtractWithShuffle(), combineFaddCFmul(), combineMUL_VLToVWMUL(), combineMulToPMADDWD(), combinePredicateReduction(), combineStore(), combineTargetShuffle(), combineVectorHADDSUB(), combineX86INT_TO_FP(), combineX86ShuffleChain(), combineX86ShufflesConstants(), constructDup(), constructRetValue(), createPSADBW(), createVariablePermute(), createVPDPBUSD(), EltsFromConsecutiveLoads(), ExtractBitFromMaskVector(), llvm::X86TTIImpl::getArithmeticInstrCost(), getAVX512Node(), getAVX512TruncNode(), llvm::HvxSelector::getBoolVT(), getBuildDwordsVector(), getConstVector(), getDefaultVLOps(), getGatherNode(), getHalfNumVectorElementsVT(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX512(), getMaskNode(), llvm::getMVTForLLT(), getOnesVector(), llvm::HvxSelector::getPairVT(), getPermuteNode(), getPow2VectorType(), getPrefetchNode(), getPromotedVectorElementType(), getScatterNode(), llvm::ARMTargetLowering::getSetCCResultType(), llvm::HvxSelector::getSingleVT(), getTargetVShiftNode(), llvm::ARMTargetLowering::getTgtMemIntrinsic(), llvm::X86TargetLowering::getTgtMemIntrinsic(), getVectorMaskingNode(), getVectorTypeBreakdownMVT(), llvm::EVT::getVectorVT(), getVectorVT(), getVT(), getZeroVector(), llvm::HexagonTargetLowering::HexagonTargetLowering(), InsertBitToMaskVector(), is128BitUnpackShuffleMask(), llvm::HexagonSubtarget::isTypeForHVX(), llvm::SystemZVectorConstantInfo::isVectorConstantLegal(), lower1BitShuffle(), lower256BitShuffle(), LowerBITCAST(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), llvm::VETargetLowering::lowerBUILD_VECTOR(), lowerBUILD_VECTOR(), lowerBuildVectorAsBroadcast(), LowerCONCAT_VECTORS_i1(), lowerCTLZ_CTTZ_ZERO_UNDEF(), LowerCTPOP(), LowerEXTRACT_SUBVECTOR(), lowerFPToIntToFP(), lowerFTRUNC_FCEIL_FFLOOR(), LowerFunnelShift(), LowerHorizontalByteSum(), LowerI64IntToFP_AVX512DQ(), LowerINTRINSIC_W_CHAIN(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), LowerMSTORE(), LowerMUL(), LowerMULH(), LowerMULO(), llvm::RISCVTargetLowering::LowerOperation(), LowerRotate(), LowerSCALAR_TO_VECTOR(), llvm::HexagonTargetLowering::LowerSETCC(), LowerShift(), LowerShiftByScalarImmediate(), LowerShiftByScalarVariable(), lowerShuffleAsBitMask(), lowerShuffleAsBlend(), lowerShuffleAsBlendOfPSHUFBs(), lowerShuffleAsBroadcast(), lowerShuffleAsByteRotate(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsElementInsertion(), lowerShuffleAsPermuteAndUnpack(), lowerShuffleAsSpecificZeroOrAnyExtend(), lowerShuffleAsVTRUNC(), lowerShuffleToEXPAND(), lowerShuffleWithPACK(), lowerShuffleWithPSHUFB(), LowerSIGN_EXTEND_Mask(), LowerStore(), LowerTruncateVecI1(), llvm::HexagonTargetLowering::LowerUnalignedLoad(), lowerV2X128Shuffle(), lowerV4X128Shuffle(), lowerV8I16GeneralSingleInputShuffle(), lowerVECTOR_SHUFFLE(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOP(), llvm::HexagonTargetLowering::LowerVSELECT(), LowervXi8MulWithUNPCK(), lowerX86FPLogicOp(), LowerZERO_EXTEND_Mask(), matchBinaryPermuteShuffle(), matchShuffleAsBitRotate(), matchShuffleAsShift(), matchShuffleAsVTRUNC(), matchShuffleWithPACK(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), llvm::MipsTargetLowering::MipsTargetLowering(), narrowExtractedVectorSelect(), NarrowVector(), performConcatVectorsCombine(), llvm::RISCVTargetLowering::PerformDAGCombine(), PerformVQDMULHCombine(), llvm::RISCVTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::RISCVTargetLowering::RISCVTargetLowering(), scaleVectorType(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), splatPartsI64WithVL(), splitAndLowerShuffle(), TryCombineBaseUpdate(), tryExtendDUPToExtractHigh(), tryWidenMaskForShuffle(), vectorizeExtractedCast(), widenSubVector(), and WidenVector().

getVectorVT() [3/3]

static MVT llvm::MVT::getVectorVT ( MVT  VT, unsigned  NumElements, bool  IsScalable  )

inlinestatic

Definition at line 1391 of file MachineValueType.h.

References getScalableVectorVT(), and getVectorVT().

getVT()

MVT MVT::getVT ( Type *  Ty, bool  HandleUnknown = false  )

static

Return the value type corresponding to the specified type.

This returns all pointers as iPTR. If HandleUnknown is true, unknown types are returned as Other, otherwise they are invalid.

This returns all pointers as MVT::iPTR. If HandleUnknown is true, unknown types are returned as Other, otherwise they are invalid.

Definition at line 528 of file ValueTypes.cpp.

References bf16, llvm::Type::BFloatTyID, llvm::Type::DoubleTyID, f128, f16, f32, f64, f80, llvm::Type::FixedVectorTyID, llvm::Type::FloatTyID, llvm::Type::FP128TyID, getBitWidth(), llvm::VectorType::getElementCount(), llvm::VectorType::getElementType(), getIntegerVT(), llvm::Type::getTypeID(), getVectorVT(), llvm::Type::HalfTyID, llvm::Type::IntegerTyID, iPTR, isVoid, llvm_unreachable, MVT(), Other, llvm::Type::PointerTyID, llvm::Type::PPC_FP128TyID, ppcf128, llvm::Type::ScalableVectorTyID, llvm::Type::VoidTyID, llvm::Type::X86_AMXTyID, llvm::Type::X86_FP80TyID, llvm::Type::X86_MMXTyID, x86amx, and x86mmx.

Referenced by llvm::CallLowering::checkReturn(), getConvRTLibDesc(), llvm::EVT::getEVT(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX512(), llvm::HexagonTargetLowering::getTgtMemIntrinsic(), llvm::SITargetLowering::getTgtMemIntrinsic(), llvm::RISCVTargetLowering::getTgtMemIntrinsic(), llvm::AArch64TargetLowering::getTgtMemIntrinsic(), llvm::ARMTargetLowering::getTgtMemIntrinsic(), llvm::X86TargetLowering::getTgtMemIntrinsic(), llvm::AArch64CallLowering::lowerReturn(), and llvm::TargetLowering::ParseConstraints().

integer_fixedlen_vector_valuetypes()

static auto llvm::MVT::integer_fixedlen_vector_valuetypes ( )

inlinestatic

Definition at line 1445 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AMDGPUTargetLowering::AMDGPUTargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::RISCVTargetLowering::RISCVTargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), and llvm::WebAssemblyTargetLowering::WebAssemblyTargetLowering().

integer_scalable_vector_valuetypes()

static auto llvm::MVT::integer_scalable_vector_valuetypes ( )

inlinestatic

Definition at line 1457 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE.

Referenced by llvm::RISCVTargetLowering::RISCVTargetLowering().

integer_valuetypes()

static auto llvm::MVT::integer_valuetypes ( )

inlinestatic

Definition at line 1416 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_INTEGER_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_INTEGER_VALUETYPE.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AMDGPUTargetLowering::AMDGPUTargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::AVRTargetLowering::AVRTargetLowering(), llvm::BPFTargetLowering::BPFTargetLowering(), findMemType(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::LanaiTargetLowering::LanaiTargetLowering(), llvm::M68kTargetLowering::M68kTargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::MSP430TargetLowering::MSP430TargetLowering(), llvm::NVPTXTargetLowering::NVPTXTargetLowering(), PerformTruncatingStoreCombine(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::R600TargetLowering::R600TargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), llvm::WebAssemblyTargetLowering::WebAssemblyTargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

is1024BitVector()

bool llvm::MVT::is1024BitVector ( ) const

inline

Return true if this is a 1024-bit vector type.

Definition at line 434 of file MachineValueType.h.

References SimpleTy, v1024i1, v128i8, v16f64, v16i64, v32f32, v32i32, v64bf16, v64f16, and v64i16.

Referenced by llvm::EVT::is1024BitVector().

is128BitVector()

bool llvm::MVT::is128BitVector ( ) const

inline

Return true if this is a 128-bit vector type.

Definition at line 407 of file MachineValueType.h.

References SimpleTy, v128i1, v16i8, v1i128, v2f64, v2i64, v4f32, v4i32, v8bf16, v8f16, and v8i16.

Referenced by CC_AArch64_Custom_Block(), llvm::CC_XPLINK64_Shadow_Reg(), combineAndNotIntoANDNP(), combineCVTP2I_CVTTP2I(), combineExtractSubvector(), combineSetCCMOVMSK(), combineX86INT_TO_FP(), combineX86ShuffleChain(), llvm::X86TTIImpl::getCmpSelInstrCost(), llvm::X86TTIImpl::getTypeBasedIntrinsicInstrCost(), getZeroVector(), llvm::EVT::is128BitVector(), isHorizontalBinOp(), LowerBITREVERSE_XOP(), lowerBuildVectorAsBroadcast(), LowerBuildVectorv4x32(), LowerEXTEND_VECTOR_INREG(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerRotate(), LowerSCALAR_TO_VECTOR(), lowerShuffleAsBitRotate(), lowerShuffleAsByteRotate(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsByteShiftMask(), lowerShuffleAsElementInsertion(), lowerShuffleAsPermuteAndUnpack(), lowerShuffleAsSpecificZeroOrAnyExtend(), lowerShuffleAsVALIGN(), lowerShuffleAsVTRUNC(), lowerShuffleOfExtractsAsVperm(), lowerShuffleWithPSHUFB(), lowerShuffleWithUndefHalf(), LowerTruncateVecI1(), lowerVECTOR_SHUFFLE(), LowerVectorCTPOP(), LowerVSETCC(), matchBinaryPermuteShuffle(), matchBinaryShuffle(), matchShuffleAsInsertPS(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), narrowExtractedVectorSelect(), performAddSubLongCombine(), performVECTOR_SHUFFLECombine(), scalarizeVectorStore(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), supportedVectorShiftWithImm(), and supportedVectorVarShift().

is16BitVector()

bool llvm::MVT::is16BitVector ( ) const

inline

Return true if this is a 16-bit vector type.

Definition at line 384 of file MachineValueType.h.

References SimpleTy, v16i1, v1f16, v1i16, and v2i8.

Referenced by llvm::EVT::is16BitVector().

is2048BitVector()

bool llvm::MVT::is2048BitVector ( ) const

inline

Return true if this is a 2048-bit vector type.

Definition at line 443 of file MachineValueType.h.

References SimpleTy, v128bf16, v128f16, v128i16, v256i8, v32f64, v32i64, v64f32, and v64i32.

Referenced by llvm::EVT::is2048BitVector().

is256BitVector()

bool llvm::MVT::is256BitVector ( ) const

inline

Return true if this is a 256-bit vector type.

Definition at line 416 of file MachineValueType.h.

References SimpleTy, v16bf16, v16f16, v16i16, v256i1, v32i8, v4f64, v4i64, v8f32, and v8i32.

Referenced by CC_X86_VectorCallGetSSEs(), combineAndNotIntoANDNP(), combineConcatVectorOps(), combineExtractSubvector(), combineSetCCMOVMSK(), combineVectorSignBitsTruncation(), combineX86ShuffleChain(), ExpandHorizontalBinOp(), getHopForBuildVector(), llvm::X86TTIImpl::getTypeBasedIntrinsicInstrCost(), getZeroVector(), llvm::EVT::is256BitVector(), isHopBuildVector(), isHorizontalBinOp(), LowerABS(), LowerADDSAT_SUBSAT(), LowerAVXCONCAT_VECTORS(), LowerBITREVERSE_XOP(), lowerBuildVectorAsBroadcast(), LowerCONCAT_VECTORS(), LowerEXTEND_VECTOR_INREG(), LowerFunnelShift(), LowerMINMAX(), LowerMUL(), LowerMULH(), LowerRotate(), LowerShift(), lowerShuffleAsBroadcast(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsLanePermuteAndShuffle(), lowerShuffleAsRepeatedMaskAndLanePermute(), lowerShuffleAsVALIGN(), lowerShuffleAsVTRUNC(), lowerShuffleOfExtractsAsVperm(), lowerShuffleWithPSHUFB(), lowerShuffleWithUndefHalf(), LowerStore(), LowerToHorizontalOp(), LowerTruncateVecI1(), lowerVECTOR_SHUFFLE(), LowerVectorCTLZ(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTPOP(), LowerVSETCC(), matchBinaryPermuteShuffle(), matchBinaryShuffle(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), narrowExtractedVectorSelect(), narrowShuffle(), supportedVectorShiftWithImm(), and supportedVectorVarShift().

is32BitVector()

bool llvm::MVT::is32BitVector ( ) const

inline

Return true if this is a 32-bit vector type.

Definition at line 390 of file MachineValueType.h.

References SimpleTy, v1f32, v1i32, v2bf16, v2f16, v2i16, v32i1, and v4i8.

Referenced by CC_AArch64_Custom_Block(), and llvm::EVT::is32BitVector().

is512BitVector()

bool llvm::MVT::is512BitVector ( ) const

inline

Return true if this is a 512-bit vector type.

Definition at line 425 of file MachineValueType.h.

References SimpleTy, v16f32, v16i32, v32bf16, v32f16, v32i16, v512i1, v64i8, v8f64, and v8i64.

Referenced by CC_X86_VectorCallGetSSEs(), combineAndNotIntoANDNP(), combineConcatVectorOps(), combineShuffleToAddSubOrFMAddSub(), combineVectorSignBitsTruncation(), combineX86ShuffleChain(), getAVX512Node(), getAVX512TruncNode(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getTypeBasedIntrinsicInstrCost(), getZeroVector(), llvm::EVT::is512BitVector(), LowerAVXCONCAT_VECTORS(), LowerBITREVERSE(), lowerBuildVectorAsBroadcast(), LowerCONCAT_VECTORS(), LowerEXTEND_VECTOR_INREG(), LowerFunnelShift(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), LowerMSTORE(), LowerRotate(), LowerShift(), LowerShiftByScalarImmediate(), lowerShuffleAsBroadcast(), lowerShuffleAsByteRotate(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleWithPERMV(), lowerShuffleWithPSHUFB(), lowerShuffleWithUndefHalf(), LowerSIGN_EXTEND_Mask(), lowerToAddSubOrFMAddSub(), lowerV4X128Shuffle(), lowerVECTOR_SHUFFLE(), LowerVectorCTLZ(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTPOP(), LowerVSETCC(), LowerZERO_EXTEND_Mask(), matchBinaryPermuteShuffle(), matchBinaryShuffle(), matchShuffleAsVTRUNC(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), narrowExtractedVectorSelect(), narrowShuffle(), supportedVectorShiftWithImm(), supportedVectorVarShift(), and useVPTERNLOG().

is64BitVector()

bool llvm::MVT::is64BitVector ( ) const

inline

Return true if this is a 64-bit vector type.

Definition at line 398 of file MachineValueType.h.

References SimpleTy, v1f64, v1i64, v2f32, v2i32, v4bf16, v4f16, v4i16, v64i1, and v8i8.

Referenced by CC_AArch64_Custom_Block(), llvm::EVT::is64BitVector(), and tryExtendDUPToExtractHigh().

isByteSized()

bool llvm::MVT::isByteSized ( ) const

inline

Returns true if the number of bits for the type is a multiple of an 8-bit byte.

Definition at line 1093 of file MachineValueType.h.

References getSizeInBits(), and llvm::LinearPolySize< LeafTy >::isKnownMultipleOf().

isFixedLengthVector()

bool llvm::MVT::isFixedLengthVector ( ) const

inline

Definition at line 378 of file MachineValueType.h.

References FIRST_FIXEDLEN_VECTOR_VALUETYPE, LAST_FIXEDLEN_VECTOR_VALUETYPE, and SimpleTy.

Referenced by CC_RISCV(), CC_RISCV_FastCC(), convertLocVTToValVT(), convertValVTToLocVT(), getContainerForFixedLengthVector(), getDefaultVLOps(), getRVVFPExtendOrRound(), llvm::EVT::isFixedLengthVector(), lowerBUILD_VECTOR(), llvm::RISCVTargetLowering::LowerOperation(), lowerSPLAT_VECTOR(), llvm::RISCVTargetLowering::ReplaceNodeResults(), and useRVVForFixedLengthVectorVT().

isFloatingPoint()

bool llvm::MVT::isFloatingPoint ( ) const

inline

Return true if this is a FP or a vector FP type.

Definition at line 340 of file MachineValueType.h.

References FIRST_FP_FIXEDLEN_VECTOR_VALUETYPE, FIRST_FP_SCALABLE_VECTOR_VALUETYPE, FIRST_FP_VALUETYPE, LAST_FP_FIXEDLEN_VECTOR_VALUETYPE, LAST_FP_SCALABLE_VECTOR_VALUETYPE, LAST_FP_VALUETYPE, and SimpleTy.

Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), CC_MipsO32(), CC_RISCV(), CC_X86_32_VectorCall(), CC_X86_64_VectorCall(), combineConcatVectorOps(), combineTargetShuffle(), combineX86ShuffleChain(), combineX86ShufflesConstants(), EltsFromConsecutiveLoads(), getConstantVector(), getCopyFromParts(), getCopyToParts(), getTargetShuffleAndZeroables(), llvm::TargetLoweringBase::getTypeToPromoteTo(), getVCmpInst(), getZeroVector(), isAddSubOrSubAdd(), llvm::EVT::isFloatingPoint(), isHorizontalBinOp(), lowerBUILD_VECTOR(), LowerFABSorFNEG(), LowerFCOPYSIGN(), lowerScalarSplat(), lowerShuffleAsBroadcast(), lowerShuffleAsElementInsertion(), lowerShuffleAsLanePermuteAndShuffle(), lowerShuffleAsPermuteAndUnpack(), lowerSPLAT_VECTOR(), lowerVECTOR_SHUFFLE(), LowerVSETCC(), and performScatterStoreCombine().

isInteger()

bool llvm::MVT::isInteger ( ) const

inline

Return true if this is an integer or a vector integer type.

Definition at line 350 of file MachineValueType.h.

References FIRST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE, FIRST_INTEGER_SCALABLE_VECTOR_VALUETYPE, FIRST_INTEGER_VALUETYPE, LAST_INTEGER_FIXEDLEN_VECTOR_VALUETYPE, LAST_INTEGER_SCALABLE_VECTOR_VALUETYPE, LAST_INTEGER_VALUETYPE, and SimpleTy.

Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), convertLocVTToValVT(), convertValVTToLocVT(), llvm::TargetLowering::findOptimalMemOpLowering(), getCopyFromParts(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getRegistersForValue(), llvm::X86TTIImpl::getScalarizationOverhead(), getShuffleScalarElt(), llvm::TargetLoweringBase::getTypeToPromoteTo(), llvm::EVT::isInteger(), isValueTypeInRegForCC(), llvm::TargetLowering::LegalizeSetCCCondCode(), lower256BitShuffle(), LowerABS(), llvm::X86TargetLowering::LowerAsmOutputForConstraint(), lowerBUILD_VECTOR(), LowerLoad(), llvm::RISCVTargetLowering::LowerOperation(), LowerSCALAR_TO_VECTOR(), lowerShuffleAsBitBlend(), lowerShuffleAsBroadcast(), lowerShuffleAsTruncBroadcast(), LowerStore(), lowerVECTOR_SHUFFLE(), matchUnaryShuffle(), and llvm::TargetLowering::ParseConstraints().

isOverloaded()

bool llvm::MVT::isOverloaded ( ) const

inline

Return true if this is an overloaded type for TableGen.

Definition at line 451 of file MachineValueType.h.

References Any, fAny, iAny, iPTRAny, SimpleTy, and vAny.

isPow2VectorType()

bool llvm::MVT::isPow2VectorType ( ) const

inline

Returns true if the given vector is a power of 2.

Definition at line 497 of file MachineValueType.h.

References getVectorMinNumElements().

Referenced by getPow2VectorType(), llvm::SITargetLowering::getPreferredVectorAction(), llvm::TargetLoweringBase::getPreferredVectorAction(), and useRVVForFixedLengthVectorVT().

isScalableVector()

bool llvm::MVT::isScalableVector ( ) const

inline

Return true if this is a vector value type where the runtime length is machine dependent.

Definition at line 373 of file MachineValueType.h.

References FIRST_SCALABLE_VECTOR_VALUETYPE, LAST_SCALABLE_VECTOR_VALUETYPE, and SimpleTy.

Referenced by bitsGE(), bitsGT(), bitsLE(), bitsLT(), CC_AArch64_Custom_Block(), CC_RISCV(), llvm::TargetLoweringBase::computeRegisterProperties(), convertLocVTToValVT(), finishStackBlock(), getDefaultScalableVLOps(), getDefaultVLOps(), llvm::RISCVTargetLowering::getLMUL(), llvm::HexagonTargetLowering::getPreferredVectorAction(), llvm::SITargetLowering::getPreferredVectorAction(), llvm::NVPTXTargetLowering::getPreferredVectorAction(), llvm::PPCTargetLowering::getPreferredVectorAction(), llvm::X86TargetLowering::getPreferredVectorAction(), getRVVFPExtendOrRound(), getVectorElementCount(), getVectorNumElements(), getVectorTypeBreakdownMVT(), llvm::HexagonSubtarget::isHVXVectorType(), llvm::EVT::isScalableVector(), llvm::RISCVTargetLowering::joinRegisterPartsIntoValue(), llvm::RISCVTargetLowering::LowerFormalArguments(), llvm::RISCVDAGToDAGISel::PreprocessISelDAG(), and llvm::RISCVTargetLowering::splitValueIntoRegisterParts().

isScalarInteger()

bool llvm::MVT::isScalarInteger ( ) const

inline

Return true if this is an integer, not including vectors.

Definition at line 360 of file MachineValueType.h.

References FIRST_INTEGER_VALUETYPE, LAST_INTEGER_VALUETYPE, and SimpleTy.

Referenced by CC_RISCV(), hasBZHI(), llvm::EVT::isScalarInteger(), LowerBITCAST(), llvm::HexagonTargetLowering::LowerSETCC(), lowerVectorIntrinsicSplats(), llvm::HexagonTargetLowering::LowerVSELECT(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), and truncateScalarIntegerArg().

isValid()

bool llvm::MVT::isValid ( ) const

inline

Return true if this is a valid simple valuetype.

Definition at line 334 of file MachineValueType.h.

References FIRST_VALUETYPE, LAST_VALUETYPE, and SimpleTy.

Referenced by llvm::TargetLoweringBase::initActions(), llvm::HexagonSubtarget::isTypeForHVX(), llvm::LLT::LLT(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::TargetLoweringBase::setCondCodeAction(), llvm::TargetLoweringBase::setLoadExtAction(), and llvm::TargetLoweringBase::setTruncStoreAction().

isVector()

bool llvm::MVT::isVector ( ) const

inline

Return true if this is a vector value type.

Definition at line 366 of file MachineValueType.h.

References FIRST_VECTOR_VALUETYPE, LAST_VECTOR_VALUETYPE, and SimpleTy.

Referenced by llvm::PPCTargetLowering::allowsMisalignedMemoryAccesses(), llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), canonicalizeBitSelect(), CC_RISCV(), CC_RISCV_FastCC(), CC_X86_32_VectorCall(), CC_X86_64_VectorCall(), changeTypeToInteger(), combineAndnp(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), constructRetValue(), convertLocVTToValVT(), convertValVTToLocVT(), getAVX512Node(), llvm::X86TTIImpl::getCmpSelInstrCost(), getCopyFromParts(), getCopyToPartsVector(), llvm::X86TTIImpl::getInterleavedMemoryOpCost(), llvm::getLLTForMVT(), getMemCmpLoad(), llvm::RISCVTargetLowering::getRegForInlineAsmConstraint(), llvm::PPCTargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::X86TTIImpl::getReplicationShuffleCost(), getScalarType(), getScalarValueForVectorElement(), llvm::X86TargetLowering::getSetCCResultType(), llvm::CallLowering::ValueHandler::getStackValueStoreType(), llvm::X86TTIImpl::getTypeBasedIntrinsicInstrCost(), llvm::HexagonSubtarget::isHVXElementType(), llvm::HexagonSubtarget::isHVXVectorType(), isValueTypeInRegForCC(), llvm::EVT::isVector(), llvm::LLT::LLT(), LowerADDSAT_SUBSAT(), llvm::X86TargetLowering::LowerAsmOutputForConstraint(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE_XOP(), llvm::RISCVTargetLowering::LowerCall(), LowerCTLZ(), LowerCTTZ(), LowerFABSorFNEG(), LowerFCOPYSIGN(), llvm::RISCVTargetLowering::LowerFormalArguments(), lowerFPToIntToFP(), lowerFTRUNC_FCEIL_FFLOOR(), LowerFunnelShift(), LowerLoad(), LowerMULO(), llvm::RISCVTargetLowering::LowerOperation(), llvm::AArch64CallLowering::lowerReturn(), LowerRotate(), llvm::HexagonTargetLowering::LowerSETCC(), LowerShift(), lowerShuffleAsTruncBroadcast(), LowerSIGN_EXTEND(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), LowerStore(), lowerX86FPLogicOp(), performConcatVectorsCombine(), preAssignMask(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), llvm::X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(), and VerifyVectorType().

knownBitsGE()

bool llvm::MVT::knownBitsGE ( MVT  VT ) const

inline

Return true if we know at compile time this has more than or the same bits as VT.

Definition at line 1102 of file MachineValueType.h.

References getSizeInBits(), and llvm::LinearPolySize< TypeSize >::isKnownGE().

Referenced by bitsGE().

knownBitsGT()

bool llvm::MVT::knownBitsGT ( MVT  VT ) const

inline

Return true if we know at compile time this has more bits than VT.

Definition at line 1096 of file MachineValueType.h.

References getSizeInBits(), and llvm::LinearPolySize< TypeSize >::isKnownGT().

Referenced by bitsGT().

knownBitsLE()

bool llvm::MVT::knownBitsLE ( MVT  VT ) const

inline

Return true if we know at compile time this has fewer than or the same bits as VT.

Definition at line 1113 of file MachineValueType.h.

References getSizeInBits(), and llvm::LinearPolySize< TypeSize >::isKnownLE().

Referenced by bitsLE().

knownBitsLT()

bool llvm::MVT::knownBitsLT ( MVT  VT ) const

inline

Return true if we know at compile time this has fewer bits than VT.

Definition at line 1107 of file MachineValueType.h.

References getSizeInBits(), and llvm::LinearPolySize< TypeSize >::isKnownLT().

Referenced by bitsLT().

operator!=()

bool llvm::MVT::operator!= ( const MVT &  S ) const

inline

Definition at line 329 of file MachineValueType.h.

References S, and SimpleTy.

operator<()

bool llvm::MVT::operator< ( const MVT &  S ) const

inline

Definition at line 327 of file MachineValueType.h.

References S, and SimpleTy.

operator<=()

bool llvm::MVT::operator<= ( const MVT &  S ) const

inline

Definition at line 331 of file MachineValueType.h.

References S, and SimpleTy.

operator==()

bool llvm::MVT::operator== ( const MVT &  S ) const

inline

Definition at line 328 of file MachineValueType.h.

References S, and SimpleTy.

operator>()

bool llvm::MVT::operator> ( const MVT &  S ) const

inline

Definition at line 326 of file MachineValueType.h.

References S, and SimpleTy.

operator>=()

bool llvm::MVT::operator>= ( const MVT &  S ) const

inline

Definition at line 330 of file MachineValueType.h.

References S, and SimpleTy.

scalable_vector_valuetypes()

static auto llvm::MVT::scalable_vector_valuetypes ( )

inlinestatic

Definition at line 1439 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_SCALABLE_VECTOR_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_SCALABLE_VECTOR_VALUETYPE.

vector_valuetypes()

static auto llvm::MVT::vector_valuetypes ( )

inlinestatic

Definition at line 1427 of file MachineValueType.h.

References llvm::enum_seq_inclusive(), FIRST_VECTOR_VALUETYPE, llvm::force_iteration_on_noniterable_enum, and LAST_VECTOR_VALUETYPE.

Referenced by findMemType().

Member Data Documentation

SimpleTy

SimpleValueType llvm::MVT::SimpleTy = INVALID_SIMPLE_VALUE_TYPE

Definition at line 321 of file MachineValueType.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), llvm::TargetLoweringBase::AddPromotedToType(), llvm::TargetLoweringBase::addRegisterClass(), llvm::MipsSETargetLowering::allowsMisalignedMemoryAccesses(), llvm::ARMTargetLowering::allowsMisalignedMemoryAccesses(), llvm::AVRDAGToDAGISel::select< ISD::LOAD >(), CC_AArch64_Custom_Block(), CC_AIX(), CC_ARM_AAPCS_Custom_Aggregate(), llvm::CC_XPLINK64_Shadow_Stack(), changeVectorElementType(), changeVectorElementTypeToInteger(), combineBitcastvxi1(), createVariablePermute(), llvm::SITargetLowering::denormalsEnabledForType(), llvm::SelectionDAG::EVTToAPFloatSemantics(), llvm::TargetLowering::expandBSWAP(), llvm::TargetLowering::findOptimalMemOpLowering(), llvm::ARMTargetLowering::findRepresentativeClass(), llvm::X86TargetLowering::findRepresentativeClass(), llvm::TargetLoweringBase::findRepresentativeClass(), foldVectorXorShiftIntoCmp(), llvm::R600RegisterInfo::getCFGStructurizerRegClass(), llvm::TargetLoweringBase::getCondCodeAction(), getContainerForFixedLengthVector(), llvm::EVT::getEVTString(), getExtensionTo64Bits(), getImplicitScaleFactor(), llvm::TargetLoweringBase::getLoadExtAction(), llvm::TargetLoweringBase::getNumRegisters(), llvm::TargetLoweringBase::getOperationAction(), llvm::RTLIB::getOUTLINE_ATOMIC(), getPackedSVEVectorVT(), getPredicateForFixedLengthVector(), llvm::EVT::getRawBits(), llvm::TargetLoweringBase::getRegClassFor(), llvm::M68kTargetLowering::getRegForInlineAsmConstraint(), llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), llvm::RISCVTargetLowering::getRegForInlineAsmConstraint(), llvm::SITargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::TargetLoweringBase::getRegisterType(), llvm::TargetLoweringBase::getRepRegClassCostFor(), llvm::TargetLoweringBase::getRepRegClassFor(), getScalableVectorVT(), llvm::TargetLoweringBase::getSetCCResultType(), getSizeInBits(), getSVEContainerType(), llvm::TargetLoweringBase::getTruncStoreAction(), llvm::TargetLoweringBase::ValueTypeActionImpl::getTypeAction(), llvm::EVT::getTypeForEVT(), llvm::TargetLoweringBase::getTypeToPromoteTo(), llvm::SelectionDAG::getValueType(), getVectorElementType(), getVectorMinNumElements(), getVectorTyFromPredicateVector(), getVectorVT(), getVPTESTMOpc(), is1024BitVector(), is128BitVector(), is16BitVector(), is2048BitVector(), is256BitVector(), is32Bit(), is32BitVector(), is512BitVector(), is64BitVector(), isConstantSplatVectorMaskForType(), isFixedLengthVector(), isFloatingPoint(), llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::RISCVTargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::SystemZTargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::AArch64TargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::X86TargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::ARMTargetLowering::isFNegFree(), llvm::PPCTargetLowering::isFPImmLegal(), isInteger(), isLegalAddressImmediate(), llvm::ARMTargetLowering::isLegalAddressingMode(), isLegalT1AddressImmediate(), isLegalT2AddressImmediate(), llvm::ARMTargetLowering::isLegalT2ScaledAddressingMode(), isOverloaded(), IsPTXVectorType(), isScalableVector(), isScalarInteger(), llvm::EVT::isSimple(), llvm::TargetLoweringBase::isTypeLegal(), isValid(), llvm::HexagonInstrInfo::isValidAutoIncImm(), isValidIndexedLoad(), isVector(), llvm::XCoreTargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::X86TargetLowering::isZExtFree(), lower128BitShuffle(), lower1BitShuffle(), lower256BitShuffle(), lower512BitShuffle(), LowerADDSUBSAT(), llvm::SystemZTargetLowering::LowerFormalArguments(), lowerRegToMasks(), lowerShuffleAsBlend(), lowerUINT_TO_FP_vec(), llvm::EVT::operator!=(), operator!=(), llvm::EVT::compareRawBits::operator()(), operator<(), operator<=(), operator==(), operator>(), operator>=(), performVSelectCombine(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::AVRDAGToDAGISel::selectIndexedLoad(), llvm::HexagonDAGToDAGISel::SelectIndexedLoad(), llvm::AVRDAGToDAGISel::selectIndexedProgMemLoad(), llvm::HexagonDAGToDAGISel::SelectIndexedStore(), llvm::TargetLoweringBase::setCondCodeAction(), llvm::TargetLoweringBase::setLoadExtAction(), llvm::TargetLoweringBase::setOperationAction(), llvm::TargetLoweringBase::setTruncStoreAction(), llvm::TargetLoweringBase::ValueTypeActionImpl::setTypeAction(), llvm::RISCVTargetLowering::shouldConvertFpToSat(), llvm::ARMTargetLowering::shouldConvertFpToSat(), llvm::X86InstrInfo::shouldScheduleLoadsNear(), unpackFromRegLoc(), usePartialVectorLoads(), useRVVForFixedLengthVectorVT(), X86ChooseCmpImmediateOpcode(), and X86ChooseCmpOpcode().

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The documentation for this class was generated from the following files:

• include/llvm/Support/MachineValueType.h
• lib/CodeGen/ValueTypes.cpp