LLVM 19.0.0git
Classes | Namespaces | Macros | Enumerations | Functions | Variables
X86Disassembler.cpp File Reference
#include "MCTargetDesc/X86BaseInfo.h"
#include "MCTargetDesc/X86MCTargetDesc.h"
#include "TargetInfo/X86TargetInfo.h"
#include "X86DisassemblerDecoder.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Format.h"
#include "llvm/Support/raw_ostream.h"
#include "X86GenDisassemblerTables.inc"

Go to the source code of this file.

Classes

struct  ModRMDecision
 
struct  OpcodeDecision
 
struct  ContextDecision
 

Namespaces

namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.
 
namespace  llvm::X86
 Define some predicates that are used for node matching.
 

Macros

#define DEBUG_TYPE   "x86-disassembler"
 
#define debug(s)   LLVM_DEBUG(dbgs() << __LINE__ << ": " << s);
 
#define GENERIC_FIXUP_FUNC(name, base, prefix)
 
#define ENTRY(x)   X86::x,
 
#define ENTRY(x)   case EA_BASE_##x:
 
#define ENTRY(x)
 
#define ENTRY(x)
 
#define ENTRY(x)
 
#define ENTRY(x)
 
#define ENTRY(x)   case EA_REG_##x:
 

Enumerations

enum  {
  llvm::X86::BX_SI = 500 , llvm::X86::BX_DI = 501 , llvm::X86::BP_SI = 502 , llvm::X86::BP_DI = 503 ,
  llvm::X86::sib = 504 , llvm::X86::sib64 = 505
}
 

Functions

static InstrUID decode (OpcodeType type, InstructionContext insnContext, uint8_t opcode, uint8_t modRM)
 
static bool peek (struct InternalInstruction *insn, uint8_t &byte)
 
template<typename T >
static bool consume (InternalInstruction *insn, T &ptr)
 
static bool isREX (struct InternalInstruction *insn, uint8_t prefix)
 
static bool isREX2 (struct InternalInstruction *insn, uint8_t prefix)
 
static int readPrefixes (struct InternalInstruction *insn)
 
static int readSIB (struct InternalInstruction *insn)
 
static int readDisplacement (struct InternalInstruction *insn)
 
static int readModRM (struct InternalInstruction *insn)
 
static int fixupReg (struct InternalInstruction *insn, const struct OperandSpecifier *op)
 
static bool readOpcode (struct InternalInstruction *insn)
 
static bool is16BitEquivalent (const char *orig, const char *equiv)
 
static bool is64Bit (const char *name)
 
static int getInstructionIDWithAttrMask (uint16_t *instructionID, struct InternalInstruction *insn, uint16_t attrMask)
 
static bool isNF (InternalInstruction *insn)
 
static int getInstructionID (struct InternalInstruction *insn, const MCInstrInfo *mii)
 
static int readOpcodeRegister (struct InternalInstruction *insn, uint8_t size)
 
static int readImmediate (struct InternalInstruction *insn, uint8_t size)
 
static int readVVVV (struct InternalInstruction *insn)
 
static int readMaskRegister (struct InternalInstruction *insn)
 
static int readOperands (struct InternalInstruction *insn)
 
static bool translateInstruction (MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis)
 translateInstruction - Translates an internal instruction and all its operands to an MCInst.
 
static void translateRegister (MCInst &mcInst, Reg reg)
 translateRegister - Translates an internal register to the appropriate LLVM register, and appends it as an operand to an MCInst.
 
static bool translateSrcIndex (MCInst &mcInst, InternalInstruction &insn)
 translateSrcIndex - Appends a source index operand to an MCInst.
 
static bool translateDstIndex (MCInst &mcInst, InternalInstruction &insn)
 translateDstIndex - Appends a destination index operand to an MCInst.
 
static void translateImmediate (MCInst &mcInst, uint64_t immediate, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis)
 translateImmediate - Appends an immediate operand to an MCInst.
 
static bool translateRMRegister (MCInst &mcInst, InternalInstruction &insn)
 translateRMRegister - Translates a register stored in the R/M field of the ModR/M byte to its LLVM equivalent and appends it to an MCInst.
 
static bool translateRMMemory (MCInst &mcInst, InternalInstruction &insn, const MCDisassembler *Dis, bool ForceSIB=false)
 translateRMMemory - Translates a memory operand stored in the Mod and R/M fields of an internal instruction (and possibly its SIB byte) to a memory operand in LLVM's format, and appends it to an MCInst.
 
static bool translateRM (MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis)
 translateRM - Translates an operand stored in the R/M (and possibly SIB) byte of an instruction to LLVM form, and appends it to an MCInst.
 
static void translateFPRegister (MCInst &mcInst, uint8_t stackPos)
 translateFPRegister - Translates a stack position on the FPU stack to its LLVM form, and appends it to an MCInst.
 
static bool translateMaskRegister (MCInst &mcInst, uint8_t maskRegNum)
 translateMaskRegister - Translates a 3-bit mask register number to LLVM form, and appends it to an MCInst.
 
static bool translateOperand (MCInst &mcInst, const OperandSpecifier &operand, InternalInstruction &insn, const MCDisassembler *Dis)
 translateOperand - Translates an operand stored in an internal instruction to LLVM's format and appends it to an MCInst.
 
static MCDisassemblercreateX86Disassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
 
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86Disassembler ()
 

Variables

static const uint8_t segmentRegnums [SEG_OVERRIDE_max]
 

Macro Definition Documentation

◆ debug

#define debug (   s)    LLVM_DEBUG(dbgs() << __LINE__ << ": " << s);

Definition at line 96 of file X86Disassembler.cpp.

◆ DEBUG_TYPE

#define DEBUG_TYPE   "x86-disassembler"

Definition at line 94 of file X86Disassembler.cpp.

◆ ENTRY [1/7]

#define ENTRY (   x)    X86::x,

◆ ENTRY [2/7]

#define ENTRY (   x)    case EA_BASE_##x:

◆ ENTRY [3/7]

#define ENTRY (   x)
Value:
case EA_REG_##x: \
mcInst.addOperand(MCOperand::createReg(X86::x)); break;
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:134

◆ ENTRY [4/7]

#define ENTRY (   x)
Value:
case SIB_BASE_##x: \
baseReg = MCOperand::createReg(X86::x); break;

◆ ENTRY [5/7]

#define ENTRY (   x)
Value:
case SIB_INDEX_##x: \
indexReg = MCOperand::createReg(X86::x); break;

◆ ENTRY [6/7]

#define ENTRY (   x)
Value:
case EA_BASE_##x: \
baseReg = MCOperand::createReg(X86::x); break;

◆ ENTRY [7/7]

#define ENTRY (   x)    case EA_REG_##x:

◆ GENERIC_FIXUP_FUNC

#define GENERIC_FIXUP_FUNC (   name,
  base,
  prefix 
)

Definition at line 774 of file X86Disassembler.cpp.

Function Documentation

◆ consume()

template<typename T >
static bool consume ( InternalInstruction insn,
T ptr 
)
static

◆ createX86Disassembler()

static MCDisassembler * createX86Disassembler ( const Target T,
const MCSubtargetInfo STI,
MCContext Ctx 
)
static

Definition at line 2424 of file X86Disassembler.cpp.

Referenced by LLVMInitializeX86Disassembler().

◆ decode()

static InstrUID decode ( OpcodeType  type,
InstructionContext  insnContext,
uint8_t  opcode,
uint8_t  modRM 
)
static

◆ fixupReg()

static int fixupReg ( struct InternalInstruction insn,
const struct OperandSpecifier op 
)
static

◆ getInstructionID()

static int getInstructionID ( struct InternalInstruction insn,
const MCInstrInfo mii 
)
static

Definition at line 1164 of file X86Disassembler.cpp.

References aaaFromEVEX4of4, llvm::X86Disassembler::ATTR_64BIT, llvm::X86Disassembler::ATTR_ADSIZE, llvm::X86Disassembler::ATTR_EVEX, llvm::X86Disassembler::ATTR_EVEXB, llvm::X86Disassembler::ATTR_EVEXK, llvm::X86Disassembler::ATTR_EVEXKZ, llvm::X86Disassembler::ATTR_EVEXL2, llvm::X86Disassembler::ATTR_EVEXNF, llvm::X86Disassembler::ATTR_NONE, llvm::X86Disassembler::ATTR_OPSIZE, llvm::X86Disassembler::ATTR_REX2, llvm::X86Disassembler::ATTR_REXW, llvm::X86Disassembler::ATTR_VEX, llvm::X86Disassembler::ATTR_VEXL, llvm::X86Disassembler::ATTR_XD, llvm::X86Disassembler::ATTR_XS, bFromEVEX4of4, llvm::StringRef::data(), llvm::dbgs(), getInstructionIDWithAttrMask(), llvm::MCInstrInfo::getName(), llvm::X86Disassembler::InternalInstruction::hasAdSize, llvm::X86Disassembler::InternalInstruction::hasOpSize, llvm::X86Disassembler::InternalInstruction::instructionID, INSTRUCTIONS_SYM, is16BitEquivalent(), is64Bit(), isNF(), l2FromEVEX4of4, lFromEVEX4of4, lFromVEX2of2, lFromVEX3of3, lFromXOP3of3, LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mandatoryPrefix, llvm::X86Disassembler::MAP4, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_16BIT, llvm::X86Disassembler::MODE_64BIT, llvm::X86Disassembler::ONEBYTE, llvm::X86Disassembler::InternalInstruction::opcode, llvm::X86Disassembler::InternalInstruction::opcodeType, ppFromEVEX3of4, ppFromVEX2of2, ppFromVEX3of3, ppFromXOP3of3, llvm::X86Disassembler::InternalInstruction::repeatPrefix, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, llvm::X86Disassembler::InternalInstruction::spec, llvm::X86Disassembler::THREEBYTE_38, llvm::X86Disassembler::TWOBYTE, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_NO_VEX_XOP, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::VEX_PREFIX_66, llvm::X86Disassembler::VEX_PREFIX_F2, llvm::X86Disassembler::VEX_PREFIX_F3, wFromEVEX3of4, wFromVEX3of3, wFromXOP3of3, and zFromEVEX4of4.

◆ getInstructionIDWithAttrMask()

static int getInstructionIDWithAttrMask ( uint16_t instructionID,
struct InternalInstruction insn,
uint16_t  attrMask 
)
static

◆ is16BitEquivalent()

static bool is16BitEquivalent ( const char orig,
const char equiv 
)
static

Definition at line 1052 of file X86Disassembler.cpp.

Referenced by getInstructionID().

◆ is64Bit()

static bool is64Bit ( const char name)
static

◆ isNF()

static bool isNF ( InternalInstruction insn)
static

◆ isREX()

static bool isREX ( struct InternalInstruction insn,
uint8_t  prefix 
)
static

◆ isREX2()

static bool isREX2 ( struct InternalInstruction insn,
uint8_t  prefix 
)
static

◆ LLVMInitializeX86Disassembler()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86Disassembler ( )

◆ peek()

static bool peek ( struct InternalInstruction insn,
uint8_t &  byte 
)
static

◆ readDisplacement()

static int readDisplacement ( struct InternalInstruction insn)
static

◆ readImmediate()

static int readImmediate ( struct InternalInstruction insn,
uint8_t  size 
)
static

◆ readMaskRegister()

static int readMaskRegister ( struct InternalInstruction insn)
static

◆ readModRM()

static int readModRM ( struct InternalInstruction insn)
static

◆ readOpcode()

static bool readOpcode ( struct InternalInstruction insn)
static

◆ readOpcodeRegister()

static int readOpcodeRegister ( struct InternalInstruction insn,
uint8_t  size 
)
static

◆ readOperands()

static int readOperands ( struct InternalInstruction insn)
static

◆ readPrefixes()

static int readPrefixes ( struct InternalInstruction insn)
static

Definition at line 221 of file X86Disassembler.cpp.

References llvm::X86Disassembler::InternalInstruction::addressSize, b2FromEVEX2of4, bFromEVEX2of4, bFromREX2, bFromVEX2of3, bFromXOP2of3, llvm::consume, llvm::dbgs(), llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::format(), llvm::X86Disassembler::InternalInstruction::hasAdSize, llvm::X86Disassembler::InternalInstruction::hasLockPrefix, llvm::X86Disassembler::InternalInstruction::hasOpSize, llvm::X86Disassembler::InternalInstruction::immediateSize, isPrefix(), isREX(), isREX2(), LLVM_DEBUG, llvm::X86Disassembler::InternalInstruction::mandatoryPrefix, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_16BIT, llvm::X86Disassembler::MODE_32BIT, llvm::X86Disassembler::MODE_64BIT, nextByte(), peek(), ppFromVEX2of2, ppFromXOP3of3, r2FromEVEX2of4, llvm::X86Disassembler::InternalInstruction::readerCursor, llvm::X86Disassembler::InternalInstruction::registerSize, llvm::X86Disassembler::InternalInstruction::repeatPrefix, llvm::X86Disassembler::InternalInstruction::rex2ExtensionPrefix, llvm::X86Disassembler::InternalInstruction::rexPrefix, rFromEVEX2of4, rFromREX2, rFromVEX2of2, rFromVEX2of3, rFromXOP2of3, llvm::X86Disassembler::SEG_OVERRIDE_CS, llvm::X86Disassembler::SEG_OVERRIDE_DS, llvm::X86Disassembler::SEG_OVERRIDE_ES, llvm::X86Disassembler::SEG_OVERRIDE_FS, llvm::X86Disassembler::SEG_OVERRIDE_GS, llvm::X86Disassembler::SEG_OVERRIDE_SS, llvm::X86Disassembler::InternalInstruction::segmentOverride, llvm::X86Disassembler::InternalInstruction::startLocation, llvm::X86Disassembler::TYPE_EVEX, llvm::X86Disassembler::TYPE_NO_VEX_XOP, llvm::X86Disassembler::TYPE_VEX_2B, llvm::X86Disassembler::TYPE_VEX_3B, llvm::X86Disassembler::TYPE_XOP, llvm::X86Disassembler::InternalInstruction::vectorExtensionPrefix, llvm::X86Disassembler::InternalInstruction::vectorExtensionType, llvm::X86Disassembler::VEX_PREFIX_66, wFromEVEX3of4, wFromREX, wFromREX2, wFromVEX3of3, wFromXOP3of3, x2FromEVEX3of4, llvm::X86Disassembler::InternalInstruction::xAcquireRelease, xFromEVEX2of4, xFromREX2, xFromVEX2of3, and xFromXOP2of3.

◆ readSIB()

static int readSIB ( struct InternalInstruction insn)
static

◆ readVVVV()

static int readVVVV ( struct InternalInstruction insn)
static

◆ translateDstIndex()

static bool translateDstIndex ( MCInst mcInst,
InternalInstruction insn 
)
static

translateDstIndex - Appends a destination index operand to an MCInst.

Parameters
mcInst- The MCInst to append to.
insn- The internal instruction.

Definition at line 1931 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createReg(), llvm::X86Disassembler::InternalInstruction::hasAdSize, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_16BIT, llvm::X86Disassembler::MODE_32BIT, and llvm::X86Disassembler::MODE_64BIT.

Referenced by translateOperand().

◆ translateFPRegister()

static void translateFPRegister ( MCInst mcInst,
uint8_t  stackPos 
)
static

translateFPRegister - Translates a stack position on the FPU stack to its LLVM form, and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
stackPos- The stack position to translate.

Definition at line 2299 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), and llvm::MCOperand::createReg().

Referenced by translateOperand().

◆ translateImmediate()

static void translateImmediate ( MCInst mcInst,
uint64_t  immediate,
const OperandSpecifier operand,
InternalInstruction insn,
const MCDisassembler Dis 
)
static

◆ translateInstruction()

static bool translateInstruction ( MCInst mcInst,
InternalInstruction insn,
const MCDisassembler Dis 
)
static

translateInstruction - Translates an internal instruction and all its operands to an MCInst.

Parameters
mcInst- The MCInst to populate with the instruction's data.
insn- The internal instruction.
Returns
- false on success; true otherwise.

Definition at line 2391 of file X86Disassembler.cpp.

References llvm::MCInst::clear(), debug, llvm::MCInst::getOpcode(), llvm::X86Disassembler::InternalInstruction::instructionID, llvm::X86Disassembler::InternalInstruction::numImmediatesTranslated, llvm::X86Disassembler::InternalInstruction::operands, llvm::MCInst::setOpcode(), llvm::X86Disassembler::InternalInstruction::spec, translateOperand(), and llvm::X86Disassembler::InternalInstruction::xAcquireRelease.

◆ translateMaskRegister()

static bool translateMaskRegister ( MCInst mcInst,
uint8_t  maskRegNum 
)
static

translateMaskRegister - Translates a 3-bit mask register number to LLVM form, and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
maskRegNum- Number of mask register from 0 to 7.
Returns
- false on success; true otherwise.

Definition at line 2310 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and debug.

Referenced by translateOperand().

◆ translateOperand()

static bool translateOperand ( MCInst mcInst,
const OperandSpecifier operand,
InternalInstruction insn,
const MCDisassembler Dis 
)
static

◆ translateRegister()

static void translateRegister ( MCInst mcInst,
Reg  reg 
)
static

translateRegister - Translates an internal register to the appropriate LLVM register, and appends it as an operand to an MCInst.

Parameters
mcInst- The MCInst to append to.
reg- The Reg to append.

Definition at line 1883 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), ALL_REGS, and llvm::MCOperand::createReg().

Referenced by translateOperand().

◆ translateRM()

static bool translateRM ( MCInst mcInst,
const OperandSpecifier operand,
InternalInstruction insn,
const MCDisassembler Dis 
)
static

translateRM - Translates an operand stored in the R/M (and possibly SIB) byte of an instruction to LLVM form, and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
operand- The operand, as stored in the descriptor table.
insn- The instruction to extract Mod, R/M, and SIB fields from.
Returns
- 0 on success; nonzero otherwise

Definition at line 2262 of file X86Disassembler.cpp.

References debug, translateRMMemory(), translateRMRegister(), and llvm::X86Disassembler::OperandSpecifier::type.

Referenced by translateOperand().

◆ translateRMMemory()

static bool translateRMMemory ( MCInst mcInst,
InternalInstruction insn,
const MCDisassembler Dis,
bool  ForceSIB = false 
)
static

translateRMMemory - Translates a memory operand stored in the Mod and R/M fields of an internal instruction (and possibly its SIB byte) to a memory operand in LLVM's format, and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
insn- The instruction to extract Mod, R/M, and SIB fields from.
ForceSIB- The instruction must use SIB.
Returns
- 0 on success; nonzero otherwise

Definition at line 2097 of file X86Disassembler.cpp.

References llvm::MCInst::addOperand(), llvm::X86Disassembler::InternalInstruction::addressSize, ALL_EA_BASES, ALL_REGS, ALL_SIB_BASES, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), debug, llvm::X86Disassembler::InternalInstruction::displacement, llvm::X86Disassembler::InternalInstruction::displacementOffset, llvm::X86Disassembler::InternalInstruction::displacementSize, llvm::X86Disassembler::EA_BASE_NONE, EA_BASES_32BIT, EA_BASES_64BIT, llvm::X86Disassembler::EA_DISP_NONE, llvm::X86Disassembler::InternalInstruction::eaBase, llvm::X86Disassembler::InternalInstruction::eaDisplacement, if(), llvm::X86Disassembler::InternalInstruction::length, llvm::X86Disassembler::InternalInstruction::mode, llvm::X86Disassembler::MODE_64BIT, REGS_XMM, REGS_YMM, REGS_ZMM, llvm::X86Disassembler::InternalInstruction::segmentOverride, segmentRegnums, llvm::X86Disassembler::SIB_BASE_NONE, llvm::X86Disassembler::SIB_INDEX_NONE, llvm::X86Disassembler::InternalInstruction::sibBase, llvm::X86Disassembler::InternalInstruction::sibIndex, llvm::X86Disassembler::InternalInstruction::sibScale, llvm::X86Disassembler::InternalInstruction::startLocation, llvm::MCDisassembler::tryAddingPcLoadReferenceComment(), and llvm::MCDisassembler::tryAddingSymbolicOperand().

Referenced by translateRM().

◆ translateRMRegister()

static bool translateRMRegister ( MCInst mcInst,
InternalInstruction insn 
)
static

translateRMRegister - Translates a register stored in the R/M field of the ModR/M byte to its LLVM equivalent and appends it to an MCInst.

Parameters
mcInst- The MCInst to append to.
insn- The internal instruction to extract the R/M field from.
Returns
- 0 on success; -1 otherwise

Definition at line 2058 of file X86Disassembler.cpp.

References ALL_EA_BASES, ALL_REGS, debug, llvm::X86Disassembler::EA_BASE_NONE, and llvm::X86Disassembler::InternalInstruction::eaBase.

Referenced by translateRM().

◆ translateSrcIndex()

static bool translateSrcIndex ( MCInst mcInst,
InternalInstruction insn 
)
static

Variable Documentation

◆ segmentRegnums

const uint8_t segmentRegnums[SEG_OVERRIDE_max]
static
Initial value:
= {
0,
X86::CS,
X86::SS,
X86::DS,
X86::ES,
X86::FS,
X86::GS
}

Definition at line 1892 of file X86Disassembler.cpp.

Referenced by translateImmediate(), translateRMMemory(), and translateSrcIndex().