LLVM  16.0.0git
Public Member Functions | List of all members
llvm::X86Subtarget Class Referencefinal

#include "Target/X86/X86Subtarget.h"

Inheritance diagram for llvm::X86Subtarget:
Inheritance graph
[legend]
Collaboration diagram for llvm::X86Subtarget:
Collaboration graph
[legend]

Public Member Functions

 X86Subtarget (const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS, const X86TargetMachine &TM, MaybeAlign StackAlignOverride, unsigned PreferVectorWidthOverride, unsigned RequiredVectorWidth)
 This constructor initializes the data members to match that of the specified triple. More...
 
const X86TargetLoweringgetTargetLowering () const override
 
const X86InstrInfogetInstrInfo () const override
 
const X86FrameLoweringgetFrameLowering () const override
 
const X86SelectionDAGInfogetSelectionDAGInfo () const override
 
const X86RegisterInfogetRegisterInfo () const override
 
unsigned getTileConfigSize () const
 
Align getTileConfigAlignment () const
 
Align getStackAlignment () const
 Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget. More...
 
unsigned getMaxInlineSizeThreshold () const
 Returns the maximum memset / memcpy size that still makes it profitable to inline the call. More...
 
void ParseSubtargetFeatures (StringRef CPU, StringRef TuneCPU, StringRef FS)
 ParseSubtargetFeatures - Parses features string setting specified subtarget options. More...
 
const CallLoweringgetCallLowering () const override
 Methods used by Global ISel. More...
 
InstructionSelectorgetInstructionSelector () const override
 
const LegalizerInfogetLegalizerInfo () const override
 
const RegisterBankInfogetRegBankInfo () const override
 
bool isTarget64BitILP32 () const
 Is this x86_64 with the ILP32 programming model (x32 ABI)? More...
 
bool isTarget64BitLP64 () const
 Is this x86_64 with the LP64 programming model (standard AMD64, no x32)? More...
 
PICStyles::Style getPICStyle () const
 
void setPICStyle (PICStyles::Style Style)
 
bool canUseCMPXCHG8B () const
 
bool canUseCMPXCHG16B () const
 
bool canUseCMOV () const
 
bool hasSSE1 () const
 
bool hasSSE2 () const
 
bool hasSSE3 () const
 
bool hasSSSE3 () const
 
bool hasSSE41 () const
 
bool hasSSE42 () const
 
bool hasAVX () const
 
bool hasAVX2 () const
 
bool hasAVX512 () const
 
bool hasInt256 () const
 
bool hasMMX () const
 
bool hasThreeDNow () const
 
bool hasThreeDNowA () const
 
bool hasAnyFMA () const
 
bool hasPrefetchW () const
 
bool hasSSEPrefetch () const
 
bool canUseLAHFSAHF () const
 
bool useIndirectThunkCalls () const
 
bool useIndirectThunkBranches () const
 
unsigned getPreferVectorWidth () const
 
unsigned getRequiredVectorWidth () const
 
bool canExtendTo512DQ () const
 
bool canExtendTo512BW () const
 
bool useAVX512Regs () const
 
bool useBWIRegs () const
 
bool isXRaySupported () const override
 
bool hasMFence () const
 Use mfence if we have SSE2 or we're on x86-64 (even if we asked for no-sse2). More...
 
const TriplegetTargetTriple () const
 
bool isTargetDarwin () const
 
bool isTargetFreeBSD () const
 
bool isTargetDragonFly () const
 
bool isTargetSolaris () const
 
bool isTargetPS () const
 
bool isTargetELF () const
 
bool isTargetCOFF () const
 
bool isTargetMachO () const
 
bool isTargetLinux () const
 
bool isTargetKFreeBSD () const
 
bool isTargetGlibc () const
 
bool isTargetAndroid () const
 
bool isTargetNaCl () const
 
bool isTargetNaCl32 () const
 
bool isTargetNaCl64 () const
 
bool isTargetMCU () const
 
bool isTargetFuchsia () const
 
bool isTargetWindowsMSVC () const
 
bool isTargetWindowsCoreCLR () const
 
bool isTargetWindowsCygwin () const
 
bool isTargetWindowsGNU () const
 
bool isTargetWindowsItanium () const
 
bool isTargetCygMing () const
 
bool isOSWindows () const
 
bool isTargetWin64 () const
 
bool isTargetWin32 () const
 
bool isPICStyleGOT () const
 
bool isPICStyleRIPRel () const
 
bool isPICStyleStubPIC () const
 
bool isPositionIndependent () const
 
bool isCallingConvWin64 (CallingConv::ID CC) const
 
unsigned char classifyLocalReference (const GlobalValue *GV) const
 Classify a global variable reference for the current subtarget according to how we should reference it in a non-pcrel context. More...
 
unsigned char classifyGlobalReference (const GlobalValue *GV, const Module &M) const
 
unsigned char classifyGlobalReference (const GlobalValue *GV) const
 Classify a global variable reference for the current subtarget according to how we should reference it in a non-pcrel context. More...
 
unsigned char classifyGlobalFunctionReference (const GlobalValue *GV, const Module &M) const
 Classify a global function reference for the current subtarget. More...
 
unsigned char classifyGlobalFunctionReference (const GlobalValue *GV) const override
 
unsigned char classifyBlockAddressReference () const
 Classify a blockaddress reference for the current subtarget according to how we should reference it in a non-pcrel context. More...
 
bool isLegalToCallImmediateAddr () const
 Return true if the subtarget allows calls to immediate address. More...
 
bool swiftAsyncContextIsDynamicallySet () const
 Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime. More...
 
bool enableIndirectBrExpand () const override
 If we are using indirect thunks, we need to expand indirectbr to avoid it lowering to an actual indirect jump. More...
 
bool enableMachineScheduler () const override
 Enable the MachineScheduler pass for all X86 subtargets. More...
 
bool enableEarlyIfConversion () const override
 
void getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
 
AntiDepBreakMode getAntiDepBreakMode () const override
 

Detailed Description

Definition at line 52 of file X86Subtarget.h.

Constructor & Destructor Documentation

◆ X86Subtarget()

X86Subtarget::X86Subtarget ( const Triple TT,
StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS,
const X86TargetMachine TM,
MaybeAlign  StackAlignOverride,
unsigned  PreferVectorWidthOverride,
unsigned  RequiredVectorWidth 
)

Member Function Documentation

◆ canExtendTo512BW()

bool llvm::X86Subtarget::canExtendTo512BW ( ) const
inline

◆ canExtendTo512DQ()

bool llvm::X86Subtarget::canExtendTo512DQ ( ) const
inline

◆ canUseCMOV()

bool llvm::X86Subtarget::canUseCMOV ( ) const
inline

◆ canUseCMPXCHG16B()

bool llvm::X86Subtarget::canUseCMPXCHG16B ( ) const
inline

◆ canUseCMPXCHG8B()

bool llvm::X86Subtarget::canUseCMPXCHG8B ( ) const
inline

Definition at line 191 of file X86Subtarget.h.

Referenced by llvm::X86TargetLowering::X86TargetLowering().

◆ canUseLAHFSAHF()

bool llvm::X86Subtarget::canUseLAHFSAHF ( ) const
inline

Definition at line 227 of file X86Subtarget.h.

References is64Bit().

◆ classifyBlockAddressReference()

unsigned char X86Subtarget::classifyBlockAddressReference ( ) const

Classify a blockaddress reference for the current subtarget according to how we should reference it in a non-pcrel context.

Definition at line 59 of file X86Subtarget.cpp.

References classifyLocalReference().

◆ classifyGlobalFunctionReference() [1/2]

unsigned char X86Subtarget::classifyGlobalFunctionReference ( const GlobalValue GV) const
override

◆ classifyGlobalFunctionReference() [2/2]

unsigned char X86Subtarget::classifyGlobalFunctionReference ( const GlobalValue GV,
const Module M 
) const

◆ classifyGlobalReference() [1/2]

unsigned char X86Subtarget::classifyGlobalReference ( const GlobalValue GV) const

Classify a global variable reference for the current subtarget according to how we should reference it in a non-pcrel context.

Definition at line 66 of file X86Subtarget.cpp.

References classifyGlobalReference(), and llvm::GlobalValue::getParent().

◆ classifyGlobalReference() [2/2]

unsigned char X86Subtarget::classifyGlobalReference ( const GlobalValue GV,
const Module M 
) const

◆ classifyLocalReference()

unsigned char X86Subtarget::classifyLocalReference ( const GlobalValue GV) const

◆ enableEarlyIfConversion()

bool X86Subtarget::enableEarlyIfConversion ( ) const
override

Definition at line 361 of file X86Subtarget.cpp.

References canUseCMOV(), and X86EarlyIfConv.

◆ enableIndirectBrExpand()

bool llvm::X86Subtarget::enableIndirectBrExpand ( ) const
inlineoverride

If we are using indirect thunks, we need to expand indirectbr to avoid it lowering to an actual indirect jump.

Definition at line 401 of file X86Subtarget.h.

References useIndirectThunkBranches().

◆ enableMachineScheduler()

bool llvm::X86Subtarget::enableMachineScheduler ( ) const
inlineoverride

Enable the MachineScheduler pass for all X86 subtargets.

Definition at line 406 of file X86Subtarget.h.

◆ getAntiDepBreakMode()

AntiDepBreakMode llvm::X86Subtarget::getAntiDepBreakMode ( ) const
inlineoverride

Definition at line 413 of file X86Subtarget.h.

◆ getCallLowering()

const CallLowering * X86Subtarget::getCallLowering ( ) const
override

Methods used by Global ISel.

Definition at line 345 of file X86Subtarget.cpp.

◆ getFrameLowering()

const X86FrameLowering* llvm::X86Subtarget::getFrameLowering ( ) const
inlineoverride

◆ getInstrInfo()

const X86InstrInfo* llvm::X86Subtarget::getInstrInfo ( ) const
inlineoverride

◆ getInstructionSelector()

InstructionSelector * X86Subtarget::getInstructionSelector ( ) const
override

Definition at line 349 of file X86Subtarget.cpp.

◆ getLegalizerInfo()

const LegalizerInfo * X86Subtarget::getLegalizerInfo ( ) const
override

Definition at line 353 of file X86Subtarget.cpp.

◆ getMaxInlineSizeThreshold()

unsigned llvm::X86Subtarget::getMaxInlineSizeThreshold ( ) const
inline

Returns the maximum memset / memcpy size that still makes it profitable to inline the call.

Definition at line 152 of file X86Subtarget.h.

Referenced by emitConstantSizeRepmov(), and llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset().

◆ getPICStyle()

PICStyles::Style llvm::X86Subtarget::getPICStyle ( ) const
inline

Definition at line 188 of file X86Subtarget.h.

◆ getPostRAMutations()

void X86Subtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation >> &  Mutations) const
override

Definition at line 365 of file X86Subtarget.cpp.

References llvm::createX86MacroFusionDAGMutation().

◆ getPreferVectorWidth()

unsigned llvm::X86Subtarget::getPreferVectorWidth ( ) const
inline

◆ getRegBankInfo()

const RegisterBankInfo * X86Subtarget::getRegBankInfo ( ) const
override

Definition at line 357 of file X86Subtarget.cpp.

◆ getRegisterInfo()

const X86RegisterInfo* llvm::X86Subtarget::getRegisterInfo ( ) const
inlineoverride

◆ getRequiredVectorWidth()

unsigned llvm::X86Subtarget::getRequiredVectorWidth ( ) const
inline

Definition at line 239 of file X86Subtarget.h.

◆ getSelectionDAGInfo()

const X86SelectionDAGInfo* llvm::X86Subtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 134 of file X86Subtarget.h.

◆ getStackAlignment()

Align llvm::X86Subtarget::getStackAlignment ( ) const
inline

Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget.

Definition at line 148 of file X86Subtarget.h.

◆ getTargetLowering()

const X86TargetLowering* llvm::X86Subtarget::getTargetLowering ( ) const
inlineoverride

◆ getTargetTriple()

const Triple& llvm::X86Subtarget::getTargetTriple ( ) const
inline

◆ getTileConfigAlignment()

Align llvm::X86Subtarget::getTileConfigAlignment ( ) const
inline

Definition at line 143 of file X86Subtarget.h.

◆ getTileConfigSize()

unsigned llvm::X86Subtarget::getTileConfigSize ( ) const
inline

Definition at line 142 of file X86Subtarget.h.

◆ hasAnyFMA()

bool llvm::X86Subtarget::hasAnyFMA ( ) const
inline

◆ hasAVX()

bool llvm::X86Subtarget::hasAVX ( ) const
inline

Definition at line 205 of file X86Subtarget.h.

Referenced by llvm::X86InstrInfo::breakPartialRegDependency(), combineBitcastvxi1(), combineCONCAT_VECTORS(), combineConcatVectorOps(), combineEXTRACT_SUBVECTOR(), combineLoad(), combinePredicateReduction(), combinePTESTCC(), combineSelect(), combineToHorizontalAddSub(), combineVectorSizedSetCCEquality(), combineX86ShuffleChain(), convertIntLogicToFPLogic(), llvm::X86InstrInfo::copyPhysReg(), CopyToFromAsymmetricReg(), createVariablePermute(), EltsFromConsecutiveLoads(), llvm::X86TTIImpl::enableMemCmpExpansion(), llvm::X86InstrInfo::expandPostRAPseudo(), llvm::X86RegisterInfo::getCalleeSavedRegs(), llvm::X86RegisterInfo::getCallPreservedMask(), llvm::X86TTIImpl::getCmpSelInstrCost(), getLoadStoreOpcodeForFP16(), getLoadStoreRegOpcode(), llvm::X86TTIImpl::getMaxInterleaveFactor(), llvm::X86TargetLowering::getOptimalMemOpType(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::X86TTIImpl::getRegisterBitWidth(), llvm::X86TargetLowering::getSingleConstraintMatchWeight(), isLegalConversion(), llvm::X86TTIImpl::isLegalMaskedLoad(), llvm::X86TTIImpl::isLegalNTStore(), LowerANY_EXTEND(), lowerBuildVectorAsBroadcast(), LowerEXTEND_VECTOR_INREG(), LowerShift(), lowerShuffleAsBlend(), lowerShuffleAsBroadcast(), LowerToHorizontalOp(), lowerUINT_TO_FP_vXi32(), lowerV2F64Shuffle(), lowerV4F32Shuffle(), LowerVectorAllZero(), LowerVSETCC(), LowerVSETCCWithSUBUS(), LowerZERO_EXTEND(), matchBinaryPermuteShuffle(), matchBinaryShuffle(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), llvm::X86::mayFoldLoad(), llvm::X86::mayFoldLoadIntoBroadcastFromMem(), llvm::X86TargetLowering::reduceSelectOfFPConstantLoads(), useVectorCast(), X86ChooseCmpOpcode(), and llvm::X86TargetLowering::X86TargetLowering().

◆ hasAVX2()

bool llvm::X86Subtarget::hasAVX2 ( ) const
inline

Definition at line 206 of file X86Subtarget.h.

Referenced by combineBitcastvxi1(), combineConcatVectorOps(), combineEXTRACT_SUBVECTOR(), combineSelect(), combineShuffleOfConcatUndef(), combineTargetShuffle(), combineToExtendBoolVectorInReg(), combineVSelectToBLENDV(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), convertShiftLeftToScale(), EltsFromConsecutiveLoads(), expandFP_TO_UINT_SSE(), foldVectorXorShiftIntoCmp(), llvm::X86TTIImpl::getAddressComputationCost(), llvm::X86TTIImpl::getCmpSelInstrCost(), llvm::X86InstrInfo::getExecutionDomain(), llvm::X86InstrInfo::getExecutionDomainCustom(), llvm::X86TTIImpl::getIntrinsicInstrCost(), llvm::X86TTIImpl::getScalarizationOverhead(), hasInt256(), isHorizontalBinOp(), llvm::X86TTIImpl::isLegalNTLoad(), llvm::X86TargetLowering::isVectorClearMaskLegal(), llvm::X86TargetLowering::isVectorShiftByScalarCheap(), lower256BitShuffle(), lowerBuildVectorAsBroadcast(), LowerFunnelShift(), LowerMGATHER(), LowerRotate(), lowerShuffleAsBlend(), lowerShuffleAsBroadcast(), lowerShuffleAsByteRotateAndPermute(), lowerShuffleAsLanePermuteAndPermute(), lowerShuffleAsLanePermuteAndShuffle(), lowerShuffleAsRepeatedMaskAndLanePermute(), lowerShuffleAsTruncBroadcast(), lowerShuffleWithPSHUFB(), lowerShuffleWithUndefHalf(), LowerToHorizontalOp(), lowerV16I16Shuffle(), lowerV2F64Shuffle(), lowerV2I64Shuffle(), lowerV2X128Shuffle(), lowerV32I8Shuffle(), lowerV4F32Shuffle(), lowerV4F64Shuffle(), lowerV4I32Shuffle(), lowerV4I64Shuffle(), lowerV8F32Shuffle(), lowerV8I16Shuffle(), lowerV8I32Shuffle(), matchBinaryPermuteShuffle(), matchBinaryShuffle(), matchUnaryPermuteShuffle(), llvm::X86InstrInfo::setExecutionDomain(), llvm::X86InstrInfo::setExecutionDomainCustom(), llvm::X86TargetLowering::shouldProduceAndByConstByHoistingConstFromShiftsLHSOfAnd(), and SplitOpsAndApply().

◆ hasAVX512()

bool llvm::X86Subtarget::hasAVX512 ( ) const
inline

Definition at line 207 of file X86Subtarget.h.

Referenced by canCombineAsMaskOperation(), canExtendTo512DQ(), combineArithReduction(), combineBitcast(), combineBitcastvxi1(), combineCastedMaskArithmetic(), combineCompareEqual(), combineConcatVectorOps(), combineExtSetcc(), combineLoad(), combineMaskedLoad(), combineMulToPMADDWD(), combinePMULH(), combineSelect(), combineSetCC(), combineStore(), combineToExtendBoolVectorInReg(), combineTruncateWithSat(), combineVectorPack(), combineVectorSignBitsTruncation(), combineVectorTruncation(), combineX86ShuffleChain(), llvm::X86TargetLowering::convertSelectOfConstantsToMath(), convertShiftLeftToScale(), CopyToFromAsymmetricReg(), EmitAVX512Test(), llvm::X86TTIImpl::enableMemCmpExpansion(), llvm::X86TTIImpl::forceScalarizeMaskedGather(), getAVX512Node(), getBroadcastOpcode(), llvm::X86RegisterInfo::getCalleeSavedRegs(), llvm::X86RegisterInfo::getCallPreservedMask(), llvm::X86TTIImpl::getCmpSelInstrCost(), llvm::X86TTIImpl::getInterleavedMemoryOpCost(), llvm::X86RegisterInfo::getLargestLegalSuperClass(), getLoadStoreOpcodeForFP16(), getLoadStoreRegOpcode(), llvm::X86TTIImpl::getMaskedMemoryOpCost(), llvm::X86TTIImpl::getNumberOfRegisters(), llvm::X86TargetLowering::getNumRegistersForCallingConv(), llvm::X86TargetLowering::getOptimalMemOpType(), llvm::X86TargetLowering::getPreferredVectorAction(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::X86TTIImpl::getRegisterBitWidth(), llvm::X86TargetLowering::getRegisterTypeForCallingConv(), llvm::X86TTIImpl::getReplicationShuffleCost(), llvm::X86RegisterInfo::getReservedRegs(), llvm::X86TTIImpl::getScalarizationOverhead(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TargetLowering::getSingleConstraintMatchWeight(), llvm::X86TargetLowering::getVectorTypeBreakdownForCallingConv(), llvm::X86TTIImpl::isLegalMaskedExpandLoad(), llvm::X86TTIImpl::isLegalMaskedScatter(), llvm::X86TargetLowering::isLoadBitCastBeneficial(), lower1BitShuffle(), lower512BitShuffle(), LowerBITCAST(), LowerEXTEND_VECTOR_INREG(), LowerFunnelShift(), LowerLoad(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), LowerMSTORE(), LowerMULH(), LowerRotate(), LowerShift(), lowerShuffleAsBitRotate(), lowerShuffleAsVTRUNC(), lowerShuffleWithUndefHalf(), lowerShuffleWithVPMOV(), LowerStore(), lowerUINT_TO_FP_v2i32(), lowerUINT_TO_FP_vXi32(), lowerV16I16Shuffle(), lowerV2X128Shuffle(), lowerV32I8Shuffle(), lowerV8F32Shuffle(), lowerV8I32Shuffle(), LowerVSETCC(), matchBinaryPermuteShuffle(), matchBinaryShuffle(), matchShuffleAsBitRotate(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::X86InstrInfo::setExecutionDomain(), llvm::X86TargetLowering::shouldFoldSelectWithIdentityConstant(), llvm::X86TargetLowering::SimplifyDemandedBitsForTargetNode(), supportedVectorShiftWithImm(), supportedVectorVarShift(), useAVX512Regs(), useVectorCast(), X86ChooseCmpOpcode(), and llvm::X86TargetLowering::X86TargetLowering().

◆ hasInt256()

bool llvm::X86Subtarget::hasInt256 ( ) const
inline

◆ hasMFence()

bool llvm::X86Subtarget::hasMFence ( ) const
inline

Use mfence if we have SSE2 or we're on x86-64 (even if we asked for no-sse2).

There isn't any reason to disable it if the target processor supports it.

Definition at line 267 of file X86Subtarget.h.

References hasSSE2(), and is64Bit().

Referenced by LowerATOMIC_FENCE().

◆ hasMMX()

bool llvm::X86Subtarget::hasMMX ( ) const
inline

◆ hasPrefetchW()

bool llvm::X86Subtarget::hasPrefetchW ( ) const
inline

Definition at line 213 of file X86Subtarget.h.

References hasThreeDNow().

◆ hasSSE1()

bool llvm::X86Subtarget::hasSSE1 ( ) const
inline

◆ hasSSE2()

bool llvm::X86Subtarget::hasSSE2 ( ) const
inline

Definition at line 200 of file X86Subtarget.h.

Referenced by combineAnd(), combineArithReduction(), combineBasicSADPattern(), combineBitcast(), combineBitcastvxi1(), combineCMov(), combineCompareEqual(), combineExtractWithShuffle(), combineFAndFNotToFAndn(), combineFMinNumFMaxNum(), combineLogicBlendIntoPBLENDV(), combineMOVMSK(), combineMulToPMADDWD(), combineMulToPMULDQ(), combineOr(), combinePMULH(), combinePredicateReduction(), combineSelect(), combineSetCC(), combineShiftToPMULH(), combineStore(), combineToExtendBoolVectorInReg(), combineTruncateWithSat(), combineVectorSignBitsTruncation(), combineVectorSizedSetCCEquality(), combineVectorTruncation(), combineX86ShuffleChain(), combineXor(), llvm::X86InstrInfo::commuteInstructionImpl(), convertIntLogicToFPLogic(), detectAVGPattern(), EltsFromConsecutiveLoads(), llvm::X86TTIImpl::enableMemCmpExpansion(), llvm::X86InstrInfo::findCommutedOpIndices(), foldVectorXorShiftIntoCmp(), llvm::X86TTIImpl::getCmpSelInstrCost(), llvm::X86TargetLowering::getOptimalMemOpType(), llvm::X86TTIImpl::getScalarizationOverhead(), llvm::X86TTIImpl::getShuffleCost(), llvm::X86TargetLowering::getSingleConstraintMatchWeight(), getZeroVector(), llvm::X86TargetLowering::hasAndNot(), hasMFence(), isLegalConversion(), llvm::X86TargetLowering::isSafeMemOpType(), llvm::X86TargetLowering::isScalarFPTypeInSSEReg(), LowerBITCAST(), LowerBuildVectorAsInsert(), LowerEXTEND_VECTOR_INREG(), lowerFPToIntToFP(), LowerMUL(), LowerMULH(), LowerShift(), LowerStore(), lowerV4F32Shuffle(), LowerVSETCC(), LowerVSETCCWithSUBUS(), lowerX86FPLogicOp(), matchBinaryPermuteShuffle(), matchBinaryShuffle(), matchPMADDWD(), matchPMADDWD_2(), matchUnaryPermuteShuffle(), matchUnaryShuffle(), MatchVectorAllZeroTest(), materializeVectorConstant(), reduceVMULWidth(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ShouldShrinkFPConstant(), llvm::X86TargetLowering::shouldSinkOperands(), SplitOpsAndApply(), supportedVectorShiftWithImm(), truncateVectorWithPACK(), useVectorCast(), X86ChooseCmpOpcode(), and llvm::X86TargetLowering::X86TargetLowering().

◆ hasSSE3()

bool llvm::X86Subtarget::hasSSE3 ( ) const
inline

◆ hasSSE41()

bool llvm::X86Subtarget::hasSSE41 ( ) const
inline

Definition at line 203 of file X86Subtarget.h.

Referenced by llvm::X86TargetLowering::allowsMisalignedMemoryAccesses(), combineArithReduction(), combineEXTEND_VECTOR_INREG(), combineExtractWithShuffle(), combineLogicBlendIntoPBLENDV(), combineMinMaxReduction(), combineMulToPMADDWD(), combineMulToPMULDQ(), combineSetCCMOVMSK(), combineTruncateWithSat(), combineVectorSignBitsTruncation(), combineVectorSizedSetCCEquality(), combineVectorTruncation(), combineVSelectToBLENDV(), combineX86ShuffleChain(), llvm::X86InstrInfo::commuteInstructionImpl(), convertShiftLeftToScale(), createVariablePermute(), llvm::X86InstrInfo::findCommutedOpIndices(), llvm::X86TTIImpl::getArithmeticInstrCost(), llvm::X86TTIImpl::getCmpSelInstrCost(), getPack(), llvm::X86TTIImpl::getScalarizationOverhead(), getTargetVShiftNode(), LowerABS(), LowerBuildVectorAsInsert(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), LowerBuildVectorv8i16(), LowerMUL(), LowerMULH(), LowerRotate(), LowerShift(), lowerShuffleAsBlend(), lowerShuffleAsSpecificZeroOrAnyExtend(), lowerShuffleWithPACK(), lowerUINT_TO_FP_vXi32(), lowerV16I8Shuffle(), lowerV2F64Shuffle(), lowerV2I64Shuffle(), lowerV4F32Shuffle(), lowerV4I32Shuffle(), lowerV8I16Shuffle(), LowerVectorAllZero(), LowerVSETCC(), matchBinaryPermuteShuffle(), matchBinaryShuffle(), matchShuffleWithPACK(), matchShuffleWithUNPCK(), matchUnaryShuffle(), reduceVMULWidth(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::shouldSinkOperands(), truncateVectorWithPACK(), and llvm::X86TargetLowering::X86TargetLowering().

◆ hasSSE42()

bool llvm::X86Subtarget::hasSSE42 ( ) const
inline

◆ hasSSEPrefetch()

bool llvm::X86Subtarget::hasSSEPrefetch ( ) const
inline

Definition at line 220 of file X86Subtarget.h.

References hasSSE1(), and hasThreeDNow().

Referenced by llvm::X86TargetLowering::X86TargetLowering().

◆ hasSSSE3()

bool llvm::X86Subtarget::hasSSSE3 ( ) const
inline

◆ hasThreeDNow()

bool llvm::X86Subtarget::hasThreeDNow ( ) const
inline

◆ hasThreeDNowA()

bool llvm::X86Subtarget::hasThreeDNowA ( ) const
inline

Definition at line 211 of file X86Subtarget.h.

◆ isCallingConvWin64()

bool llvm::X86Subtarget::isCallingConvWin64 ( CallingConv::ID  CC) const
inline

◆ isLegalToCallImmediateAddr()

bool X86Subtarget::isLegalToCallImmediateAddr ( ) const

Return true if the subtarget allows calls to immediate address.

Definition at line 248 of file X86Subtarget.cpp.

References llvm::TargetMachine::getRelocationModel(), isTargetELF(), isTargetWin32(), and llvm::Reloc::Static.

◆ isOSWindows()

bool llvm::X86Subtarget::isOSWindows ( ) const
inline

◆ isPICStyleGOT()

bool llvm::X86Subtarget::isPICStyleGOT ( ) const
inline

◆ isPICStyleRIPRel()

bool llvm::X86Subtarget::isPICStyleRIPRel ( ) const
inline

◆ isPICStyleStubPIC()

bool llvm::X86Subtarget::isPICStyleStubPIC ( ) const
inline

◆ isPositionIndependent()

bool X86Subtarget::isPositionIndependent ( ) const

◆ isTarget64BitILP32()

bool llvm::X86Subtarget::isTarget64BitILP32 ( ) const
inline

◆ isTarget64BitLP64()

bool llvm::X86Subtarget::isTarget64BitLP64 ( ) const
inline

◆ isTargetAndroid()

bool llvm::X86Subtarget::isTargetAndroid ( ) const
inline

◆ isTargetCOFF()

bool llvm::X86Subtarget::isTargetCOFF ( ) const
inline

◆ isTargetCygMing()

bool llvm::X86Subtarget::isTargetCygMing ( ) const
inline

◆ isTargetDarwin()

bool llvm::X86Subtarget::isTargetDarwin ( ) const
inline

◆ isTargetDragonFly()

bool llvm::X86Subtarget::isTargetDragonFly ( ) const
inline

◆ isTargetELF()

bool llvm::X86Subtarget::isTargetELF ( ) const
inline

◆ isTargetFreeBSD()

bool llvm::X86Subtarget::isTargetFreeBSD ( ) const
inline

◆ isTargetFuchsia()

bool llvm::X86Subtarget::isTargetFuchsia ( ) const
inline

◆ isTargetGlibc()

bool llvm::X86Subtarget::isTargetGlibc ( ) const
inline

Definition at line 283 of file X86Subtarget.h.

References llvm::Triple::isOSGlibc().

◆ isTargetKFreeBSD()

bool llvm::X86Subtarget::isTargetKFreeBSD ( ) const
inline

Definition at line 282 of file X86Subtarget.h.

References llvm::Triple::isOSKFreeBSD().

◆ isTargetLinux()

bool llvm::X86Subtarget::isTargetLinux ( ) const
inline

◆ isTargetMachO()

bool llvm::X86Subtarget::isTargetMachO ( ) const
inline

◆ isTargetMCU()

bool llvm::X86Subtarget::isTargetMCU ( ) const
inline

Definition at line 288 of file X86Subtarget.h.

References llvm::Triple::isOSIAMCU().

Referenced by computeBytesPoppedByCalleeForSRet(), and hasCalleePopSRet().

◆ isTargetNaCl()

bool llvm::X86Subtarget::isTargetNaCl ( ) const
inline

Definition at line 285 of file X86Subtarget.h.

References llvm::Triple::isOSNaCl().

Referenced by isTargetNaCl32(), and isTargetNaCl64().

◆ isTargetNaCl32()

bool llvm::X86Subtarget::isTargetNaCl32 ( ) const
inline

Definition at line 286 of file X86Subtarget.h.

References is64Bit(), and isTargetNaCl().

◆ isTargetNaCl64()

bool llvm::X86Subtarget::isTargetNaCl64 ( ) const
inline

Definition at line 287 of file X86Subtarget.h.

References is64Bit(), and isTargetNaCl().

Referenced by llvm::X86FrameLowering::X86FrameLowering().

◆ isTargetPS()

bool llvm::X86Subtarget::isTargetPS ( ) const
inline

Definition at line 275 of file X86Subtarget.h.

References llvm::Triple::isPS().

Referenced by llvm::X86TargetLowering::X86TargetLowering().

◆ isTargetSolaris()

bool llvm::X86Subtarget::isTargetSolaris ( ) const
inline

Definition at line 274 of file X86Subtarget.h.

References llvm::Triple::isOSSolaris().

◆ isTargetWin32()

bool llvm::X86Subtarget::isTargetWin32 ( ) const
inline

◆ isTargetWin64()

bool llvm::X86Subtarget::isTargetWin64 ( ) const
inline

◆ isTargetWindowsCoreCLR()

bool llvm::X86Subtarget::isTargetWindowsCoreCLR ( ) const
inline

◆ isTargetWindowsCygwin()

bool llvm::X86Subtarget::isTargetWindowsCygwin ( ) const
inline

Definition at line 299 of file X86Subtarget.h.

References llvm::Triple::isWindowsCygwinEnvironment().

◆ isTargetWindowsGNU()

bool llvm::X86Subtarget::isTargetWindowsGNU ( ) const
inline

Definition at line 303 of file X86Subtarget.h.

References llvm::Triple::isWindowsGNUEnvironment().

◆ isTargetWindowsItanium()

bool llvm::X86Subtarget::isTargetWindowsItanium ( ) const
inline

◆ isTargetWindowsMSVC()

bool llvm::X86Subtarget::isTargetWindowsMSVC ( ) const
inline

◆ isXRaySupported()

bool llvm::X86Subtarget::isXRaySupported ( ) const
inlineoverride

Definition at line 262 of file X86Subtarget.h.

References is64Bit().

◆ ParseSubtargetFeatures()

void llvm::X86Subtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  TuneCPU,
StringRef  FS 
)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

◆ setPICStyle()

void llvm::X86Subtarget::setPICStyle ( PICStyles::Style  Style)
inline

Definition at line 189 of file X86Subtarget.h.

Referenced by X86Subtarget().

◆ swiftAsyncContextIsDynamicallySet()

bool llvm::X86Subtarget::swiftAsyncContextIsDynamicallySet ( ) const
inline

Return whether FrameLowering should always set the "extended frame present" bit in FP, or set it based on a symbol in the runtime.

Definition at line 377 of file X86Subtarget.h.

References llvm::Triple::Darwin, getTargetTriple(), llvm::Triple::IOS, llvm::Triple::MacOSX, llvm::Triple::TvOS, and llvm::Triple::WatchOS.

Referenced by llvm::X86FrameLowering::emitPrologue().

◆ useAVX512Regs()

bool llvm::X86Subtarget::useAVX512Regs ( ) const
inline

◆ useBWIRegs()

bool llvm::X86Subtarget::useBWIRegs ( ) const
inline

◆ useIndirectThunkBranches()

bool llvm::X86Subtarget::useIndirectThunkBranches ( ) const
inline

◆ useIndirectThunkCalls()

bool llvm::X86Subtarget::useIndirectThunkCalls ( ) const
inline

Definition at line 231 of file X86Subtarget.h.

Referenced by llvm::X86FrameLowering::adjustForSegmentedStacks().


The documentation for this class was generated from the following files: