A MachineSchedStrategy implementation for AArch64 post RA scheduling. More...

#include "Target/AArch64/AArch64MachineScheduler.h"

Inheritance diagram for llvm::AArch64PostRASchedStrategy:

[legend]

Public Member Functions
	AArch64PostRASchedStrategy (const MachineSchedContext *C)

Public Member Functions inherited from llvm::PostGenericScheduler
	PostGenericScheduler (const MachineSchedContext *C)

	~PostGenericScheduler () override=default

void	initPolicy (MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs) override
	Optionally override the per-region scheduling policy.

bool	shouldTrackPressure () const override
	PostRA scheduling does not track pressure.

void	initialize (ScheduleDAGMI *Dag) override
	Initialize the strategy after building the DAG for a new region.

void	registerRoots () override
	Notify this strategy that all roots have been released (including those that depend on EntrySU or ExitSU).

SUnit *	pickNode (bool &IsTopNode) override
	Pick the next node to schedule.

SUnit *	pickNodeBidirectional (bool &IsTopNode)
	Pick the best candidate node from either the top or bottom queue.

void	scheduleTree (unsigned SubtreeID) override
	Scheduler callback to notify that a new subtree is scheduled.

void	schedNode (SUnit *SU, bool IsTopNode) override
	Called after ScheduleDAGMI has scheduled an instruction and updated scheduled/remaining flags in the DAG nodes.

void	releaseTopNode (SUnit *SU) override
	When all predecessor dependencies have been resolved, free this node for top-down scheduling.

void	releaseBottomNode (SUnit *SU) override
	When all successor dependencies have been resolved, free this node for bottom-up scheduling.

Public Member Functions inherited from llvm::MachineSchedStrategy
virtual	~MachineSchedStrategy ()=default

virtual void	initPolicy (MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs)
	Optionally override the per-region scheduling policy.

virtual void	dumpPolicy () const

virtual bool	shouldTrackPressure () const
	Check if pressure tracking is needed before building the DAG and initializing this strategy.

virtual bool	shouldTrackLaneMasks () const
	Returns true if lanemasks should be tracked.

virtual bool	doMBBSchedRegionsTopDown () const

virtual void	initialize (ScheduleDAGMI *DAG)=0
	Initialize the strategy after building the DAG for a new region.

virtual void	enterMBB (MachineBasicBlock *MBB)
	Tell the strategy that MBB is about to be processed.

virtual void	leaveMBB ()
	Tell the strategy that current MBB is done.

virtual void	registerRoots ()
	Notify this strategy that all roots have been released (including those that depend on EntrySU or ExitSU).

virtual SUnit *	pickNode (bool &IsTopNode)=0
	Pick the next node to schedule, or return NULL.

virtual void	scheduleTree (unsigned SubtreeID)
	Scheduler callback to notify that a new subtree is scheduled.

virtual void	schedNode (SUnit *SU, bool IsTopNode)=0
	Notify MachineSchedStrategy that ScheduleDAGMI has scheduled an instruction and updated scheduled/remaining flags in the DAG nodes.

virtual void	releaseTopNode (SUnit *SU)=0
	When all predecessor dependencies have been resolved, free this node for top-down scheduling.

virtual void	releaseBottomNode (SUnit *SU)=0
	When all successor dependencies have been resolved, free this node for bottom-up scheduling.

Protected Member Functions
bool	tryCandidate (SchedCandidate &Cand, SchedCandidate &TryCand) override
	Apply a set of heuristics to a new candidate for PostRA scheduling.

Protected Member Functions inherited from llvm::PostGenericScheduler
virtual bool	tryCandidate (SchedCandidate &Cand, SchedCandidate &TryCand)
	Apply a set of heuristics to a new candidate for PostRA scheduling.

void	pickNodeFromQueue (SchedBoundary &Zone, SchedCandidate &Cand)

Protected Member Functions inherited from llvm::GenericSchedulerBase
	GenericSchedulerBase (const MachineSchedContext *C)

void	setPolicy (CandPolicy &Policy, bool IsPostRA, SchedBoundary &CurrZone, SchedBoundary *OtherZone)
	Set the CandPolicy given a scheduling zone given the current resources and latencies inside and outside the zone.

void	traceCandidate (const SchedCandidate &Cand)

Additional Inherited Members
Public Types inherited from llvm::GenericSchedulerBase
enum	CandReason : uint8_t { NoCand , Only1 , PhysReg , RegExcess , RegCritical , Stall , Cluster , Weak , RegMax , ResourceReduce , ResourceDemand , BotHeightReduce , BotPathReduce , TopDepthReduce , TopPathReduce , NextDefUse , NodeOrder }
	Represent the type of SchedCandidate found within a single queue. More...

Static Public Member Functions inherited from llvm::GenericSchedulerBase
static const char *	getReasonStr (GenericSchedulerBase::CandReason Reason)

Protected Attributes inherited from llvm::PostGenericScheduler
ScheduleDAGMI *	DAG = nullptr

SchedBoundary	Top

SchedBoundary	Bot

MachineSchedPolicy	RegionPolicy

SchedCandidate	TopCand
	Candidate last picked from Top boundary.

SchedCandidate	BotCand
	Candidate last picked from Bot boundary.

Protected Attributes inherited from llvm::GenericSchedulerBase
const MachineSchedContext *	Context

const TargetSchedModel *	SchedModel = nullptr

const TargetRegisterInfo *	TRI = nullptr

SchedRemainder	Rem

Detailed Description

A MachineSchedStrategy implementation for AArch64 post RA scheduling.

Definition at line 21 of file AArch64MachineScheduler.h.

Constructor & Destructor Documentation

◆ AArch64PostRASchedStrategy()

llvm::AArch64PostRASchedStrategy::AArch64PostRASchedStrategy ( const MachineSchedContext * C )

inline

Definition at line 23 of file AArch64MachineScheduler.h.

Member Function Documentation

◆ tryCandidate()

bool AArch64PostRASchedStrategy::tryCandidate	(	SchedCandidate &	Cand,
		SchedCandidate &	TryCand
	)

overrideprotectedvirtual

Apply a set of heuristics to a new candidate for PostRA scheduling.

Parameters

Cand	provides the policy and current best candidate.
TryCand	refers to the next SUnit candidate, otherwise uninitialized.

Returns: true if TryCand is better than Cand (Reason is NOT NoCand)

Reimplemented from llvm::PostGenericScheduler.

Definition at line 61 of file AArch64MachineScheduler.cpp.

References llvm::SUnit::getInstr(), llvm::GenericSchedulerBase::SchedCandidate::isValid(), mayOverlapWrite(), needReorderStoreMI(), llvm::GenericSchedulerBase::NodeOrder, llvm::GenericSchedulerBase::SchedCandidate::Reason, llvm::GenericSchedulerBase::SchedCandidate::SU, and llvm::PostGenericScheduler::tryCandidate().

The documentation for this class was generated from the following files:

lib/Target/AArch64/AArch64MachineScheduler.h
lib/Target/AArch64/AArch64MachineScheduler.cpp

Public Member Functions

Protected Member Functions

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ AArch64PostRASchedStrategy()

Member Function Documentation

◆ tryCandidate()