LLVM  17.0.0git
Classes | Enumerations | Functions | Variables
llvm::AArch64 Namespace Reference

Classes

struct  ArchInfo
 
struct  CpuAlias
 
struct  CpuInfo
 
struct  ExtensionInfo
 

Enumerations

enum  CPUFeatures {
  FEAT_RNG, FEAT_FLAGM, FEAT_FLAGM2, FEAT_FP16FML,
  FEAT_DOTPROD, FEAT_SM4, FEAT_RDM, FEAT_LSE,
  FEAT_FP, FEAT_SIMD, FEAT_CRC, FEAT_SHA1,
  FEAT_SHA2, FEAT_SHA3, FEAT_AES, FEAT_PMULL,
  FEAT_FP16, FEAT_DIT, FEAT_DPB, FEAT_DPB2,
  FEAT_JSCVT, FEAT_FCMA, FEAT_RCPC, FEAT_RCPC2,
  FEAT_FRINTTS, FEAT_DGH, FEAT_I8MM, FEAT_BF16,
  FEAT_EBF16, FEAT_RPRES, FEAT_SVE, FEAT_SVE_BF16,
  FEAT_SVE_EBF16, FEAT_SVE_I8MM, FEAT_SVE_F32MM, FEAT_SVE_F64MM,
  FEAT_SVE2, FEAT_SVE_AES, FEAT_SVE_PMULL128, FEAT_SVE_BITPERM,
  FEAT_SVE_SHA3, FEAT_SVE_SM4, FEAT_SME, FEAT_MEMTAG,
  FEAT_MEMTAG2, FEAT_MEMTAG3, FEAT_SB, FEAT_PREDRES,
  FEAT_SSBS, FEAT_SSBS2, FEAT_BTI, FEAT_LS64,
  FEAT_LS64_V, FEAT_LS64_ACCDATA, FEAT_WFXT, FEAT_SME_F64,
  FEAT_SME_I64, FEAT_SME2, FEAT_MAX
}
 
enum  ArchExtKind : uint64_t {
  AEK_NONE = 1, AEK_CRC = 1 << 1, AEK_CRYPTO = 1 << 2, AEK_FP = 1 << 3,
  AEK_SIMD = 1 << 4, AEK_FP16 = 1 << 5, AEK_PROFILE = 1 << 6, AEK_RAS = 1 << 7,
  AEK_LSE = 1 << 8, AEK_SVE = 1 << 9, AEK_DOTPROD = 1 << 10, AEK_RCPC = 1 << 11,
  AEK_RDM = 1 << 12, AEK_SM4 = 1 << 13, AEK_SHA3 = 1 << 14, AEK_SHA2 = 1 << 15,
  AEK_AES = 1 << 16, AEK_FP16FML = 1 << 17, AEK_RAND = 1 << 18, AEK_MTE = 1 << 19,
  AEK_SSBS = 1 << 20, AEK_SB = 1 << 21, AEK_PREDRES = 1 << 22, AEK_SVE2 = 1 << 23,
  AEK_SVE2AES = 1 << 24, AEK_SVE2SM4 = 1 << 25, AEK_SVE2SHA3 = 1 << 26, AEK_SVE2BITPERM = 1 << 27,
  AEK_TME = 1 << 28, AEK_BF16 = 1 << 29, AEK_I8MM = 1 << 30, AEK_F32MM = 1ULL << 31,
  AEK_F64MM = 1ULL << 32, AEK_LS64 = 1ULL << 33, AEK_BRBE = 1ULL << 34, AEK_PAUTH = 1ULL << 35,
  AEK_FLAGM = 1ULL << 36, AEK_SME = 1ULL << 37, AEK_SMEF64F64 = 1ULL << 38, AEK_SMEI16I64 = 1ULL << 39,
  AEK_HBC = 1ULL << 40, AEK_MOPS = 1ULL << 41, AEK_PERFMON = 1ULL << 42, AEK_SME2 = 1ULL << 43,
  AEK_SVE2p1 = 1ULL << 44, AEK_SME2p1 = 1ULL << 45, AEK_B16B16 = 1ULL << 46, AEK_SMEF16F16 = 1ULL << 47,
  AEK_CSSC = 1ULL << 48, AEK_RCPC3 = 1ULL << 49, AEK_THE = 1ULL << 50, AEK_D128 = 1ULL << 51,
  AEK_LSE128 = 1ULL << 52, AEK_SPECRES2 = 1ULL << 53, AEK_RASv2 = 1ULL << 54, AEK_ITE = 1ULL << 55
}
 
enum  ArchProfile { AProfile = 'A', RProfile = 'R', InvalidProfile = '?' }
 
enum  ElementSizeType {
  ElementSizeMask = TSFLAG_ELEMENT_SIZE_TYPE(0x7), ElementSizeNone = TSFLAG_ELEMENT_SIZE_TYPE(0x0), ElementSizeB = TSFLAG_ELEMENT_SIZE_TYPE(0x1), ElementSizeH = TSFLAG_ELEMENT_SIZE_TYPE(0x2),
  ElementSizeS = TSFLAG_ELEMENT_SIZE_TYPE(0x3), ElementSizeD = TSFLAG_ELEMENT_SIZE_TYPE(0x4)
}
 
enum  DestructiveInstType {
  DestructiveInstTypeMask = TSFLAG_DESTRUCTIVE_INST_TYPE(0xf), NotDestructive = TSFLAG_DESTRUCTIVE_INST_TYPE(0x0), DestructiveOther = TSFLAG_DESTRUCTIVE_INST_TYPE(0x1), DestructiveUnary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x2),
  DestructiveBinaryImm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x3), DestructiveBinaryShImmUnpred = TSFLAG_DESTRUCTIVE_INST_TYPE(0x4), DestructiveBinary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x5), DestructiveBinaryComm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x6),
  DestructiveBinaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x7), DestructiveTernaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x8), DestructiveUnaryPassthru = TSFLAG_DESTRUCTIVE_INST_TYPE(0x9)
}
 
enum  FalseLaneType { FalseLanesMask = TSFLAG_FALSE_LANE_TYPE(0x3), FalseLanesZero = TSFLAG_FALSE_LANE_TYPE(0x1), FalseLanesUndef = TSFLAG_FALSE_LANE_TYPE(0x2) }
 
enum  SMEMatrixType {
  SMEMatrixTypeMask = TSFLAG_SME_MATRIX_TYPE(0x7), SMEMatrixNone = TSFLAG_SME_MATRIX_TYPE(0x0), SMEMatrixTileB = TSFLAG_SME_MATRIX_TYPE(0x1), SMEMatrixTileH = TSFLAG_SME_MATRIX_TYPE(0x2),
  SMEMatrixTileS = TSFLAG_SME_MATRIX_TYPE(0x3), SMEMatrixTileD = TSFLAG_SME_MATRIX_TYPE(0x4), SMEMatrixTileQ = TSFLAG_SME_MATRIX_TYPE(0x5), SMEMatrixArray = TSFLAG_SME_MATRIX_TYPE(0x6)
}
 
enum  Rounding {
  RN = 0, RP = 1, RM = 2, RZ = 3,
  rmMask = 3
}
 Possible values of current rounding mode, which is specified in bits 23:22 of FPCR. More...
 
enum  Fixups {
  fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind, fixup_aarch64_pcrel_adrp_imm21, fixup_aarch64_add_imm12, fixup_aarch64_ldst_imm12_scale1,
  fixup_aarch64_ldst_imm12_scale2, fixup_aarch64_ldst_imm12_scale4, fixup_aarch64_ldst_imm12_scale8, fixup_aarch64_ldst_imm12_scale16,
  fixup_aarch64_ldr_pcrel_imm19, fixup_aarch64_movw, fixup_aarch64_pcrel_branch14, fixup_aarch64_pcrel_branch19,
  fixup_aarch64_pcrel_branch26, fixup_aarch64_pcrel_call26, LastTargetFixupKind, NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
}
 
enum  OperandType { OPERAND_IMPLICIT_IMM_0 = MCOI::OPERAND_FIRST_TARGET }
 

Functions

bool getExtensionFeatures (uint64_t Extensions, std::vector< StringRef > &Features)
 
StringRef getArchExtFeature (StringRef ArchExt)
 
StringRef resolveCPUAlias (StringRef CPU)
 
std::optional< ArchInfogetArchForCpu (StringRef CPU)
 
std::optional< ArchInfoparseArch (StringRef Arch)
 
std::optional< ExtensionInfoparseArchExtension (StringRef Extension)
 
std::optional< CpuInfoparseCpu (StringRef Name)
 
void fillValidCPUArchList (SmallVectorImpl< StringRef > &Values)
 
bool isX18ReservedByDefault (const Triple &TT)
 
uint64_t getCpuSupportsMask (ArrayRef< StringRef > FeatureStrs)
 
int getSVEPseudoMap (uint16_t Opcode)
 
int getSVERevInstr (uint16_t Opcode)
 
int getSVENonRevInstr (uint16_t Opcode)
 
int getSMEPseudoMap (uint16_t Opcode)
 
FastISelcreateFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)
 

Variables

constexpr ExtensionInfo Extensions []
 
constexpr ArchInfo ARMV8A = { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", (AArch64::AEK_FP | AArch64::AEK_SIMD), }
 
constexpr ArchInfo ARMV8_1A = { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts | AArch64::AEK_CRC | AArch64::AEK_LSE | AArch64::AEK_RDM)}
 
constexpr ArchInfo ARMV8_2A = { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts | AArch64::AEK_RAS)}
 
constexpr ArchInfo ARMV8_3A = { VersionTuple{8, 3}, AProfile, "armv8.3-a", "+v8.3a", (ARMV8_2A.DefaultExts | AArch64::AEK_RCPC)}
 
constexpr ArchInfo ARMV8_4A = { VersionTuple{8, 4}, AProfile, "armv8.4-a", "+v8.4a", (ARMV8_3A.DefaultExts | AArch64::AEK_DOTPROD)}
 
constexpr ArchInfo ARMV8_5A = { VersionTuple{8, 5}, AProfile, "armv8.5-a", "+v8.5a", (ARMV8_4A.DefaultExts)}
 
constexpr ArchInfo ARMV8_6A = { VersionTuple{8, 6}, AProfile, "armv8.6-a", "+v8.6a", (ARMV8_5A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)}
 
constexpr ArchInfo ARMV8_7A = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)}
 
constexpr ArchInfo ARMV8_8A = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)}
 
constexpr ArchInfo ARMV8_9A = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)}
 
constexpr ArchInfo ARMV9A = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (ARMV8_5A.DefaultExts | AArch64::AEK_FP16 | AArch64::AEK_SVE | AArch64::AEK_SVE2)}
 
constexpr ArchInfo ARMV9_1A = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)}
 
constexpr ArchInfo ARMV9_2A = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)}
 
constexpr ArchInfo ARMV9_3A = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)}
 
constexpr ArchInfo ARMV9_4A = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)}
 
constexpr ArchInfo ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", ((ARMV8_5A.DefaultExts ^ AArch64::AEK_LSE) | AArch64::AEK_SSBS | AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SB), }
 
static constexpr std::array< const ArchInfo *, 16 > ArchInfos
 
constexpr CpuInfo CpuInfos []
 
constexpr CpuAlias CpuAliases [] = {{"grace", "neoverse-v2"}}
 
static const uint64_t InstrFlagIsWhile = TSFLAG_INSTR_FLAGS(0x1)
 
static const uint64_t InstrFlagIsPTestLike = TSFLAG_INSTR_FLAGS(0x2)
 
const unsigned RoundingBitsPos = 22
 
static constexpr unsigned SVEBitsPerBlock = 128
 
static constexpr unsigned SVEMaxBitsPerVector = 2048
 

Enumeration Type Documentation

◆ ArchExtKind

Enumerator
AEK_NONE 
AEK_CRC 
AEK_CRYPTO 
AEK_FP 
AEK_SIMD 
AEK_FP16 
AEK_PROFILE 
AEK_RAS 
AEK_LSE 
AEK_SVE 
AEK_DOTPROD 
AEK_RCPC 
AEK_RDM 
AEK_SM4 
AEK_SHA3 
AEK_SHA2 
AEK_AES 
AEK_FP16FML 
AEK_RAND 
AEK_MTE 
AEK_SSBS 
AEK_SB 
AEK_PREDRES 
AEK_SVE2 
AEK_SVE2AES 
AEK_SVE2SM4 
AEK_SVE2SHA3 
AEK_SVE2BITPERM 
AEK_TME 
AEK_BF16 
AEK_I8MM 
AEK_F32MM 
AEK_F64MM 
AEK_LS64 
AEK_BRBE 
AEK_PAUTH 
AEK_FLAGM 
AEK_SME 
AEK_SMEF64F64 
AEK_SMEI16I64 
AEK_HBC 
AEK_MOPS 
AEK_PERFMON 
AEK_SME2 
AEK_SVE2p1 
AEK_SME2p1 
AEK_B16B16 
AEK_SMEF16F16 
AEK_CSSC 
AEK_RCPC3 
AEK_THE 
AEK_D128 
AEK_LSE128 
AEK_SPECRES2 
AEK_RASv2 
AEK_ITE 

Definition at line 93 of file AArch64TargetParser.h.

◆ ArchProfile

Enumerator
AProfile 
RProfile 
InvalidProfile 

Definition at line 257 of file AArch64TargetParser.h.

◆ CPUFeatures

Enumerator
FEAT_RNG 
FEAT_FLAGM 
FEAT_FLAGM2 
FEAT_FP16FML 
FEAT_DOTPROD 
FEAT_SM4 
FEAT_RDM 
FEAT_LSE 
FEAT_FP 
FEAT_SIMD 
FEAT_CRC 
FEAT_SHA1 
FEAT_SHA2 
FEAT_SHA3 
FEAT_AES 
FEAT_PMULL 
FEAT_FP16 
FEAT_DIT 
FEAT_DPB 
FEAT_DPB2 
FEAT_JSCVT 
FEAT_FCMA 
FEAT_RCPC 
FEAT_RCPC2 
FEAT_FRINTTS 
FEAT_DGH 
FEAT_I8MM 
FEAT_BF16 
FEAT_EBF16 
FEAT_RPRES 
FEAT_SVE 
FEAT_SVE_BF16 
FEAT_SVE_EBF16 
FEAT_SVE_I8MM 
FEAT_SVE_F32MM 
FEAT_SVE_F64MM 
FEAT_SVE2 
FEAT_SVE_AES 
FEAT_SVE_PMULL128 
FEAT_SVE_BITPERM 
FEAT_SVE_SHA3 
FEAT_SVE_SM4 
FEAT_SME 
FEAT_MEMTAG 
FEAT_MEMTAG2 
FEAT_MEMTAG3 
FEAT_SB 
FEAT_PREDRES 
FEAT_SSBS 
FEAT_SSBS2 
FEAT_BTI 
FEAT_LS64 
FEAT_LS64_V 
FEAT_LS64_ACCDATA 
FEAT_WFXT 
FEAT_SME_F64 
FEAT_SME_I64 
FEAT_SME2 
FEAT_MAX 

Definition at line 28 of file AArch64TargetParser.h.

◆ DestructiveInstType

Enumerator
DestructiveInstTypeMask 
NotDestructive 
DestructiveOther 
DestructiveUnary 
DestructiveBinaryImm 
DestructiveBinaryShImmUnpred 
DestructiveBinary 
DestructiveBinaryComm 
DestructiveBinaryCommWithRev 
DestructiveTernaryCommWithRev 
DestructiveUnaryPassthru 

Definition at line 560 of file AArch64InstrInfo.h.

◆ ElementSizeType

Enumerator
ElementSizeMask 
ElementSizeNone 
ElementSizeB 
ElementSizeH 
ElementSizeS 
ElementSizeD 

Definition at line 551 of file AArch64InstrInfo.h.

◆ FalseLaneType

Enumerator
FalseLanesMask 
FalseLanesZero 
FalseLanesUndef 

Definition at line 574 of file AArch64InstrInfo.h.

◆ Fixups

Enumerator
fixup_aarch64_pcrel_adr_imm21 
fixup_aarch64_pcrel_adrp_imm21 
fixup_aarch64_add_imm12 
fixup_aarch64_ldst_imm12_scale1 
fixup_aarch64_ldst_imm12_scale2 
fixup_aarch64_ldst_imm12_scale4 
fixup_aarch64_ldst_imm12_scale8 
fixup_aarch64_ldst_imm12_scale16 
fixup_aarch64_ldr_pcrel_imm19 
fixup_aarch64_movw 
fixup_aarch64_pcrel_branch14 
fixup_aarch64_pcrel_branch19 
fixup_aarch64_pcrel_branch26 
fixup_aarch64_pcrel_call26 
LastTargetFixupKind 
NumTargetFixupKinds 

Definition at line 17 of file AArch64FixupKinds.h.

◆ OperandType

Enumerator
OPERAND_IMPLICIT_IMM_0 

Definition at line 71 of file AArch64MCTargetDesc.h.

◆ Rounding

Possible values of current rounding mode, which is specified in bits 23:22 of FPCR.

Enumerator
RN 
RP 
RM 
RZ 
rmMask 

Definition at line 496 of file AArch64ISelLowering.h.

◆ SMEMatrixType

Enumerator
SMEMatrixTypeMask 
SMEMatrixNone 
SMEMatrixTileB 
SMEMatrixTileH 
SMEMatrixTileS 
SMEMatrixTileD 
SMEMatrixTileQ 
SMEMatrixArray 

Definition at line 584 of file AArch64InstrInfo.h.

Function Documentation

◆ createFastISel()

FastISel * llvm::AArch64::createFastISel ( FunctionLoweringInfo funcInfo,
const TargetLibraryInfo libInfo 
)

◆ fillValidCPUArchList()

void llvm::AArch64::fillValidCPUArchList ( SmallVectorImpl< StringRef > &  Values)

Definition at line 90 of file AArch64TargetParser.cpp.

References CpuAliases, and CpuInfos.

◆ getArchExtFeature()

StringRef llvm::AArch64::getArchExtFeature ( StringRef  ArchExt)

◆ getArchForCpu()

std::optional< AArch64::ArchInfo > llvm::AArch64::getArchForCpu ( StringRef  CPU)

Definition at line 28 of file AArch64TargetParser.cpp.

References ARMV8A, and parseCpu().

◆ getCpuSupportsMask()

uint64_t llvm::AArch64::getCpuSupportsMask ( ArrayRef< StringRef FeatureStrs)

Definition at line 46 of file AArch64TargetParser.cpp.

References E, and Extensions.

◆ getExtensionFeatures()

bool llvm::AArch64::getExtensionFeatures ( uint64_t  Extensions,
std::vector< StringRef > &  Features 
)

Definition at line 58 of file AArch64TargetParser.cpp.

References E, and Extensions.

◆ getSMEPseudoMap()

int llvm::AArch64::getSMEPseudoMap ( uint16_t  Opcode)

◆ getSVENonRevInstr()

int llvm::AArch64::getSVENonRevInstr ( uint16_t  Opcode)

◆ getSVEPseudoMap()

int llvm::AArch64::getSVEPseudoMap ( uint16_t  Opcode)

◆ getSVERevInstr()

int llvm::AArch64::getSVERevInstr ( uint16_t  Opcode)

◆ isX18ReservedByDefault()

bool llvm::AArch64::isX18ReservedByDefault ( const Triple TT)

Definition at line 98 of file AArch64TargetParser.cpp.

Referenced by llvm::AArch64Subtarget::AArch64Subtarget().

◆ parseArch()

std::optional< AArch64::ArchInfo > llvm::AArch64::parseArch ( StringRef  Arch)

◆ parseArchExtension()

std::optional< AArch64::ExtensionInfo > llvm::AArch64::parseArchExtension ( StringRef  Extension)

Definition at line 117 of file AArch64TargetParser.cpp.

References Extensions.

◆ parseCpu()

std::optional< AArch64::CpuInfo > llvm::AArch64::parseCpu ( StringRef  Name)

Definition at line 125 of file AArch64TargetParser.cpp.

References CpuInfos, and resolveCPUAlias().

Referenced by getArchForCpu().

◆ resolveCPUAlias()

StringRef llvm::AArch64::resolveCPUAlias ( StringRef  CPU)

Definition at line 68 of file AArch64TargetParser.cpp.

References CpuAliases.

Referenced by parseCpu().

Variable Documentation

◆ ArchInfos

constexpr std::array<const ArchInfo *, 16> llvm::AArch64::ArchInfos
staticconstexpr

◆ ARMV8_1A

constexpr ArchInfo llvm::AArch64::ARMV8_1A = { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts | AArch64::AEK_CRC | AArch64::AEK_LSE | AArch64::AEK_RDM)}
inlineconstexpr

◆ ARMV8_2A

constexpr ArchInfo llvm::AArch64::ARMV8_2A = { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts | AArch64::AEK_RAS)}
inlineconstexpr

◆ ARMV8_3A

constexpr ArchInfo llvm::AArch64::ARMV8_3A = { VersionTuple{8, 3}, AProfile, "armv8.3-a", "+v8.3a", (ARMV8_2A.DefaultExts | AArch64::AEK_RCPC)}
inlineconstexpr

◆ ARMV8_4A

constexpr ArchInfo llvm::AArch64::ARMV8_4A = { VersionTuple{8, 4}, AProfile, "armv8.4-a", "+v8.4a", (ARMV8_3A.DefaultExts | AArch64::AEK_DOTPROD)}
inlineconstexpr

◆ ARMV8_5A

constexpr ArchInfo llvm::AArch64::ARMV8_5A = { VersionTuple{8, 5}, AProfile, "armv8.5-a", "+v8.5a", (ARMV8_4A.DefaultExts)}
inlineconstexpr

◆ ARMV8_6A

constexpr ArchInfo llvm::AArch64::ARMV8_6A = { VersionTuple{8, 6}, AProfile, "armv8.6-a", "+v8.6a", (ARMV8_5A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)}
inlineconstexpr

◆ ARMV8_7A

constexpr ArchInfo llvm::AArch64::ARMV8_7A = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)}
inlineconstexpr

◆ ARMV8_8A

constexpr ArchInfo llvm::AArch64::ARMV8_8A = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)}
inlineconstexpr

◆ ARMV8_9A

constexpr ArchInfo llvm::AArch64::ARMV8_9A = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)}
inlineconstexpr

◆ ARMV8A

constexpr ArchInfo llvm::AArch64::ARMV8A = { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", (AArch64::AEK_FP | AArch64::AEK_SIMD), }
inlineconstexpr

◆ ARMV8R

constexpr ArchInfo llvm::AArch64::ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", ((ARMV8_5A.DefaultExts ^ AArch64::AEK_LSE) | AArch64::AEK_SSBS | AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SB), }
inlineconstexpr

◆ ARMV9_1A

constexpr ArchInfo llvm::AArch64::ARMV9_1A = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)}
inlineconstexpr

◆ ARMV9_2A

constexpr ArchInfo llvm::AArch64::ARMV9_2A = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)}
inlineconstexpr

◆ ARMV9_3A

constexpr ArchInfo llvm::AArch64::ARMV9_3A = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)}
inlineconstexpr

◆ ARMV9_4A

constexpr ArchInfo llvm::AArch64::ARMV9_4A = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)}
inlineconstexpr

◆ ARMV9A

constexpr ArchInfo llvm::AArch64::ARMV9A = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (ARMV8_5A.DefaultExts | AArch64::AEK_FP16 | AArch64::AEK_SVE | AArch64::AEK_SVE2)}
inlineconstexpr

◆ CpuAliases

constexpr CpuAlias llvm::AArch64::CpuAliases[] = {{"grace", "neoverse-v2"}}
inlineconstexpr

Definition at line 507 of file AArch64TargetParser.h.

Referenced by fillValidCPUArchList(), and resolveCPUAlias().

◆ CpuInfos

constexpr CpuInfo llvm::AArch64::CpuInfos[]
inlineconstexpr

Definition at line 343 of file AArch64TargetParser.h.

Referenced by fillValidCPUArchList(), and parseCpu().

◆ Extensions

constexpr ExtensionInfo llvm::AArch64::Extensions[]
inlineconstexpr

◆ InstrFlagIsPTestLike

const uint64_t llvm::AArch64::InstrFlagIsPTestLike = TSFLAG_INSTR_FLAGS(0x2)
static

Definition at line 582 of file AArch64InstrInfo.h.

Referenced by llvm::AArch64InstrInfo::isPTestLikeOpcode().

◆ InstrFlagIsWhile

const uint64_t llvm::AArch64::InstrFlagIsWhile = TSFLAG_INSTR_FLAGS(0x1)
static

Definition at line 581 of file AArch64InstrInfo.h.

Referenced by llvm::AArch64InstrInfo::isWhileOpcode().

◆ RoundingBitsPos

const unsigned llvm::AArch64::RoundingBitsPos = 22

Definition at line 505 of file AArch64ISelLowering.h.

◆ SVEBitsPerBlock

constexpr unsigned llvm::AArch64::SVEBitsPerBlock = 128
staticconstexpr

◆ SVEMaxBitsPerVector

constexpr unsigned llvm::AArch64::SVEMaxBitsPerVector = 2048
staticconstexpr

Definition at line 870 of file AArch64BaseInfo.h.

Referenced by llvm::AArch64InstrInfo::getMemOpInfo().

llvm::AArch64::ARMV8_8A
constexpr ArchInfo ARMV8_8A
Definition: AArch64TargetParser.h:313
llvm::AArch64::ARMV8_4A
constexpr ArchInfo ARMV8_4A
Definition: AArch64TargetParser.h:309
llvm::AArch64::ARMV8_7A
constexpr ArchInfo ARMV8_7A
Definition: AArch64TargetParser.h:312
llvm::AArch64::ARMV9A
constexpr ArchInfo ARMV9A
Definition: AArch64TargetParser.h:315
llvm::AArch64::ARMV8_1A
constexpr ArchInfo ARMV8_1A
Definition: AArch64TargetParser.h:306
llvm::AArch64::ARMV9_4A
constexpr ArchInfo ARMV9_4A
Definition: AArch64TargetParser.h:319
llvm::AArch64::ARMV8_9A
constexpr ArchInfo ARMV8_9A
Definition: AArch64TargetParser.h:314
llvm::AArch64::ARMV9_3A
constexpr ArchInfo ARMV9_3A
Definition: AArch64TargetParser.h:318
llvm::AArch64::ARMV8R
constexpr ArchInfo ARMV8R
Definition: AArch64TargetParser.h:321
llvm::AArch64::ARMV8_3A
constexpr ArchInfo ARMV8_3A
Definition: AArch64TargetParser.h:308
llvm::AArch64::ARMV8_2A
constexpr ArchInfo ARMV8_2A
Definition: AArch64TargetParser.h:307
llvm::AArch64::ARMV8_5A
constexpr ArchInfo ARMV8_5A
Definition: AArch64TargetParser.h:310
llvm::AArch64::ARMV9_2A
constexpr ArchInfo ARMV9_2A
Definition: AArch64TargetParser.h:317
llvm::AArch64::ARMV8A
constexpr ArchInfo ARMV8A
Definition: AArch64TargetParser.h:305
llvm::AArch64::ARMV9_1A
constexpr ArchInfo ARMV9_1A
Definition: AArch64TargetParser.h:316
llvm::AArch64::ARMV8_6A
constexpr ArchInfo ARMV8_6A
Definition: AArch64TargetParser.h:311