Classes
struct	Alias

struct	ArchInfo

struct	CpuInfo

struct	ExtensionDependency

struct	ExtensionInfo

struct	ExtensionSet

struct	FMVInfo

Typedefs
using	ExtensionBitset = Bitset< AEK_NUM_EXTENSIONS >

Enumerations
enum	ArchProfile { AProfile = 'A' , RProfile = 'R' , InvalidProfile = '?' }

enum	ElementSizeType { ElementSizeMask = TSFLAG_ELEMENT_SIZE_TYPE(0x7) , ElementSizeNone = TSFLAG_ELEMENT_SIZE_TYPE(0x0) , ElementSizeB = TSFLAG_ELEMENT_SIZE_TYPE(0x1) , ElementSizeH = TSFLAG_ELEMENT_SIZE_TYPE(0x2) , ElementSizeS = TSFLAG_ELEMENT_SIZE_TYPE(0x3) , ElementSizeD = TSFLAG_ELEMENT_SIZE_TYPE(0x4) }

enum	DestructiveInstType { DestructiveInstTypeMask = TSFLAG_DESTRUCTIVE_INST_TYPE(0xf) , NotDestructive = TSFLAG_DESTRUCTIVE_INST_TYPE(0x0) , DestructiveOther = TSFLAG_DESTRUCTIVE_INST_TYPE(0x1) , DestructiveUnary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x2) , DestructiveBinaryImm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x3) , DestructiveBinaryShImmUnpred = TSFLAG_DESTRUCTIVE_INST_TYPE(0x4) , DestructiveBinary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x5) , DestructiveBinaryComm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x6) , DestructiveBinaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x7) , DestructiveTernaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x8) , DestructiveUnaryPassthru = TSFLAG_DESTRUCTIVE_INST_TYPE(0x9) }

enum	FalseLaneType { FalseLanesMask = TSFLAG_FALSE_LANE_TYPE(0x3) , FalseLanesZero = TSFLAG_FALSE_LANE_TYPE(0x1) , FalseLanesUndef = TSFLAG_FALSE_LANE_TYPE(0x2) }

enum	SMEMatrixType { SMEMatrixTypeMask = TSFLAG_SME_MATRIX_TYPE(0x7) , SMEMatrixNone = TSFLAG_SME_MATRIX_TYPE(0x0) , SMEMatrixTileB = TSFLAG_SME_MATRIX_TYPE(0x1) , SMEMatrixTileH = TSFLAG_SME_MATRIX_TYPE(0x2) , SMEMatrixTileS = TSFLAG_SME_MATRIX_TYPE(0x3) , SMEMatrixTileD = TSFLAG_SME_MATRIX_TYPE(0x4) , SMEMatrixTileQ = TSFLAG_SME_MATRIX_TYPE(0x5) , SMEMatrixArray = TSFLAG_SME_MATRIX_TYPE(0x6) }

enum	Rounding { RN = 0 , RP = 1 , RM = 2 , RZ = 3 , rmMask = 3 }
	Possible values of current rounding mode, which is specified in bits 23:22 of FPCR. More...

enum	Fixups { fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind , fixup_aarch64_pcrel_adrp_imm21 , fixup_aarch64_add_imm12 , fixup_aarch64_ldst_imm12_scale1 , fixup_aarch64_ldst_imm12_scale2 , fixup_aarch64_ldst_imm12_scale4 , fixup_aarch64_ldst_imm12_scale8 , fixup_aarch64_ldst_imm12_scale16 , fixup_aarch64_ldr_pcrel_imm19 , fixup_aarch64_movw , fixup_aarch64_pcrel_branch9 , fixup_aarch64_pcrel_branch14 , fixup_aarch64_pcrel_branch16 , fixup_aarch64_pcrel_branch19 , fixup_aarch64_pcrel_branch26 , fixup_aarch64_pcrel_call26 , LastTargetFixupKind , NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind }

enum	OperandType { OPERAND_IMPLICIT_IMM_0 = MCOI::OPERAND_FIRST_TARGET }

Functions
const std::vector< FMVInfo > &	getFMVInfo ()

const ExtensionInfo &	getExtensionByID (ArchExtKind(ExtID))

bool	getExtensionFeatures (const AArch64::ExtensionBitset &Extensions, std::vector< StringRef > &Features)

StringRef	getArchExtFeature (StringRef ArchExt)

StringRef	resolveCPUAlias (StringRef CPU)

const ArchInfo *	getArchForCpu (StringRef CPU)

const ArchInfo *	parseArch (StringRef Arch)

std::optional< ExtensionInfo >	targetFeatureToExtension (StringRef TargetFeature)

std::optional< ExtensionInfo >	parseArchExtension (StringRef Extension)

std::optional< FMVInfo >	parseFMVExtension (StringRef Extension)

std::optional< CpuInfo >	parseCpu (StringRef Name)

void	fillValidCPUArchList (SmallVectorImpl< StringRef > &Values)

bool	isX18ReservedByDefault (const Triple &TT)

uint64_t	getFMVPriority (ArrayRef< StringRef > Features)

uint64_t	getCpuSupportsMask (ArrayRef< StringRef > Features)

void	PrintSupportedExtensions ()

void	printEnabledExtensions (const std::set< StringRef > &EnabledFeatureNames)

int	getSVEPseudoMap (uint16_t Opcode)

int	getSVERevInstr (uint16_t Opcode)

int	getSVENonRevInstr (uint16_t Opcode)

int	getSMEPseudoMap (uint16_t Opcode)

ArrayRef< MCPhysReg >	getGPRArgRegs ()

ArrayRef< MCPhysReg >	getFPRArgRegs ()

FastISel *	createFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)

Variables
static const uint64_t	InstrFlagIsWhile = TSFLAG_INSTR_FLAGS(0x1)

static const uint64_t	InstrFlagIsPTestLike = TSFLAG_INSTR_FLAGS(0x2)

const unsigned	RoundingBitsPos = 22

const uint64_t	ReservedFPControlBits = 0xfffffffff80040f8

const unsigned	StackProbeMaxUnprobedStack = 1024
	Maximum allowed number of unprobed bytes above SP at an ABI boundary.

const unsigned	StackProbeMaxLoopUnroll = 4
	Maximum number of iterations to unroll for a constant size probing loop.

static constexpr unsigned	SVEBitsPerBlock = 128

static constexpr unsigned	SVEMaxBitsPerVector = 2048

Typedef Documentation

◆ ExtensionBitset

using llvm::AArch64::ExtensionBitset = typedef Bitset<AEK_NUM_EXTENSIONS>

Definition at line 48 of file AArch64TargetParser.h.

Enumeration Type Documentation

◆ ArchProfile

enum llvm::AArch64::ArchProfile

Enumerator
AProfile
RProfile
InvalidProfile

Definition at line 96 of file AArch64TargetParser.h.

◆ DestructiveInstType

enum llvm::AArch64::DestructiveInstType

Enumerator
DestructiveInstTypeMask
NotDestructive
DestructiveOther
DestructiveUnary
DestructiveBinaryImm
DestructiveBinaryShImmUnpred
DestructiveBinary
DestructiveBinaryComm
DestructiveBinaryCommWithRev
DestructiveTernaryCommWithRev
DestructiveUnaryPassthru

Definition at line 783 of file AArch64InstrInfo.h.

◆ ElementSizeType

enum llvm::AArch64::ElementSizeType

Enumerator
ElementSizeMask
ElementSizeNone
ElementSizeB
ElementSizeH
ElementSizeS
ElementSizeD

Definition at line 774 of file AArch64InstrInfo.h.

◆ FalseLaneType

enum llvm::AArch64::FalseLaneType

Enumerator
FalseLanesMask
FalseLanesZero
FalseLanesUndef

Definition at line 797 of file AArch64InstrInfo.h.

◆ Fixups

enum llvm::AArch64::Fixups

Enumerator
fixup_aarch64_pcrel_adr_imm21
fixup_aarch64_pcrel_adrp_imm21
fixup_aarch64_add_imm12
fixup_aarch64_ldst_imm12_scale1
fixup_aarch64_ldst_imm12_scale2
fixup_aarch64_ldst_imm12_scale4
fixup_aarch64_ldst_imm12_scale8
fixup_aarch64_ldst_imm12_scale16
fixup_aarch64_ldr_pcrel_imm19
fixup_aarch64_movw
fixup_aarch64_pcrel_branch9
fixup_aarch64_pcrel_branch14
fixup_aarch64_pcrel_branch16
fixup_aarch64_pcrel_branch19
fixup_aarch64_pcrel_branch26
fixup_aarch64_pcrel_call26
LastTargetFixupKind
NumTargetFixupKinds

Definition at line 17 of file AArch64FixupKinds.h.

◆ OperandType

enum llvm::AArch64::OperandType

Enumerator
OPERAND_IMPLICIT_IMM_0

Definition at line 71 of file AArch64MCTargetDesc.h.

◆ Rounding

enum llvm::AArch64::Rounding

Possible values of current rounding mode, which is specified in bits 23:22 of FPCR.

Enumerator
RN
RP
RM
RZ
rmMask

Definition at line 539 of file AArch64ISelLowering.h.

◆ SMEMatrixType

enum llvm::AArch64::SMEMatrixType

Enumerator
SMEMatrixTypeMask
SMEMatrixNone
SMEMatrixTileB
SMEMatrixTileH
SMEMatrixTileS
SMEMatrixTileD
SMEMatrixTileQ
SMEMatrixArray

Definition at line 807 of file AArch64InstrInfo.h.

Function Documentation

◆ createFastISel()

FastISel * llvm::AArch64::createFastISel	(	FunctionLoweringInfo &	funcInfo,
		const TargetLibraryInfo *	libInfo
	)

Definition at line 5194 of file AArch64FastISel.cpp.

References llvm::FunctionLoweringInfo::Fn, llvm::SMEAttrs::hasAgnosticZAInterface(), llvm::SMEAttrs::hasStreamingCompatibleInterface(), llvm::SMEAttrs::hasStreamingInterfaceOrBody(), llvm::SMEAttrs::hasZAState(), and llvm::SMEAttrs::hasZT0State().

Referenced by llvm::AArch64TargetLowering::createFastISel().

◆ fillValidCPUArchList()

void llvm::AArch64::fillValidCPUArchList ( SmallVectorImpl< StringRef > & Values )

Definition at line 127 of file AArch64TargetParser.cpp.

References llvm::AArch64::Alias::AltName, llvm::CallingConv::C, llvm::SmallVectorTemplateBase< T, bool >::push_back(), and llvm::sort().

◆ getArchExtFeature()

StringRef llvm::AArch64::getArchExtFeature ( StringRef ArchExt )

Definition at line 115 of file AArch64TargetParser.cpp.

References assert(), llvm::StringRef::drop_front(), parseArchExtension(), and llvm::StringRef::starts_with().

◆ getArchForCpu()

const AArch64::ArchInfo * llvm::AArch64::getArchForCpu ( StringRef CPU )

Definition at line 36 of file AArch64TargetParser.cpp.

References parseCpu().

◆ getCpuSupportsMask()

uint64_t llvm::AArch64::getCpuSupportsMask ( ArrayRef< StringRef > Features )

Definition at line 80 of file AArch64TargetParser.cpp.

References llvm::AArch64::ExtensionSet::enable(), llvm::AArch64::ExtensionSet::Enabled, getFMVInfo(), Info, parseFMVExtension(), and llvm::Bitset< NumBits >::test().

◆ getExtensionByID()

const ExtensionInfo & llvm::AArch64::getExtensionByID ( ArchExtKind(ExtID) )

◆ getExtensionFeatures()

bool llvm::AArch64::getExtensionFeatures	(	const AArch64::ExtensionBitset &	Extensions,
		std::vector< StringRef > &	Features
	)

Definition at line 97 of file AArch64TargetParser.cpp.

References Extensions, and llvm::Bitset< NumBits >::test().

◆ getFMVInfo()

const std::vector< FMVInfo > & llvm::AArch64::getFMVInfo ( )

Referenced by getCpuSupportsMask(), getFMVPriority(), lookupFMVByID(), and parseFMVExtension().

◆ getFMVPriority()

uint64_t llvm::AArch64::getFMVPriority ( ArrayRef< StringRef > Features )

Definition at line 58 of file AArch64TargetParser.cpp.

References llvm::AArch64::ExtensionSet::enable(), llvm::AArch64::ExtensionSet::Enabled, getFMVInfo(), Info, lookupFMVByID(), parseFMVExtension(), targetFeatureToExtension(), and llvm::Bitset< NumBits >::test().

Referenced by llvm::AArch64TTIImpl::getFeatureMask().

◆ getFPRArgRegs()

ArrayRef< MCPhysReg > llvm::AArch64::getFPRArgRegs ( )

Definition at line 169 of file AArch64ISelLowering.cpp.

References FPRArgRegs.

◆ getGPRArgRegs()

ArrayRef< MCPhysReg > llvm::AArch64::getGPRArgRegs ( )

Definition at line 167 of file AArch64ISelLowering.cpp.

References GPRArgRegs.

◆ getSMEPseudoMap()

int llvm::AArch64::getSMEPseudoMap ( uint16_t Opcode )

Referenced by llvm::AArch64TargetLowering::EmitInstrWithCustomInserter().

◆ getSVENonRevInstr()

int llvm::AArch64::getSVENonRevInstr ( uint16_t Opcode )

◆ getSVEPseudoMap()

int llvm::AArch64::getSVEPseudoMap ( uint16_t Opcode )

◆ getSVERevInstr()

int llvm::AArch64::getSVERevInstr ( uint16_t Opcode )

◆ isX18ReservedByDefault()

bool llvm::AArch64::isX18ReservedByDefault ( const Triple & TT )

Definition at line 139 of file AArch64TargetParser.cpp.

Referenced by llvm::AArch64Subtarget::AArch64Subtarget().

◆ parseArch()

const AArch64::ArchInfo * llvm::AArch64::parseArch ( StringRef Arch )

Definition at line 145 of file AArch64TargetParser.cpp.

References A, checkArchVersion(), llvm::ARM::getArchSynonym(), and llvm::ARM::getCanonicalArchName().

◆ parseArchExtension()

std::optional< AArch64::ExtensionInfo > llvm::AArch64::parseArchExtension ( StringRef Extension )

Definition at line 159 of file AArch64TargetParser.cpp.

References A, llvm::StringRef::empty(), and Extensions.

Referenced by getArchExtFeature(), and llvm::AArch64::ExtensionSet::parseModifier().

◆ parseCpu()

std::optional< AArch64::CpuInfo > llvm::AArch64::parseCpu ( StringRef Name )

Definition at line 189 of file AArch64TargetParser.cpp.

References llvm::CallingConv::C, Name, and resolveCPUAlias().

Referenced by getArchForCpu().

◆ parseFMVExtension()

std::optional< AArch64::FMVInfo > llvm::AArch64::parseFMVExtension ( StringRef Extension )

Definition at line 169 of file AArch64TargetParser.cpp.

References getFMVInfo(), and I.

Referenced by getCpuSupportsMask(), and getFMVPriority().

◆ printEnabledExtensions()

void llvm::AArch64::printEnabledExtensions ( const std::set< StringRef > & EnabledFeatureNames )

Definition at line 219 of file AArch64TargetParser.cpp.

References llvm::format(), llvm::left_justify(), llvm::outs(), and targetFeatureToExtension().

◆ PrintSupportedExtensions()

void llvm::AArch64::PrintSupportedExtensions ( )

Definition at line 201 of file AArch64TargetParser.cpp.

References Extensions, llvm::format(), llvm::left_justify(), and llvm::outs().

◆ resolveCPUAlias()

StringRef llvm::AArch64::resolveCPUAlias ( StringRef CPU )

Definition at line 108 of file AArch64TargetParser.cpp.

References A, and Name.

Referenced by createAArch64MCSubtargetInfo(), and parseCpu().

◆ targetFeatureToExtension()

std::optional< AArch64::ExtensionInfo > llvm::AArch64::targetFeatureToExtension ( StringRef TargetFeature )

Definition at line 182 of file AArch64TargetParser.cpp.

References Extensions.

Referenced by getFMVPriority(), printEnabledExtensions(), and llvm::AArch64::ExtensionSet::reconstructFromParsedFeatures().

Variable Documentation

◆ InstrFlagIsPTestLike

const uint64_t llvm::AArch64::InstrFlagIsPTestLike = TSFLAG_INSTR_FLAGS(0x2)

static

Definition at line 805 of file AArch64InstrInfo.h.

Referenced by llvm::AArch64InstrInfo::isPTestLikeOpcode().

◆ InstrFlagIsWhile

const uint64_t llvm::AArch64::InstrFlagIsWhile = TSFLAG_INSTR_FLAGS(0x1)

static

Definition at line 804 of file AArch64InstrInfo.h.

Referenced by llvm::AArch64InstrInfo::isWhileOpcode().

◆ ReservedFPControlBits

const uint64_t llvm::AArch64::ReservedFPControlBits = 0xfffffffff80040f8

Definition at line 551 of file AArch64ISelLowering.h.

◆ RoundingBitsPos

const unsigned llvm::AArch64::RoundingBitsPos = 22

Definition at line 548 of file AArch64ISelLowering.h.

◆ StackProbeMaxLoopUnroll

const unsigned llvm::AArch64::StackProbeMaxLoopUnroll = 4

Maximum number of iterations to unroll for a constant size probing loop.

Definition at line 562 of file AArch64ISelLowering.h.

◆ StackProbeMaxUnprobedStack

const unsigned llvm::AArch64::StackProbeMaxUnprobedStack = 1024

Maximum allowed number of unprobed bytes above SP at an ABI boundary.

Definition at line 559 of file AArch64ISelLowering.h.

Referenced by llvm::AArch64FrameLowering::eliminateCallFramePseudoInstr().

◆ SVEBitsPerBlock

constexpr unsigned llvm::AArch64::SVEBitsPerBlock = 128

staticconstexpr

Definition at line 920 of file AArch64BaseInfo.h.

Referenced by findMoreOptimalIndexType(), GenerateFixedLengthSVETBL(), llvm::AArch64TTIImpl::getCastInstrCost(), getHistogramCost(), getPackedVectorTypeFromPredicateType(), instCombineSVECmpNE(), isAllActivePredicate(), isPackedVectorType(), isUnpackedVectorVT(), LowerSVEIntrinsicEXT(), performGatherLoadCombine(), performLD1Combine(), performScatterStoreCombine(), and llvm::AArch64Subtarget::useSVEForFixedLengthVectors().

◆ SVEMaxBitsPerVector

constexpr unsigned llvm::AArch64::SVEMaxBitsPerVector = 2048