LLVM 17.0.0git
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Classes | |
struct | ArchInfo |
struct | CpuAlias |
struct | CpuInfo |
struct | ExtensionInfo |
Enumerations | |
enum | CPUFeatures { FEAT_RNG , FEAT_FLAGM , FEAT_FLAGM2 , FEAT_FP16FML , FEAT_DOTPROD , FEAT_SM4 , FEAT_RDM , FEAT_LSE , FEAT_FP , FEAT_SIMD , FEAT_CRC , FEAT_SHA1 , FEAT_SHA2 , FEAT_SHA3 , FEAT_AES , FEAT_PMULL , FEAT_FP16 , FEAT_DIT , FEAT_DPB , FEAT_DPB2 , FEAT_JSCVT , FEAT_FCMA , FEAT_RCPC , FEAT_RCPC2 , FEAT_FRINTTS , FEAT_DGH , FEAT_I8MM , FEAT_BF16 , FEAT_EBF16 , FEAT_RPRES , FEAT_SVE , FEAT_SVE_BF16 , FEAT_SVE_EBF16 , FEAT_SVE_I8MM , FEAT_SVE_F32MM , FEAT_SVE_F64MM , FEAT_SVE2 , FEAT_SVE_AES , FEAT_SVE_PMULL128 , FEAT_SVE_BITPERM , FEAT_SVE_SHA3 , FEAT_SVE_SM4 , FEAT_SME , FEAT_MEMTAG , FEAT_MEMTAG2 , FEAT_MEMTAG3 , FEAT_SB , FEAT_PREDRES , FEAT_SSBS , FEAT_SSBS2 , FEAT_BTI , FEAT_LS64 , FEAT_LS64_V , FEAT_LS64_ACCDATA , FEAT_WFXT , FEAT_SME_F64 , FEAT_SME_I64 , FEAT_SME2 , FEAT_MAX } |
enum | ArchExtKind : uint64_t { AEK_NONE = 1 , AEK_CRC = 1 << 1 , AEK_CRYPTO = 1 << 2 , AEK_FP = 1 << 3 , AEK_SIMD = 1 << 4 , AEK_FP16 = 1 << 5 , AEK_PROFILE = 1 << 6 , AEK_RAS = 1 << 7 , AEK_LSE = 1 << 8 , AEK_SVE = 1 << 9 , AEK_DOTPROD = 1 << 10 , AEK_RCPC = 1 << 11 , AEK_RDM = 1 << 12 , AEK_SM4 = 1 << 13 , AEK_SHA3 = 1 << 14 , AEK_SHA2 = 1 << 15 , AEK_AES = 1 << 16 , AEK_FP16FML = 1 << 17 , AEK_RAND = 1 << 18 , AEK_MTE = 1 << 19 , AEK_SSBS = 1 << 20 , AEK_SB = 1 << 21 , AEK_PREDRES = 1 << 22 , AEK_SVE2 = 1 << 23 , AEK_SVE2AES = 1 << 24 , AEK_SVE2SM4 = 1 << 25 , AEK_SVE2SHA3 = 1 << 26 , AEK_SVE2BITPERM = 1 << 27 , AEK_TME = 1 << 28 , AEK_BF16 = 1 << 29 , AEK_I8MM = 1 << 30 , AEK_F32MM = 1ULL << 31 , AEK_F64MM = 1ULL << 32 , AEK_LS64 = 1ULL << 33 , AEK_BRBE = 1ULL << 34 , AEK_PAUTH = 1ULL << 35 , AEK_FLAGM = 1ULL << 36 , AEK_SME = 1ULL << 37 , AEK_SMEF64F64 = 1ULL << 38 , AEK_SMEI16I64 = 1ULL << 39 , AEK_HBC = 1ULL << 40 , AEK_MOPS = 1ULL << 41 , AEK_PERFMON = 1ULL << 42 , AEK_SME2 = 1ULL << 43 , AEK_SVE2p1 = 1ULL << 44 , AEK_SME2p1 = 1ULL << 45 , AEK_B16B16 = 1ULL << 46 , AEK_SMEF16F16 = 1ULL << 47 , AEK_CSSC = 1ULL << 48 , AEK_RCPC3 = 1ULL << 49 , AEK_THE = 1ULL << 50 , AEK_D128 = 1ULL << 51 , AEK_LSE128 = 1ULL << 52 , AEK_SPECRES2 = 1ULL << 53 , AEK_RASv2 = 1ULL << 54 , AEK_ITE = 1ULL << 55 , AEK_GCS = 1ULL << 56 } |
enum | ArchProfile { AProfile = 'A' , RProfile = 'R' , InvalidProfile = '?' } |
enum | ElementSizeType { ElementSizeMask = TSFLAG_ELEMENT_SIZE_TYPE(0x7) , ElementSizeNone = TSFLAG_ELEMENT_SIZE_TYPE(0x0) , ElementSizeB = TSFLAG_ELEMENT_SIZE_TYPE(0x1) , ElementSizeH = TSFLAG_ELEMENT_SIZE_TYPE(0x2) , ElementSizeS = TSFLAG_ELEMENT_SIZE_TYPE(0x3) , ElementSizeD = TSFLAG_ELEMENT_SIZE_TYPE(0x4) } |
enum | DestructiveInstType { DestructiveInstTypeMask = TSFLAG_DESTRUCTIVE_INST_TYPE(0xf) , NotDestructive = TSFLAG_DESTRUCTIVE_INST_TYPE(0x0) , DestructiveOther = TSFLAG_DESTRUCTIVE_INST_TYPE(0x1) , DestructiveUnary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x2) , DestructiveBinaryImm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x3) , DestructiveBinaryShImmUnpred = TSFLAG_DESTRUCTIVE_INST_TYPE(0x4) , DestructiveBinary = TSFLAG_DESTRUCTIVE_INST_TYPE(0x5) , DestructiveBinaryComm = TSFLAG_DESTRUCTIVE_INST_TYPE(0x6) , DestructiveBinaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x7) , DestructiveTernaryCommWithRev = TSFLAG_DESTRUCTIVE_INST_TYPE(0x8) , DestructiveUnaryPassthru = TSFLAG_DESTRUCTIVE_INST_TYPE(0x9) } |
enum | FalseLaneType { FalseLanesMask = TSFLAG_FALSE_LANE_TYPE(0x3) , FalseLanesZero = TSFLAG_FALSE_LANE_TYPE(0x1) , FalseLanesUndef = TSFLAG_FALSE_LANE_TYPE(0x2) } |
enum | SMEMatrixType { SMEMatrixTypeMask = TSFLAG_SME_MATRIX_TYPE(0x7) , SMEMatrixNone = TSFLAG_SME_MATRIX_TYPE(0x0) , SMEMatrixTileB = TSFLAG_SME_MATRIX_TYPE(0x1) , SMEMatrixTileH = TSFLAG_SME_MATRIX_TYPE(0x2) , SMEMatrixTileS = TSFLAG_SME_MATRIX_TYPE(0x3) , SMEMatrixTileD = TSFLAG_SME_MATRIX_TYPE(0x4) , SMEMatrixTileQ = TSFLAG_SME_MATRIX_TYPE(0x5) , SMEMatrixArray = TSFLAG_SME_MATRIX_TYPE(0x6) } |
enum | Rounding { RN = 0 , RP = 1 , RM = 2 , RZ = 3 , rmMask = 3 } |
Possible values of current rounding mode, which is specified in bits 23:22 of FPCR. More... | |
enum | Fixups { fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind , fixup_aarch64_pcrel_adrp_imm21 , fixup_aarch64_add_imm12 , fixup_aarch64_ldst_imm12_scale1 , fixup_aarch64_ldst_imm12_scale2 , fixup_aarch64_ldst_imm12_scale4 , fixup_aarch64_ldst_imm12_scale8 , fixup_aarch64_ldst_imm12_scale16 , fixup_aarch64_ldr_pcrel_imm19 , fixup_aarch64_movw , fixup_aarch64_pcrel_branch14 , fixup_aarch64_pcrel_branch19 , fixup_aarch64_pcrel_branch26 , fixup_aarch64_pcrel_call26 , LastTargetFixupKind , NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind } |
enum | OperandType { OPERAND_IMPLICIT_IMM_0 = MCOI::OPERAND_FIRST_TARGET } |
Functions | |
bool | getExtensionFeatures (uint64_t Extensions, std::vector< StringRef > &Features) |
StringRef | getArchExtFeature (StringRef ArchExt) |
StringRef | resolveCPUAlias (StringRef CPU) |
std::optional< ArchInfo > | getArchForCpu (StringRef CPU) |
std::optional< ArchInfo > | parseArch (StringRef Arch) |
std::optional< ExtensionInfo > | parseArchExtension (StringRef Extension) |
std::optional< CpuInfo > | parseCpu (StringRef Name) |
void | fillValidCPUArchList (SmallVectorImpl< StringRef > &Values) |
bool | isX18ReservedByDefault (const Triple &TT) |
uint64_t | getCpuSupportsMask (ArrayRef< StringRef > FeatureStrs) |
int | getSVEPseudoMap (uint16_t Opcode) |
int | getSVERevInstr (uint16_t Opcode) |
int | getSVENonRevInstr (uint16_t Opcode) |
int | getSMEPseudoMap (uint16_t Opcode) |
const ArrayRef< MCPhysReg > | getGPRArgRegs () |
const ArrayRef< MCPhysReg > | getFPRArgRegs () |
FastISel * | createFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo) |
Variables | |
constexpr ExtensionInfo | Extensions [] |
constexpr ArchInfo | ARMV8A = { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", (AArch64::AEK_FP | AArch64::AEK_SIMD), } |
constexpr ArchInfo | ARMV8_1A = { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts | AArch64::AEK_CRC | AArch64::AEK_LSE | AArch64::AEK_RDM)} |
constexpr ArchInfo | ARMV8_2A = { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts | AArch64::AEK_RAS)} |
constexpr ArchInfo | ARMV8_3A = { VersionTuple{8, 3}, AProfile, "armv8.3-a", "+v8.3a", (ARMV8_2A.DefaultExts | AArch64::AEK_RCPC)} |
constexpr ArchInfo | ARMV8_4A = { VersionTuple{8, 4}, AProfile, "armv8.4-a", "+v8.4a", (ARMV8_3A.DefaultExts | AArch64::AEK_DOTPROD)} |
constexpr ArchInfo | ARMV8_5A = { VersionTuple{8, 5}, AProfile, "armv8.5-a", "+v8.5a", (ARMV8_4A.DefaultExts)} |
constexpr ArchInfo | ARMV8_6A = { VersionTuple{8, 6}, AProfile, "armv8.6-a", "+v8.6a", (ARMV8_5A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)} |
constexpr ArchInfo | ARMV8_7A = { VersionTuple{8, 7}, AProfile, "armv8.7-a", "+v8.7a", (ARMV8_6A.DefaultExts)} |
constexpr ArchInfo | ARMV8_8A = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)} |
constexpr ArchInfo | ARMV8_9A = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)} |
constexpr ArchInfo | ARMV9A = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (ARMV8_5A.DefaultExts | AArch64::AEK_FP16 | AArch64::AEK_SVE | AArch64::AEK_SVE2)} |
constexpr ArchInfo | ARMV9_1A = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts | AArch64::AEK_BF16 | AArch64::AEK_I8MM)} |
constexpr ArchInfo | ARMV9_2A = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)} |
constexpr ArchInfo | ARMV9_3A = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts | AArch64::AEK_MOPS | AArch64::AEK_HBC)} |
constexpr ArchInfo | ARMV9_4A = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts | AArch64::AEK_SPECRES2 | AArch64::AEK_CSSC | AArch64::AEK_RASv2)} |
constexpr ArchInfo | ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", ((ARMV8_5A.DefaultExts ^ AArch64::AEK_LSE) | AArch64::AEK_SSBS | AArch64::AEK_FP16 | AArch64::AEK_FP16FML | AArch64::AEK_SB), } |
static constexpr std::array< const ArchInfo *, 16 > | ArchInfos |
constexpr CpuInfo | CpuInfos [] |
constexpr CpuAlias | CpuAliases [] = {{"grace", "neoverse-v2"}} |
static const uint64_t | InstrFlagIsWhile = TSFLAG_INSTR_FLAGS(0x1) |
static const uint64_t | InstrFlagIsPTestLike = TSFLAG_INSTR_FLAGS(0x2) |
const unsigned | RoundingBitsPos = 22 |
static constexpr unsigned | SVEBitsPerBlock = 128 |
static constexpr unsigned | SVEMaxBitsPerVector = 2048 |
Definition at line 99 of file AArch64TargetParser.h.
Enumerator | |
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AProfile | |
RProfile | |
InvalidProfile |
Definition at line 268 of file AArch64TargetParser.h.
Definition at line 31 of file AArch64TargetParser.h.
Definition at line 562 of file AArch64InstrInfo.h.
Enumerator | |
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ElementSizeMask | |
ElementSizeNone | |
ElementSizeB | |
ElementSizeH | |
ElementSizeS | |
ElementSizeD |
Definition at line 553 of file AArch64InstrInfo.h.
Enumerator | |
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FalseLanesMask | |
FalseLanesZero | |
FalseLanesUndef |
Definition at line 576 of file AArch64InstrInfo.h.
Definition at line 17 of file AArch64FixupKinds.h.
Enumerator | |
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OPERAND_IMPLICIT_IMM_0 |
Definition at line 71 of file AArch64MCTargetDesc.h.
Possible values of current rounding mode, which is specified in bits 23:22 of FPCR.
Enumerator | |
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RN | |
RP | |
RM | |
RZ | |
rmMask |
Definition at line 496 of file AArch64ISelLowering.h.
Enumerator | |
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SMEMatrixTypeMask | |
SMEMatrixNone | |
SMEMatrixTileB | |
SMEMatrixTileH | |
SMEMatrixTileS | |
SMEMatrixTileD | |
SMEMatrixTileQ | |
SMEMatrixArray |
Definition at line 586 of file AArch64InstrInfo.h.
FastISel * llvm::AArch64::createFastISel | ( | FunctionLoweringInfo & | funcInfo, |
const TargetLibraryInfo * | libInfo | ||
) |
Definition at line 5186 of file AArch64FastISel.cpp.
References llvm::SMEAttrs::hasStreamingBody(), llvm::SMEAttrs::hasStreamingInterface(), and llvm::SMEAttrs::hasZAState().
Referenced by llvm::AArch64TargetLowering::createFastISel().
void llvm::AArch64::fillValidCPUArchList | ( | SmallVectorImpl< StringRef > & | Values | ) |
Definition at line 90 of file AArch64TargetParser.cpp.
References llvm::CallingConv::C, CpuAliases, CpuInfos, and llvm::SmallVectorTemplateBase< T, bool >::push_back().
Definition at line 75 of file AArch64TargetParser.cpp.
References Extensions, llvm::StringRef::startswith(), and llvm::StringRef::substr().
std::optional< AArch64::ArchInfo > llvm::AArch64::getArchForCpu | ( | StringRef | CPU | ) |
Definition at line 28 of file AArch64TargetParser.cpp.
References ARMV8A, and parseCpu().
Definition at line 46 of file AArch64TargetParser.cpp.
References E, and Extensions.
bool llvm::AArch64::getExtensionFeatures | ( | uint64_t | Extensions, |
std::vector< StringRef > & | Features | ||
) |
Definition at line 58 of file AArch64TargetParser.cpp.
References E, and Extensions.
Definition at line 153 of file AArch64ISelLowering.cpp.
References FPRArgRegs.
Definition at line 151 of file AArch64ISelLowering.cpp.
References GPRArgRegs.
int llvm::AArch64::getSMEPseudoMap | ( | uint16_t | Opcode | ) |
Referenced by llvm::AArch64TargetLowering::EmitInstrWithCustomInserter().
int llvm::AArch64::getSVENonRevInstr | ( | uint16_t | Opcode | ) |
int llvm::AArch64::getSVEPseudoMap | ( | uint16_t | Opcode | ) |
int llvm::AArch64::getSVERevInstr | ( | uint16_t | Opcode | ) |
Definition at line 98 of file AArch64TargetParser.cpp.
Referenced by llvm::AArch64Subtarget::AArch64Subtarget().
std::optional< AArch64::ArchInfo > llvm::AArch64::parseArch | ( | StringRef | Arch | ) |
Definition at line 104 of file AArch64TargetParser.cpp.
References A, ArchInfos, checkArchVersion(), llvm::ARM::getArchSynonym(), and llvm::ARM::getCanonicalArchName().
std::optional< AArch64::ExtensionInfo > llvm::AArch64::parseArchExtension | ( | StringRef | Extension | ) |
Definition at line 117 of file AArch64TargetParser.cpp.
References A, and Extensions.
std::optional< AArch64::CpuInfo > llvm::AArch64::parseCpu | ( | StringRef | Name | ) |
Definition at line 125 of file AArch64TargetParser.cpp.
References llvm::CallingConv::C, CpuInfos, Name, and resolveCPUAlias().
Referenced by getArchForCpu().
Definition at line 68 of file AArch64TargetParser.cpp.
References A, CpuAliases, and Name.
Referenced by parseCpu().
Definition at line 338 of file AArch64TargetParser.h.
Referenced by llvm::AArch64::ArchInfo::findBySubArch(), and parseArch().
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Definition at line 319 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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Definition at line 320 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 321 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 322 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 323 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 324 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 325 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 326 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 327 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 318 of file AArch64TargetParser.h.
Referenced by getArchForCpu().
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inlineconstexpr |
Definition at line 334 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 329 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 330 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 331 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 332 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 328 of file AArch64TargetParser.h.
Referenced by ExpandCryptoAEK().
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inlineconstexpr |
Definition at line 553 of file AArch64TargetParser.h.
Referenced by fillValidCPUArchList(), and resolveCPUAlias().
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inlineconstexpr |
Definition at line 356 of file AArch64TargetParser.h.
Referenced by fillValidCPUArchList(), and parseCpu().
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Definition at line 182 of file AArch64TargetParser.h.
Referenced by getArchExtFeature(), getCpuSupportsMask(), getExtensionFeatures(), and parseArchExtension().
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Definition at line 584 of file AArch64InstrInfo.h.
Referenced by llvm::AArch64InstrInfo::isPTestLikeOpcode().
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Definition at line 583 of file AArch64InstrInfo.h.
Referenced by llvm::AArch64InstrInfo::isWhileOpcode().
Definition at line 505 of file AArch64ISelLowering.h.
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Definition at line 857 of file AArch64BaseInfo.h.
Referenced by findMoreOptimalIndexType(), llvm::AArch64TTIImpl::getCastInstrCost(), getPackedVectorTypeFromPredicateType(), instCombineSVECmpNE(), isAllActivePredicate(), isPackedVectorType(), LowerSVEIntrinsicEXT(), performGatherLoadCombine(), performLD1Combine(), performScatterStoreCombine(), and llvm::AArch64Subtarget::useSVEForFixedLengthVectors().
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Definition at line 858 of file AArch64BaseInfo.h.
Referenced by llvm::AArch64InstrInfo::getMemOpInfo().