33 AArch64ELFObjectWriter(uint8_t OSABI,
bool IsILP32);
35 ~AArch64ELFObjectWriter()
override =
default;
39 const MCFixup &Fixup,
bool IsPCRel)
const override;
45 AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI,
bool IsILP32)
50 #define R_CLS(rtype) \
51 IsILP32 ? ELF::R_AARCH64_P32_##rtype : ELF::R_AARCH64_##rtype
52 #define BAD_ILP32_MOV(lp64rtype) \
53 "ILP32 absolute MOV relocation not " \
54 "supported (LP64 eqv: " #lp64rtype ")"
63 case AArch64MCExpr::VK_ABS_G3:
66 case AArch64MCExpr::VK_ABS_G2:
69 case AArch64MCExpr::VK_ABS_G2_S:
72 case AArch64MCExpr::VK_ABS_G2_NC:
75 case AArch64MCExpr::VK_ABS_G1_S:
78 case AArch64MCExpr::VK_ABS_G1_NC:
81 case AArch64MCExpr::VK_DTPREL_G2:
84 case AArch64MCExpr::VK_DTPREL_G1_NC:
87 case AArch64MCExpr::VK_TPREL_G2:
90 case AArch64MCExpr::VK_TPREL_G1_NC:
93 case AArch64MCExpr::VK_GOTTPREL_G1:
96 case AArch64MCExpr::VK_GOTTPREL_G0_NC:
105 unsigned AArch64ELFObjectWriter::getRelocType(
MCContext &Ctx,
108 bool IsPCRel)
const {
115 bool IsNC = AArch64MCExpr::isNotChecked(RefKind);
118 Target.getSymA()->getKind() == MCSymbolRefExpr::VK_None ||
119 Target.getSymA()->getKind() == MCSymbolRefExpr::VK_PLT) &&
120 "Should only be expression-level modifiers here");
123 Target.getSymB()->getKind() == MCSymbolRefExpr::VK_None) &&
124 "Should only be expression-level modifiers here");
130 return ELF::R_AARCH64_NONE;
132 return R_CLS(PREL16);
134 return Target.getAccessVariant() == MCSymbolRefExpr::VK_PLT
141 "ILP32 8 byte PC relative data "
142 "relocation not supported (LP64 eqv: PREL64)");
143 return ELF::R_AARCH64_NONE;
145 return ELF::R_AARCH64_PREL64;
147 if (SymLoc != AArch64MCExpr::VK_ABS)
149 "invalid symbol kind for ADR relocation");
150 return R_CLS(ADR_PREL_LO21);
152 if (SymLoc == AArch64MCExpr::VK_ABS && !IsNC)
153 return R_CLS(ADR_PREL_PG_HI21);
154 if (SymLoc == AArch64MCExpr::VK_ABS && IsNC) {
157 "invalid fixup for 32-bit pcrel ADRP instruction "
159 return ELF::R_AARCH64_NONE;
161 return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
164 if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC)
165 return R_CLS(ADR_GOT_PAGE);
166 if (SymLoc == AArch64MCExpr::VK_GOTTPREL && !IsNC)
167 return R_CLS(TLSIE_ADR_GOTTPREL_PAGE21);
168 if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC)
169 return R_CLS(TLSDESC_ADR_PAGE21);
171 "invalid symbol kind for ADRP relocation");
172 return ELF::R_AARCH64_NONE;
174 return R_CLS(JUMP26);
176 return R_CLS(CALL26);
178 if (SymLoc == AArch64MCExpr::VK_GOTTPREL)
179 return R_CLS(TLSIE_LD_GOTTPREL_PREL19);
180 if (SymLoc == AArch64MCExpr::VK_GOT)
181 return R_CLS(GOT_LD_PREL19);
182 return R_CLS(LD_PREL_LO19);
184 return R_CLS(TSTBR14);
186 return R_CLS(CONDBR19);
189 return ELF::R_AARCH64_NONE;
193 return ELF::R_AARCH64_NONE;
194 switch (
Fixup.getTargetKind()) {
197 return ELF::R_AARCH64_NONE;
205 "ILP32 8 byte absolute data "
206 "relocation not supported (LP64 eqv: ABS64)");
207 return ELF::R_AARCH64_NONE;
209 return ELF::R_AARCH64_ABS64;
211 if (RefKind == AArch64MCExpr::VK_DTPREL_HI12)
212 return R_CLS(TLSLD_ADD_DTPREL_HI12);
213 if (RefKind == AArch64MCExpr::VK_TPREL_HI12)
214 return R_CLS(TLSLE_ADD_TPREL_HI12);
215 if (RefKind == AArch64MCExpr::VK_DTPREL_LO12_NC)
216 return R_CLS(TLSLD_ADD_DTPREL_LO12_NC);
217 if (RefKind == AArch64MCExpr::VK_DTPREL_LO12)
218 return R_CLS(TLSLD_ADD_DTPREL_LO12);
219 if (RefKind == AArch64MCExpr::VK_TPREL_LO12_NC)
220 return R_CLS(TLSLE_ADD_TPREL_LO12_NC);
221 if (RefKind == AArch64MCExpr::VK_TPREL_LO12)
222 return R_CLS(TLSLE_ADD_TPREL_LO12);
223 if (RefKind == AArch64MCExpr::VK_TLSDESC_LO12)
224 return R_CLS(TLSDESC_ADD_LO12);
225 if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
226 return R_CLS(ADD_ABS_LO12_NC);
229 "invalid fixup for add (uimm12) instruction");
230 return ELF::R_AARCH64_NONE;
232 if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
233 return R_CLS(LDST8_ABS_LO12_NC);
234 if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
235 return R_CLS(TLSLD_LDST8_DTPREL_LO12);
236 if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
237 return R_CLS(TLSLD_LDST8_DTPREL_LO12_NC);
238 if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
239 return R_CLS(TLSLE_LDST8_TPREL_LO12);
240 if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
241 return R_CLS(TLSLE_LDST8_TPREL_LO12_NC);
244 "invalid fixup for 8-bit load/store instruction");
245 return ELF::R_AARCH64_NONE;
247 if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
248 return R_CLS(LDST16_ABS_LO12_NC);
249 if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
250 return R_CLS(TLSLD_LDST16_DTPREL_LO12);
251 if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
252 return R_CLS(TLSLD_LDST16_DTPREL_LO12_NC);
253 if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
254 return R_CLS(TLSLE_LDST16_TPREL_LO12);
255 if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
256 return R_CLS(TLSLE_LDST16_TPREL_LO12_NC);
259 "invalid fixup for 16-bit load/store instruction");
260 return ELF::R_AARCH64_NONE;
262 if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
263 return R_CLS(LDST32_ABS_LO12_NC);
264 if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
265 return R_CLS(TLSLD_LDST32_DTPREL_LO12);
266 if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
267 return R_CLS(TLSLD_LDST32_DTPREL_LO12_NC);
268 if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
269 return R_CLS(TLSLE_LDST32_TPREL_LO12);
270 if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
271 return R_CLS(TLSLE_LDST32_TPREL_LO12_NC);
272 if (SymLoc == AArch64MCExpr::VK_GOT && IsNC) {
274 return ELF::R_AARCH64_P32_LD32_GOT_LO12_NC;
277 "LP64 4 byte unchecked GOT load/store relocation "
278 "not supported (ILP32 eqv: LD32_GOT_LO12_NC");
279 return ELF::R_AARCH64_NONE;
282 if (SymLoc == AArch64MCExpr::VK_GOT && !IsNC) {
285 "ILP32 4 byte checked GOT load/store relocation "
286 "not supported (unchecked eqv: LD32_GOT_LO12_NC)");
289 "LP64 4 byte checked GOT load/store relocation "
290 "not supported (unchecked/ILP32 eqv: "
291 "LD32_GOT_LO12_NC)");
293 return ELF::R_AARCH64_NONE;
295 if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
297 return ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC;
300 "LP64 32-bit load/store "
301 "relocation not supported (ILP32 eqv: "
302 "TLSIE_LD32_GOTTPREL_LO12_NC)");
303 return ELF::R_AARCH64_NONE;
306 if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC) {
308 return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12;
311 "LP64 4 byte TLSDESC load/store relocation "
312 "not supported (ILP32 eqv: TLSDESC_LD64_LO12)");
313 return ELF::R_AARCH64_NONE;
318 "invalid fixup for 32-bit load/store instruction "
319 "fixup_aarch64_ldst_imm12_scale4");
320 return ELF::R_AARCH64_NONE;
322 if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
323 return R_CLS(LDST64_ABS_LO12_NC);
324 if (SymLoc == AArch64MCExpr::VK_GOT && IsNC) {
326 AArch64MCExpr::getAddressFrag(RefKind);
328 if (AddressLoc == AArch64MCExpr::VK_LO15)
329 return ELF::R_AARCH64_LD64_GOTPAGE_LO15;
330 return ELF::R_AARCH64_LD64_GOT_LO12_NC;
333 "relocation not supported (LP64 eqv: "
334 "LD64_GOT_LO12_NC)");
335 return ELF::R_AARCH64_NONE;
338 if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
339 return R_CLS(TLSLD_LDST64_DTPREL_LO12);
340 if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
341 return R_CLS(TLSLD_LDST64_DTPREL_LO12_NC);
342 if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
343 return R_CLS(TLSLE_LDST64_TPREL_LO12);
344 if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
345 return R_CLS(TLSLE_LDST64_TPREL_LO12_NC);
346 if (SymLoc == AArch64MCExpr::VK_GOTTPREL && IsNC) {
348 return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
351 "relocation not supported (LP64 eqv: "
352 "TLSIE_LD64_GOTTPREL_LO12_NC)");
353 return ELF::R_AARCH64_NONE;
356 if (SymLoc == AArch64MCExpr::VK_TLSDESC) {
358 return ELF::R_AARCH64_TLSDESC_LD64_LO12;
361 "relocation not supported (LP64 eqv: "
362 "TLSDESC_LD64_LO12)");
363 return ELF::R_AARCH64_NONE;
367 "invalid fixup for 64-bit load/store instruction");
368 return ELF::R_AARCH64_NONE;
370 if (SymLoc == AArch64MCExpr::VK_ABS && IsNC)
371 return R_CLS(LDST128_ABS_LO12_NC);
372 if (SymLoc == AArch64MCExpr::VK_DTPREL && !IsNC)
373 return R_CLS(TLSLD_LDST128_DTPREL_LO12);
374 if (SymLoc == AArch64MCExpr::VK_DTPREL && IsNC)
375 return R_CLS(TLSLD_LDST128_DTPREL_LO12_NC);
376 if (SymLoc == AArch64MCExpr::VK_TPREL && !IsNC)
377 return R_CLS(TLSLE_LDST128_TPREL_LO12);
378 if (SymLoc == AArch64MCExpr::VK_TPREL && IsNC)
379 return R_CLS(TLSLE_LDST128_TPREL_LO12_NC);
382 "invalid fixup for 128-bit load/store instruction");
383 return ELF::R_AARCH64_NONE;
386 if (RefKind == AArch64MCExpr::VK_ABS_G3)
387 return ELF::R_AARCH64_MOVW_UABS_G3;
388 if (RefKind == AArch64MCExpr::VK_ABS_G2)
389 return ELF::R_AARCH64_MOVW_UABS_G2;
390 if (RefKind == AArch64MCExpr::VK_ABS_G2_S)
391 return ELF::R_AARCH64_MOVW_SABS_G2;
392 if (RefKind == AArch64MCExpr::VK_ABS_G2_NC)
393 return ELF::R_AARCH64_MOVW_UABS_G2_NC;
394 if (RefKind == AArch64MCExpr::VK_ABS_G1)
395 return R_CLS(MOVW_UABS_G1);
396 if (RefKind == AArch64MCExpr::VK_ABS_G1_S)
397 return ELF::R_AARCH64_MOVW_SABS_G1;
398 if (RefKind == AArch64MCExpr::VK_ABS_G1_NC)
399 return ELF::R_AARCH64_MOVW_UABS_G1_NC;
400 if (RefKind == AArch64MCExpr::VK_ABS_G0)
401 return R_CLS(MOVW_UABS_G0);
402 if (RefKind == AArch64MCExpr::VK_ABS_G0_S)
403 return R_CLS(MOVW_SABS_G0);
404 if (RefKind == AArch64MCExpr::VK_ABS_G0_NC)
405 return R_CLS(MOVW_UABS_G0_NC);
406 if (RefKind == AArch64MCExpr::VK_PREL_G3)
407 return ELF::R_AARCH64_MOVW_PREL_G3;
408 if (RefKind == AArch64MCExpr::VK_PREL_G2)
409 return ELF::R_AARCH64_MOVW_PREL_G2;
410 if (RefKind == AArch64MCExpr::VK_PREL_G2_NC)
411 return ELF::R_AARCH64_MOVW_PREL_G2_NC;
412 if (RefKind == AArch64MCExpr::VK_PREL_G1)
413 return R_CLS(MOVW_PREL_G1);
414 if (RefKind == AArch64MCExpr::VK_PREL_G1_NC)
415 return ELF::R_AARCH64_MOVW_PREL_G1_NC;
416 if (RefKind == AArch64MCExpr::VK_PREL_G0)
417 return R_CLS(MOVW_PREL_G0);
418 if (RefKind == AArch64MCExpr::VK_PREL_G0_NC)
419 return R_CLS(MOVW_PREL_G0_NC);
420 if (RefKind == AArch64MCExpr::VK_DTPREL_G2)
421 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G2;
422 if (RefKind == AArch64MCExpr::VK_DTPREL_G1)
423 return R_CLS(TLSLD_MOVW_DTPREL_G1);
424 if (RefKind == AArch64MCExpr::VK_DTPREL_G1_NC)
425 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC;
426 if (RefKind == AArch64MCExpr::VK_DTPREL_G0)
427 return R_CLS(TLSLD_MOVW_DTPREL_G0);
428 if (RefKind == AArch64MCExpr::VK_DTPREL_G0_NC)
429 return R_CLS(TLSLD_MOVW_DTPREL_G0_NC);
430 if (RefKind == AArch64MCExpr::VK_TPREL_G2)
431 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G2;
432 if (RefKind == AArch64MCExpr::VK_TPREL_G1)
433 return R_CLS(TLSLE_MOVW_TPREL_G1);
434 if (RefKind == AArch64MCExpr::VK_TPREL_G1_NC)
435 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC;
436 if (RefKind == AArch64MCExpr::VK_TPREL_G0)
437 return R_CLS(TLSLE_MOVW_TPREL_G0);
438 if (RefKind == AArch64MCExpr::VK_TPREL_G0_NC)
439 return R_CLS(TLSLE_MOVW_TPREL_G0_NC);
440 if (RefKind == AArch64MCExpr::VK_GOTTPREL_G1)
441 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
442 if (RefKind == AArch64MCExpr::VK_GOTTPREL_G0_NC)
443 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
445 "invalid fixup for movz/movk instruction");
446 return ELF::R_AARCH64_NONE;
449 return ELF::R_AARCH64_NONE;
456 std::unique_ptr<MCObjectTargetWriter>
458 return std::make_unique<AArch64ELFObjectWriter>(OSABI, IsILP32);