33 AArch64ELFObjectWriter(uint8_t OSABI,
bool IsILP32);
35 ~AArch64ELFObjectWriter()
override =
default;
47AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI,
bool IsILP32)
53 IsILP32 ? ELF::R_AARCH64_P32_##rtype : ELF::R_AARCH64_##rtype
54#define BAD_ILP32_MOV(lp64rtype) \
55 "ILP32 absolute MOV relocation not " \
56 "supported (LP64 eqv: " #lp64rtype ")"
107unsigned AArch64ELFObjectWriter::getRelocType(
MCContext &Ctx,
110 bool IsPCRel)
const {
122 "Should only be expression-level modifiers here");
126 "Should only be expression-level modifiers here");
132 return ELF::R_AARCH64_NONE;
134 return R_CLS(PREL16);
143 "ILP32 8 byte PC relative data "
144 "relocation not supported (LP64 eqv: PREL64)");
145 return ELF::R_AARCH64_NONE;
147 return ELF::R_AARCH64_PREL64;
151 "invalid symbol kind for ADR relocation");
152 return R_CLS(ADR_PREL_LO21);
155 return R_CLS(ADR_PREL_PG_HI21);
159 "invalid fixup for 32-bit pcrel ADRP instruction "
161 return ELF::R_AARCH64_NONE;
163 return ELF::R_AARCH64_ADR_PREL_PG_HI21_NC;
167 return R_CLS(ADR_GOT_PAGE);
169 return R_CLS(TLSIE_ADR_GOTTPREL_PAGE21);
171 return R_CLS(TLSDESC_ADR_PAGE21);
173 "invalid symbol kind for ADRP relocation");
174 return ELF::R_AARCH64_NONE;
176 return R_CLS(JUMP26);
178 return R_CLS(CALL26);
181 return R_CLS(TLSIE_LD_GOTTPREL_PREL19);
183 return R_CLS(GOT_LD_PREL19);
184 return R_CLS(LD_PREL_LO19);
186 return R_CLS(TSTBR14);
188 return R_CLS(CONDBR19);
191 return ELF::R_AARCH64_NONE;
195 return ELF::R_AARCH64_NONE;
196 switch (
Fixup.getTargetKind()) {
199 return ELF::R_AARCH64_NONE;
207 "ILP32 8 byte absolute data "
208 "relocation not supported (LP64 eqv: ABS64)");
209 return ELF::R_AARCH64_NONE;
211 return ELF::R_AARCH64_ABS64;
214 return R_CLS(TLSLD_ADD_DTPREL_HI12);
216 return R_CLS(TLSLE_ADD_TPREL_HI12);
218 return R_CLS(TLSLD_ADD_DTPREL_LO12_NC);
220 return R_CLS(TLSLD_ADD_DTPREL_LO12);
222 return R_CLS(TLSLE_ADD_TPREL_LO12_NC);
224 return R_CLS(TLSLE_ADD_TPREL_LO12);
226 return R_CLS(TLSDESC_ADD_LO12);
228 return R_CLS(ADD_ABS_LO12_NC);
231 "invalid fixup for add (uimm12) instruction");
232 return ELF::R_AARCH64_NONE;
235 return R_CLS(LDST8_ABS_LO12_NC);
237 return R_CLS(TLSLD_LDST8_DTPREL_LO12);
239 return R_CLS(TLSLD_LDST8_DTPREL_LO12_NC);
241 return R_CLS(TLSLE_LDST8_TPREL_LO12);
243 return R_CLS(TLSLE_LDST8_TPREL_LO12_NC);
246 "invalid fixup for 8-bit load/store instruction");
247 return ELF::R_AARCH64_NONE;
250 return R_CLS(LDST16_ABS_LO12_NC);
252 return R_CLS(TLSLD_LDST16_DTPREL_LO12);
254 return R_CLS(TLSLD_LDST16_DTPREL_LO12_NC);
256 return R_CLS(TLSLE_LDST16_TPREL_LO12);
258 return R_CLS(TLSLE_LDST16_TPREL_LO12_NC);
261 "invalid fixup for 16-bit load/store instruction");
262 return ELF::R_AARCH64_NONE;
265 return R_CLS(LDST32_ABS_LO12_NC);
267 return R_CLS(TLSLD_LDST32_DTPREL_LO12);
269 return R_CLS(TLSLD_LDST32_DTPREL_LO12_NC);
271 return R_CLS(TLSLE_LDST32_TPREL_LO12);
273 return R_CLS(TLSLE_LDST32_TPREL_LO12_NC);
276 return ELF::R_AARCH64_P32_LD32_GOT_LO12_NC;
279 "LP64 4 byte unchecked GOT load/store relocation "
280 "not supported (ILP32 eqv: LD32_GOT_LO12_NC");
281 return ELF::R_AARCH64_NONE;
287 "ILP32 4 byte checked GOT load/store relocation "
288 "not supported (unchecked eqv: LD32_GOT_LO12_NC)");
291 "LP64 4 byte checked GOT load/store relocation "
292 "not supported (unchecked/ILP32 eqv: "
293 "LD32_GOT_LO12_NC)");
295 return ELF::R_AARCH64_NONE;
299 return ELF::R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC;
302 "LP64 32-bit load/store "
303 "relocation not supported (ILP32 eqv: "
304 "TLSIE_LD32_GOTTPREL_LO12_NC)");
305 return ELF::R_AARCH64_NONE;
310 return ELF::R_AARCH64_P32_TLSDESC_LD32_LO12;
313 "LP64 4 byte TLSDESC load/store relocation "
314 "not supported (ILP32 eqv: TLSDESC_LD64_LO12)");
315 return ELF::R_AARCH64_NONE;
320 "invalid fixup for 32-bit load/store instruction "
321 "fixup_aarch64_ldst_imm12_scale4");
322 return ELF::R_AARCH64_NONE;
325 return R_CLS(LDST64_ABS_LO12_NC);
331 return ELF::R_AARCH64_LD64_GOTPAGE_LO15;
332 return ELF::R_AARCH64_LD64_GOT_LO12_NC;
335 "relocation not supported (LP64 eqv: "
336 "LD64_GOT_LO12_NC)");
337 return ELF::R_AARCH64_NONE;
341 return R_CLS(TLSLD_LDST64_DTPREL_LO12);
343 return R_CLS(TLSLD_LDST64_DTPREL_LO12_NC);
345 return R_CLS(TLSLE_LDST64_TPREL_LO12);
347 return R_CLS(TLSLE_LDST64_TPREL_LO12_NC);
350 return ELF::R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC;
353 "relocation not supported (LP64 eqv: "
354 "TLSIE_LD64_GOTTPREL_LO12_NC)");
355 return ELF::R_AARCH64_NONE;
360 return ELF::R_AARCH64_TLSDESC_LD64_LO12;
363 "relocation not supported (LP64 eqv: "
364 "TLSDESC_LD64_LO12)");
365 return ELF::R_AARCH64_NONE;
369 "invalid fixup for 64-bit load/store instruction");
370 return ELF::R_AARCH64_NONE;
373 return R_CLS(LDST128_ABS_LO12_NC);
375 return R_CLS(TLSLD_LDST128_DTPREL_LO12);
377 return R_CLS(TLSLD_LDST128_DTPREL_LO12_NC);
379 return R_CLS(TLSLE_LDST128_TPREL_LO12);
381 return R_CLS(TLSLE_LDST128_TPREL_LO12_NC);
384 "invalid fixup for 128-bit load/store instruction");
385 return ELF::R_AARCH64_NONE;
389 return ELF::R_AARCH64_MOVW_UABS_G3;
391 return ELF::R_AARCH64_MOVW_UABS_G2;
393 return ELF::R_AARCH64_MOVW_SABS_G2;
395 return ELF::R_AARCH64_MOVW_UABS_G2_NC;
397 return R_CLS(MOVW_UABS_G1);
399 return ELF::R_AARCH64_MOVW_SABS_G1;
401 return ELF::R_AARCH64_MOVW_UABS_G1_NC;
403 return R_CLS(MOVW_UABS_G0);
405 return R_CLS(MOVW_SABS_G0);
407 return R_CLS(MOVW_UABS_G0_NC);
409 return ELF::R_AARCH64_MOVW_PREL_G3;
411 return ELF::R_AARCH64_MOVW_PREL_G2;
413 return ELF::R_AARCH64_MOVW_PREL_G2_NC;
415 return R_CLS(MOVW_PREL_G1);
417 return ELF::R_AARCH64_MOVW_PREL_G1_NC;
419 return R_CLS(MOVW_PREL_G0);
421 return R_CLS(MOVW_PREL_G0_NC);
423 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G2;
425 return R_CLS(TLSLD_MOVW_DTPREL_G1);
427 return ELF::R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC;
429 return R_CLS(TLSLD_MOVW_DTPREL_G0);
431 return R_CLS(TLSLD_MOVW_DTPREL_G0_NC);
433 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G2;
435 return R_CLS(TLSLE_MOVW_TPREL_G1);
437 return ELF::R_AARCH64_TLSLE_MOVW_TPREL_G1_NC;
439 return R_CLS(TLSLE_MOVW_TPREL_G0);
441 return R_CLS(TLSLE_MOVW_TPREL_G0_NC);
443 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G1;
445 return ELF::R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC;
447 "invalid fixup for movz/movk instruction");
448 return ELF::R_AARCH64_NONE;
451 return ELF::R_AARCH64_NONE;
459AArch64ELFObjectWriter::getMemtagRelocsSection(
MCContext &Ctx)
const {
464std::unique_ptr<MCObjectTargetWriter>
466 return std::make_unique<AArch64ELFObjectWriter>(OSABI, IsILP32);
#define BAD_ILP32_MOV(lp64rtype)
static bool isNonILP32reloc(const MCFixup &Fixup, AArch64MCExpr::VariantKind RefKind, MCContext &Ctx)
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static VariantKind getSymbolLoc(VariantKind Kind)
static bool isNotChecked(VariantKind Kind)
static VariantKind getAddressFrag(VariantKind Kind)
Context object for machine code objects.
MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)
void reportError(SMLoc L, const Twine &Msg)
virtual MCSectionELF * getMemtagRelocsSection(MCContext &Ctx) const
virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, bool IsPCRel) const =0
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
This represents a section on linux, lots of unix variants and some bare metal systems.
This represents an "assembler immediate".
Target - Wrapper for Target specific information.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ fixup_aarch64_ldst_imm12_scale4
@ fixup_aarch64_pcrel_call26
@ fixup_aarch64_pcrel_branch26
@ fixup_aarch64_pcrel_branch19
@ fixup_aarch64_ldr_pcrel_imm19
@ fixup_aarch64_pcrel_adr_imm21
@ fixup_aarch64_pcrel_branch14
@ fixup_aarch64_ldst_imm12_scale2
@ fixup_aarch64_ldst_imm12_scale16
@ fixup_aarch64_pcrel_adrp_imm21
@ fixup_aarch64_add_imm12
@ fixup_aarch64_ldst_imm12_scale8
@ fixup_aarch64_ldst_imm12_scale1
@ SHT_AARCH64_MEMTAG_GLOBALS_STATIC
This is an optimization pass for GlobalISel generic memory operations.
@ FirstLiteralRelocationKind
The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for relocations coming from ....
@ FK_Data_8
A eight-byte fixup.
@ FK_Data_1
A one-byte fixup.
@ FK_Data_4
A four-byte fixup.
@ FK_Data_2
A two-byte fixup.
std::unique_ptr< MCObjectTargetWriter > createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)