LLVM 18.0.0git
AMDGPUELFObjectWriter.cpp
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1//===- AMDGPUELFObjectWriter.cpp - AMDGPU ELF Writer ----------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "AMDGPUFixupKinds.h"
10#include "AMDGPUMCTargetDesc.h"
11#include "llvm/MC/MCContext.h"
13#include "llvm/MC/MCValue.h"
14
15using namespace llvm;
16
17namespace {
18
19class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter {
20public:
21 AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend,
22 uint8_t ABIVersion);
23
24protected:
25 unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
26 const MCFixup &Fixup, bool IsPCRel) const override;
27};
28
29
30} // end anonymous namespace
31
32AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit,
33 uint8_t OSABI,
34 bool HasRelocationAddend,
35 uint8_t ABIVersion)
36 : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_AMDGPU,
37 HasRelocationAddend, ABIVersion) {}
38
39unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx,
40 const MCValue &Target,
41 const MCFixup &Fixup,
42 bool IsPCRel) const {
43 if (const auto *SymA = Target.getSymA()) {
44 // SCRATCH_RSRC_DWORD[01] is a special global variable that represents
45 // the scratch buffer.
46 if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD0" ||
47 SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD1")
48 return ELF::R_AMDGPU_ABS32_LO;
49 }
50
51 switch (Target.getAccessVariant()) {
52 default:
53 break;
55 return ELF::R_AMDGPU_GOTPCREL;
57 return ELF::R_AMDGPU_GOTPCREL32_LO;
59 return ELF::R_AMDGPU_GOTPCREL32_HI;
61 return ELF::R_AMDGPU_REL32_LO;
63 return ELF::R_AMDGPU_REL32_HI;
65 return ELF::R_AMDGPU_REL64;
66 }
67
68 MCFixupKind Kind = Fixup.getKind();
71 switch (Kind) {
72 default: break;
73 case FK_PCRel_4:
74 return ELF::R_AMDGPU_REL32;
75 case FK_Data_4:
76 case FK_SecRel_4:
77 return IsPCRel ? ELF::R_AMDGPU_REL32 : ELF::R_AMDGPU_ABS32;
78 case FK_Data_8:
79 return IsPCRel ? ELF::R_AMDGPU_REL64 : ELF::R_AMDGPU_ABS64;
80 }
81
82 if (Fixup.getTargetKind() == AMDGPU::fixup_si_sopp_br) {
83 const auto *SymA = Target.getSymA();
84 assert(SymA);
85
86 if (SymA->getSymbol().isUndefined()) {
87 Ctx.reportError(Fixup.getLoc(), Twine("undefined label '") +
88 SymA->getSymbol().getName() + "'");
89 return ELF::R_AMDGPU_NONE;
90 }
91 return ELF::R_AMDGPU_REL16;
92 }
93
94 llvm_unreachable("unhandled relocation type");
95}
96
97std::unique_ptr<MCObjectTargetWriter>
98llvm::createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
99 bool HasRelocationAddend,
100 uint8_t ABIVersion) {
101 return std::make_unique<AMDGPUELFObjectWriter>(Is64Bit, OSABI,
102 HasRelocationAddend,
103 ABIVersion);
104}
Provides AMDGPU specific target descriptions.
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Context object for machine code objects.
Definition: MCContext.h:76
void reportError(SMLoc L, const Twine &Msg)
Definition: MCContext.cpp:1059
virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, bool IsPCRel) const =0
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:70
This represents an "assembler immediate".
Definition: MCValue.h:36
Target - Wrapper for Target specific information.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ fixup_si_sopp_br
16-bit PC relative fixup for SOPP branch instructions.
@ EM_AMDGPU
Definition: ELF.h:316
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
std::unique_ptr< MCObjectTargetWriter > createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend, uint8_t ABIVersion)
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
@ FK_PCRel_4
A four-byte pc relative fixup.
Definition: MCFixup.h:29
@ FirstLiteralRelocationKind
The range [FirstLiteralRelocationKind, MaxTargetFixupKind) is used for relocations coming from ....
Definition: MCFixup.h:49
@ FK_Data_8
A eight-byte fixup.
Definition: MCFixup.h:26
@ FK_Data_4
A four-byte fixup.
Definition: MCFixup.h:25
@ FK_SecRel_4
A four-byte section relative fixup.
Definition: MCFixup.h:41