LLVM  14.0.0git
AMDGPU Directory Reference
Directory dependency graph for AMDGPU:
lib/Target/AMDGPU

Directories

directory  AsmParser
 
directory  Disassembler
 
directory  MCA
 
directory  MCTargetDesc
 
directory  TargetInfo
 
directory  Utils
 

Files

file  AMDGPU.h [code]
 
file  AMDGPUAliasAnalysis.cpp [code]
 
file  AMDGPUAliasAnalysis.h [code]
 
file  AMDGPUAlwaysInlinePass.cpp [code]
 
file  AMDGPUAnnotateKernelFeatures.cpp [code]
 
file  AMDGPUAnnotateUniformValues.cpp [code]
 
file  AMDGPUArgumentUsageInfo.cpp [code]
 
file  AMDGPUArgumentUsageInfo.h [code]
 
file  AMDGPUAsmPrinter.cpp [code]
 
file  AMDGPUAsmPrinter.h [code]
 
file  AMDGPUAtomicOptimizer.cpp [code]
 
file  AMDGPUAttributor.cpp [code]
 
file  AMDGPUCallLowering.cpp [code]
 
file  AMDGPUCallLowering.h [code]
 
file  AMDGPUCodeGenPrepare.cpp [code]
 
file  AMDGPUExportClustering.cpp [code]
 
file  AMDGPUExportClustering.h [code]
 
file  AMDGPUFixFunctionBitcasts.cpp [code]
 
file  AMDGPUFrameLowering.cpp [code]
 
file  AMDGPUFrameLowering.h [code]
 
file  AMDGPUGlobalISelUtils.cpp [code]
 
file  AMDGPUGlobalISelUtils.h [code]
 
file  AMDGPUHSAMetadataStreamer.cpp [code]
 
file  AMDGPUHSAMetadataStreamer.h [code]
 
file  AMDGPUInstCombineIntrinsic.cpp [code]
 
file  AMDGPUInstrInfo.cpp [code]
 Implementation of the TargetInstrInfo class that is common to all AMD GPUs.
 
file  AMDGPUInstrInfo.h [code]
 
file  AMDGPUInstructionSelector.cpp [code]
 
file  AMDGPUInstructionSelector.h [code]
 
file  AMDGPUISelDAGToDAG.cpp [code]
 
file  AMDGPUISelLowering.cpp [code]
 
file  AMDGPUISelLowering.h [code]
 
file  AMDGPULateCodeGenPrepare.cpp [code]
 
file  AMDGPULegalizerInfo.cpp [code]
 
file  AMDGPULegalizerInfo.h [code]
 
file  AMDGPULibCalls.cpp [code]
 
file  AMDGPULibFunc.cpp [code]
 
file  AMDGPULibFunc.h [code]
 
file  AMDGPULowerIntrinsics.cpp [code]
 
file  AMDGPULowerKernelArguments.cpp [code]
 
file  AMDGPULowerKernelAttributes.cpp [code]
 
file  AMDGPULowerModuleLDSPass.cpp [code]
 
file  AMDGPUMachineCFGStructurizer.cpp [code]
 
file  AMDGPUMachineFunction.cpp [code]
 
file  AMDGPUMachineFunction.h [code]
 
file  AMDGPUMachineModuleInfo.cpp [code]
 
file  AMDGPUMachineModuleInfo.h [code]
 
file  AMDGPUMacroFusion.cpp [code]
 
file  AMDGPUMacroFusion.h [code]
 
file  AMDGPUMCInstLower.cpp [code]
 
file  AMDGPUMIRFormatter.cpp [code]
 
file  AMDGPUMIRFormatter.h [code]
 
file  AMDGPUOpenCLEnqueuedBlockLowering.cpp [code]
 
file  AMDGPUPerfHintAnalysis.cpp [code]
 Analyzes if a function potentially memory bound and if a kernel kernel may benefit from limiting number of waves to reduce cache thrashing.
 
file  AMDGPUPerfHintAnalysis.h [code]
 Analyzes if a function potentially memory bound and if a kernel kernel may benefit from limiting number of waves to reduce cache thrashing.
 
file  AMDGPUPostLegalizerCombiner.cpp [code]
 
file  AMDGPUPreLegalizerCombiner.cpp [code]
 
file  AMDGPUPrintfRuntimeBinding.cpp [code]
 
file  AMDGPUPromoteAlloca.cpp [code]
 
file  AMDGPUPropagateAttributes.cpp [code]
 This pass propagates attributes from kernels to the non-entry functions. Most of the library functions were not compiled for specific ABI, yet will be correctly compiled if proper attrbutes are propagated from the caller.
 
file  AMDGPUPTNote.h [code]
 
file  AMDGPURegBankCombiner.cpp [code]
 
file  AMDGPURegisterBankInfo.cpp [code]
 
file  AMDGPURegisterBankInfo.h [code]
 
file  AMDGPUReplaceLDSUseWithPointer.cpp [code]
 
file  AMDGPUResourceUsageAnalysis.cpp [code]
 Analyzes how many registers and other resources are used by functions.
 
file  AMDGPUResourceUsageAnalysis.h [code]
 Analyzes how many registers and other resources are used by functions.
 
file  AMDGPURewriteOutArguments.cpp [code]
 
file  AMDGPUSubtarget.cpp [code]
 
file  AMDGPUSubtarget.h [code]
 
file  AMDGPUTargetMachine.cpp [code]
 
file  AMDGPUTargetMachine.h [code]
 
file  AMDGPUTargetObjectFile.cpp [code]
 
file  AMDGPUTargetObjectFile.h [code]
 
file  AMDGPUTargetTransformInfo.cpp [code]
 
file  AMDGPUTargetTransformInfo.h [code]
 
file  AMDGPUUnifyDivergentExitNodes.cpp [code]
 
 
file  AMDILCFGStructurizer.cpp [code]
 
file  AMDKernelCodeT.h [code]
 
file  GCNDPPCombine.cpp [code]
 
file  GCNHazardRecognizer.cpp [code]
 
file  GCNHazardRecognizer.h [code]
 
file  GCNILPSched.cpp [code]
 
file  GCNIterativeScheduler.cpp [code]
 
file  GCNIterativeScheduler.h [code]
 
file  GCNMinRegStrategy.cpp [code]
 
file  GCNNSAReassign.cpp [code]
 Try to reassign registers on GFX10+ from non-sequential to sequential in NSA image instructions. Later SIShrinkInstructions pass will relace NSA with sequential versions where possible.
 
file  GCNPreRAOptimizations.cpp [code]
 
file  GCNRegPressure.cpp [code]
 
file  GCNRegPressure.h [code]
 
file  GCNSchedStrategy.cpp [code]
 
file  GCNSchedStrategy.h [code]
 
file  GCNSubtarget.h [code]
 
file  R600AsmPrinter.cpp [code]
 
file  R600AsmPrinter.h [code]
 
file  R600ClauseMergePass.cpp [code]
 
file  R600ControlFlowFinalizer.cpp [code]
 
file  R600Defines.h [code]
 
file  R600EmitClauseMarkers.cpp [code]
 
file  R600ExpandSpecialInstrs.cpp [code]
 
file  R600FrameLowering.cpp [code]
 
file  R600FrameLowering.h [code]
 
file  R600InstrInfo.cpp [code]
 
file  R600InstrInfo.h [code]
 
file  R600ISelLowering.cpp [code]
 
file  R600ISelLowering.h [code]
 
file  R600MachineFunctionInfo.cpp [code]
 
file  R600MachineFunctionInfo.h [code]
 
file  R600MachineScheduler.cpp [code]
 
file  R600MachineScheduler.h [code]
 
file  R600OpenCLImageTypeLoweringPass.cpp [code]
 
file  R600OptimizeVectorRegisters.cpp [code]
 
file  R600Packetizer.cpp [code]
 
file  R600RegisterInfo.cpp [code]
 
file  R600RegisterInfo.h [code]
 
file  R600Subtarget.h [code]
 
file  SIAnnotateControlFlow.cpp [code]
 
file  SIDefines.h [code]
 
file  SIFixSGPRCopies.cpp [code]
 
file  SIFixVGPRCopies.cpp [code]
 
file  SIFoldOperands.cpp [code]
 
file  SIFormMemoryClauses.cpp [code]
 
file  SIFrameLowering.cpp [code]
 
file  SIFrameLowering.h [code]
 
file  SIInsertHardClauses.cpp [code]
 
file  SIInsertWaitcnts.cpp [code]
 
file  SIInstrInfo.cpp [code]
 
file  SIInstrInfo.h [code]
 
file  SIISelLowering.cpp [code]
 
file  SIISelLowering.h [code]
 
file  SILateBranchLowering.cpp [code]
 
file  SILoadStoreOptimizer.cpp [code]
 
file  SILowerControlFlow.cpp [code]
 
file  SILowerI1Copies.cpp [code]
 
file  SILowerSGPRSpills.cpp [code]
 
file  SIMachineFunctionInfo.cpp [code]
 
file  SIMachineFunctionInfo.h [code]
 
file  SIMachineScheduler.cpp [code]
 
file  SIMachineScheduler.h [code]
 
file  SIMemoryLegalizer.cpp [code]
 
file  SIModeRegister.cpp [code]
 
file  SIOptimizeExecMasking.cpp [code]
 
file  SIOptimizeExecMaskingPreRA.cpp [code]
 
file  SIOptimizeVGPRLiveRange.cpp [code]
 
file  SIPeepholeSDWA.cpp [code]
 
file  SIPostRABundler.cpp [code]
 
file  SIPreAllocateWWMRegs.cpp [code]
 
file  SIPreEmitPeephole.cpp [code]
 
file  SIProgramInfo.cpp [code]
 
file  SIProgramInfo.h [code]
 
file  SIRegisterInfo.cpp [code]
 
file  SIRegisterInfo.h [code]
 
file  SIShrinkInstructions.cpp [code]
 
file  SIWholeQuadMode.cpp [code]