LLVM
20.0.0git
lib
Target
ARM
MCTargetDesc
ARMWinCOFFObjectWriter.cpp
Go to the documentation of this file.
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//===-- ARMWinCOFFObjectWriter.cpp - ARM Windows COFF Object Writer -- C++ -==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "
MCTargetDesc/ARMFixupKinds.h
"
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#include "
llvm/ADT/Twine.h
"
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#include "
llvm/BinaryFormat/COFF.h
"
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#include "
llvm/MC/MCAsmBackend.h
"
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#include "
llvm/MC/MCContext.h
"
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#include "
llvm/MC/MCExpr.h
"
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#include "
llvm/MC/MCFixup.h
"
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#include "
llvm/MC/MCFixupKindInfo.h
"
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#include "
llvm/MC/MCObjectWriter.h
"
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#include "
llvm/MC/MCValue.h
"
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#include "
llvm/MC/MCWinCOFFObjectWriter.h
"
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#include "
llvm/Support/ErrorHandling.h
"
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#include "
llvm/Support/raw_ostream.h
"
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using namespace
llvm
;
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namespace
{
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class
ARMWinCOFFObjectWriter :
public
MCWinCOFFObjectTargetWriter
{
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public
:
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ARMWinCOFFObjectWriter()
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:
MCWinCOFFObjectTargetWriter
(
COFF
::
IMAGE_FILE_MACHINE_ARMNT
) {
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}
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~ARMWinCOFFObjectWriter()
override
=
default
;
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unsigned
getRelocType
(
MCContext
&Ctx,
const
MCValue
&
Target
,
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const
MCFixup
&
Fixup
,
bool
IsCrossSection,
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const
MCAsmBackend
&MAB)
const override
;
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bool
recordRelocation
(
const
MCFixup
&)
const override
;
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};
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}
// end anonymous namespace
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unsigned
ARMWinCOFFObjectWriter::getRelocType(
MCContext
&Ctx,
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const
MCValue
&
Target
,
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const
MCFixup
&
Fixup
,
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bool
IsCrossSection,
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const
MCAsmBackend
&MAB)
const
{
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MCSymbolRefExpr::VariantKind
Modifier =
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Target
.isAbsolute() ?
MCSymbolRefExpr::VK_None
:
Target
.getSymA()->getKind();
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unsigned
FixupKind
=
Fixup
.getKind();
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if
(IsCrossSection) {
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if
(FixupKind !=
FK_Data_4
) {
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Ctx.
reportError
(
Fixup
.getLoc(),
"Cannot represent this expression"
);
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return
COFF::IMAGE_REL_ARM_ADDR32
;
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}
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FixupKind
=
FK_PCRel_4
;
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}
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switch
(FixupKind) {
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default
: {
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Ctx.
reportError
(
Fixup
.getLoc(),
"unsupported relocation type"
);
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return
COFF::IMAGE_REL_ARM_ABSOLUTE
;
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}
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case
FK_Data_4
:
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switch
(Modifier) {
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case
MCSymbolRefExpr::VK_COFF_IMGREL32
:
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return
COFF::IMAGE_REL_ARM_ADDR32NB
;
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case
MCSymbolRefExpr::VK_SECREL
:
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return
COFF::IMAGE_REL_ARM_SECREL
;
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default
:
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return
COFF::IMAGE_REL_ARM_ADDR32
;
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}
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case
FK_PCRel_4
:
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return
COFF::IMAGE_REL_ARM_REL32
;
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case
FK_SecRel_2
:
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return
COFF::IMAGE_REL_ARM_SECTION
;
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case
FK_SecRel_4
:
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return
COFF::IMAGE_REL_ARM_SECREL
;
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case
ARM::fixup_t2_condbranch
:
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return
COFF::IMAGE_REL_ARM_BRANCH20T
;
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case
ARM::fixup_t2_uncondbranch
:
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case
ARM::fixup_arm_thumb_bl
:
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return
COFF::IMAGE_REL_ARM_BRANCH24T
;
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case
ARM::fixup_arm_thumb_blx
:
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return
COFF::IMAGE_REL_ARM_BLX23T
;
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case
ARM::fixup_t2_movw_lo16
:
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case
ARM::fixup_t2_movt_hi16
:
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return
COFF::IMAGE_REL_ARM_MOV32T
;
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}
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}
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bool
ARMWinCOFFObjectWriter::recordRelocation(
const
MCFixup
&
Fixup
)
const
{
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return
static_cast<
unsigned
>
(
Fixup
.getKind()) !=
ARM::fixup_t2_movt_hi16
;
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}
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namespace
llvm
{
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std::unique_ptr<MCObjectTargetWriter>
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createARMWinCOFFObjectWriter
() {
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return
std::make_unique<ARMWinCOFFObjectWriter>();
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}
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}
// end namespace llvm
ARMFixupKinds.h
COFF.h
MCAsmBackend.h
MCContext.h
MCExpr.h
MCFixupKindInfo.h
MCFixup.h
MCObjectWriter.h
MCValue.h
MCWinCOFFObjectWriter.h
Fixup
PowerPC TLS Dynamic Call Fixup
Definition:
PPCTLSDynamicCall.cpp:340
Twine.h
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition:
MCAsmBackend.h:42
llvm::MCContext
Context object for machine code objects.
Definition:
MCContext.h:83
llvm::MCContext::reportError
void reportError(SMLoc L, const Twine &Msg)
Definition:
MCContext.cpp:1068
llvm::MCFixup
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition:
MCFixup.h:71
llvm::MCSymbolRefExpr::VariantKind
VariantKind
Definition:
MCExpr.h:190
llvm::MCSymbolRefExpr::VK_None
@ VK_None
Definition:
MCExpr.h:191
llvm::MCSymbolRefExpr::VK_SECREL
@ VK_SECREL
Definition:
MCExpr.h:219
llvm::MCSymbolRefExpr::VK_COFF_IMGREL32
@ VK_COFF_IMGREL32
Definition:
MCExpr.h:322
llvm::MCValue
This represents an "assembler immediate".
Definition:
MCValue.h:36
llvm::MCWinCOFFObjectTargetWriter
Definition:
MCWinCOFFObjectWriter.h:23
llvm::MCWinCOFFObjectTargetWriter::recordRelocation
virtual bool recordRelocation(const MCFixup &) const
Definition:
MCWinCOFFObjectWriter.h:43
llvm::MCWinCOFFObjectTargetWriter::getRelocType
virtual unsigned getRelocType(MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, bool IsCrossSection, const MCAsmBackend &MAB) const =0
llvm::Target
Target - Wrapper for Target specific information.
Definition:
TargetRegistry.h:144
ErrorHandling.h
llvm::ARM::fixup_t2_movt_hi16
@ fixup_t2_movt_hi16
Definition:
ARMFixupKinds.h:99
llvm::ARM::fixup_arm_thumb_blx
@ fixup_arm_thumb_blx
Definition:
ARMFixupKinds.h:84
llvm::ARM::fixup_t2_uncondbranch
@ fixup_t2_uncondbranch
Definition:
ARMFixupKinds.h:57
llvm::ARM::fixup_t2_condbranch
@ fixup_t2_condbranch
Definition:
ARMFixupKinds.h:54
llvm::ARM::fixup_arm_thumb_bl
@ fixup_arm_thumb_bl
Definition:
ARMFixupKinds.h:81
llvm::ARM::fixup_t2_movw_lo16
@ fixup_t2_movw_lo16
Definition:
ARMFixupKinds.h:100
llvm::BPF::FixupKind
FixupKind
Definition:
BPFMCFixups.h:16
llvm::COFF::IMAGE_FILE_MACHINE_ARMNT
@ IMAGE_FILE_MACHINE_ARMNT
Definition:
COFF.h:99
llvm::COFF::IMAGE_REL_ARM_BRANCH20T
@ IMAGE_REL_ARM_BRANCH20T
Definition:
COFF.h:393
llvm::COFF::IMAGE_REL_ARM_ADDR32NB
@ IMAGE_REL_ARM_ADDR32NB
Definition:
COFF.h:382
llvm::COFF::IMAGE_REL_ARM_ADDR32
@ IMAGE_REL_ARM_ADDR32
Definition:
COFF.h:381
llvm::COFF::IMAGE_REL_ARM_MOV32T
@ IMAGE_REL_ARM_MOV32T
Definition:
COFF.h:392
llvm::COFF::IMAGE_REL_ARM_BRANCH24T
@ IMAGE_REL_ARM_BRANCH24T
Definition:
COFF.h:394
llvm::COFF::IMAGE_REL_ARM_ABSOLUTE
@ IMAGE_REL_ARM_ABSOLUTE
Definition:
COFF.h:380
llvm::COFF::IMAGE_REL_ARM_REL32
@ IMAGE_REL_ARM_REL32
Definition:
COFF.h:388
llvm::COFF::IMAGE_REL_ARM_BLX23T
@ IMAGE_REL_ARM_BLX23T
Definition:
COFF.h:395
llvm::COFF::IMAGE_REL_ARM_SECREL
@ IMAGE_REL_ARM_SECREL
Definition:
COFF.h:390
llvm::COFF::IMAGE_REL_ARM_SECTION
@ IMAGE_REL_ARM_SECTION
Definition:
COFF.h:389
llvm::logicalview::LVBinaryType::COFF
@ COFF
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:
AddressRanges.h:18
llvm::FK_PCRel_4
@ FK_PCRel_4
A four-byte pc relative fixup.
Definition:
MCFixup.h:30
llvm::FK_SecRel_2
@ FK_SecRel_2
A two-byte section relative fixup.
Definition:
MCFixup.h:41
llvm::FK_Data_4
@ FK_Data_4
A four-byte fixup.
Definition:
MCFixup.h:25
llvm::FK_SecRel_4
@ FK_SecRel_4
A four-byte section relative fixup.
Definition:
MCFixup.h:42
llvm::createARMWinCOFFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createARMWinCOFFObjectWriter()
Construct an ARM PE/COFF object writer.
Definition:
ARMWinCOFFObjectWriter.cpp:102
raw_ostream.h
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