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17 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
18 #define LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
48 unsigned RegionInstrs)
override;
83 template <
typename Range>
85 Range &&Schedule)
const;
104 template <
typename Range>
113 void scheduleILP(
bool TryMaximizeOccupancy =
true);
126 #endif // LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
This is an optimization pass for GlobalISel generic memory operations.
unsigned tryMaximizeOccupancy(unsigned TargetOcc=std::numeric_limits< unsigned >::max())
GCNRegPressure getRegionPressure(const Region &R) const
@ SCHEDULE_LEGACYMAXOCCUPANCY
A BumpPtrAllocator that allows only elements of a specific type to be allocated.
GCNRegPressure getRegionPressure(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End) const
GCNRegPressure MaxPressure
const MachineBasicBlock::iterator End
std::vector< Region * > Regions
void schedule() override
Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions.
std::vector< MachineInstr * > Schedule
void printRegions(raw_ostream &OS) const
void finalizeSchedule() override
Allow targets to perform final scheduling actions at the level of the whole MachineFunction.
(vector float) vec_cmpeq(*A, *B) C
void printSchedResult(raw_ostream &OS, const Region *R, const GCNRegPressure &RP) const
GCNRegPressure getSchedulePressure(const Region &R, Range &&Schedule) const
MachineSchedContext * Context
GCNUpwardRPTracker UPTracker
This class implements an extremely fast bulk output stream that can only output to a stream.
void scheduleRegion(Region &R, Range &&Schedule, const GCNRegPressure &MaxRP=GCNRegPressure())
therefore end up llgh r3 lr r0 br r14 but truncating the load would lh r3 br r14 Functions ret i64 and ought to be implemented ngr r0 br r14 but two address optimizations reverse the order of the AND and force
void scheduleBest(Region &R)
void sortRegionsByPressure(unsigned TargetOcc)
std::unique_ptr< TentativeSchedule > BestSchedule
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
SpecificBumpPtrAllocator< Region > Alloc
ArrayRef< const SUnit * > ScheduleRef
const StrategyKind Strategy
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
void scheduleLegacyMaxOccupancy(bool TryMaximizeOccupancy=true)
GCNRegPressure MaxPressure
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
void setBestSchedule(Region &R, ScheduleRef Schedule, const GCNRegPressure &MaxRP=GCNRegPressure())
ScheduleDAGMILive(MachineSchedContext *C, std::unique_ptr< MachineSchedStrategy > S)
MachineBasicBlock::iterator Begin
std::vector< MachineInstr * > detachSchedule(ScheduleRef Schedule) const
MachineBasicBlock * BB
The block in which to insert instructions.
void enterRegion(MachineBasicBlock *BB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned RegionInstrs) override
Implement the ScheduleDAGInstrs interface for handling the next scheduling region.
void scheduleILP(bool TryMaximizeOccupancy=true)
Align max(MaybeAlign Lhs, Align Rhs)
GCNIterativeScheduler(MachineSchedContext *C, StrategyKind S)
ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while...
void scheduleMinReg(bool force=false)
void printSchedRP(raw_ostream &OS, const GCNRegPressure &Before, const GCNRegPressure &After) const
const unsigned NumRegionInstrs