LLVM  14.0.0git
GCNRegPressure.h
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1 //===- GCNRegPressure.h -----------------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the GCNRegPressure class, which tracks registry pressure
11 /// by bookkeeping number of SGPR/VGPRs used, weights for large SGPR/VGPRs. It
12 /// also implements a compare function, which compares different register
13 /// pressures, and declares one with max occupance as winner.
14 ///
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
18 #define LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
19 
20 #include "GCNSubtarget.h"
22 #include <algorithm>
23 
24 namespace llvm {
25 
26 class MachineRegisterInfo;
27 class raw_ostream;
28 class SlotIndex;
29 
31  enum RegKind {
39  };
40 
42  clear();
43  }
44 
45  bool empty() const { return getSGPRNum() == 0 && getVGPRNum(false) == 0; }
46 
47  void clear() { std::fill(&Value[0], &Value[TOTAL_KINDS], 0); }
48 
49  unsigned getSGPRNum() const { return Value[SGPR32]; }
50  unsigned getVGPRNum(bool UnifiedVGPRFile) const {
51  if (UnifiedVGPRFile) {
52  return Value[AGPR32] ? alignTo(Value[VGPR32], 4) + Value[AGPR32]
53  : Value[VGPR32] + Value[AGPR32];
54  }
55  return std::max(Value[VGPR32], Value[AGPR32]);
56  }
57  unsigned getAGPRNum() const { return Value[AGPR32]; }
58 
59  unsigned getVGPRTuplesWeight() const { return std::max(Value[VGPR_TUPLE],
60  Value[AGPR_TUPLE]); }
61  unsigned getSGPRTuplesWeight() const { return Value[SGPR_TUPLE]; }
62 
63  unsigned getOccupancy(const GCNSubtarget &ST) const {
64  return std::min(ST.getOccupancyWithNumSGPRs(getSGPRNum()),
65  ST.getOccupancyWithNumVGPRs(getVGPRNum(ST.hasGFX90AInsts())));
66  }
67 
68  void inc(unsigned Reg,
69  LaneBitmask PrevMask,
70  LaneBitmask NewMask,
71  const MachineRegisterInfo &MRI);
72 
73  bool higherOccupancy(const GCNSubtarget &ST, const GCNRegPressure& O) const {
74  return getOccupancy(ST) > O.getOccupancy(ST);
75  }
76 
77  bool less(const GCNSubtarget &ST, const GCNRegPressure& O,
78  unsigned MaxOccupancy = std::numeric_limits<unsigned>::max()) const;
79 
80  bool operator==(const GCNRegPressure &O) const {
81  return std::equal(&Value[0], &Value[TOTAL_KINDS], O.Value);
82  }
83 
84  bool operator!=(const GCNRegPressure &O) const {
85  return !(*this == O);
86  }
87 
88  void print(raw_ostream &OS, const GCNSubtarget *ST = nullptr) const;
89  void dump() const { print(dbgs()); }
90 
91 private:
92  unsigned Value[TOTAL_KINDS];
93 
94  static unsigned getRegKind(Register Reg, const MachineRegisterInfo &MRI);
95 
96  friend GCNRegPressure max(const GCNRegPressure &P1,
97  const GCNRegPressure &P2);
98 };
99 
100 inline GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2) {
101  GCNRegPressure Res;
102  for (unsigned I = 0; I < GCNRegPressure::TOTAL_KINDS; ++I)
103  Res.Value[I] = std::max(P1.Value[I], P2.Value[I]);
104  return Res;
105 }
106 
108 public:
110 
111 protected:
115  const MachineInstr *LastTrackedMI = nullptr;
116  mutable const MachineRegisterInfo *MRI = nullptr;
117 
118  GCNRPTracker(const LiveIntervals &LIS_) : LIS(LIS_) {}
119 
120  void reset(const MachineInstr &MI, const LiveRegSet *LiveRegsCopy,
121  bool After);
122 
123 public:
124  // live regs for the current state
125  const decltype(LiveRegs) &getLiveRegs() const { return LiveRegs; }
126  const MachineInstr *getLastTrackedMI() const { return LastTrackedMI; }
127 
129 
130  // returns MaxPressure, resetting it
132  auto Res = MaxPressure;
133  MaxPressure.clear();
134  return Res;
135  }
136 
137  decltype(LiveRegs) moveLiveRegs() {
138  return std::move(LiveRegs);
139  }
140 
141  static void printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
142  const MachineRegisterInfo &MRI);
143 };
144 
146 public:
148 
149  // reset tracker to the point just below MI
150  // filling live regs upon this point using LIS
151  void reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
152 
153  // move to the state just above the MI
154  void recede(const MachineInstr &MI);
155 
156  // checks whether the tracker's state after receding MI corresponds
157  // to reported by LIS
158  bool isValid() const;
159 };
160 
162  // Last position of reset or advanceBeforeNext
164 
166 
167 public:
169 
170  MachineBasicBlock::const_iterator getNext() const { return NextMI; }
171 
172  // Reset tracker to the point before the MI
173  // filling live regs upon this point using LIS.
174  // Returns false if block is empty except debug values.
175  bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
176 
177  // Move to the state right before the next MI. Returns false if reached
178  // end of the block.
179  bool advanceBeforeNext();
180 
181  // Move to the state at the MI, advanceBeforeNext has to be called first.
182  void advanceToNext();
183 
184  // Move to the state at the next MI. Returns false if reached end of block.
185  bool advance();
186 
187  // Advance instructions until before End.
189 
190  // Reset to Begin and advance to End.
193  const LiveRegSet *LiveRegsCopy = nullptr);
194 };
195 
196 LaneBitmask getLiveLaneMask(unsigned Reg,
197  SlotIndex SI,
198  const LiveIntervals &LIS,
199  const MachineRegisterInfo &MRI);
200 
202  const LiveIntervals &LIS,
203  const MachineRegisterInfo &MRI);
204 
205 /// creates a map MachineInstr -> LiveRegSet
206 /// R - range of iterators on instructions
207 /// After - upon entry or exit of every instruction
208 /// Note: there is no entry in the map for instructions with empty live reg set
209 /// Complexity = O(NumVirtRegs * averageLiveRangeSegmentsPerReg * lg(R))
210 template <typename Range>
211 DenseMap<MachineInstr*, GCNRPTracker::LiveRegSet>
212 getLiveRegMap(Range &&R, bool After, LiveIntervals &LIS) {
213  std::vector<SlotIndex> Indexes;
214  Indexes.reserve(std::distance(R.begin(), R.end()));
215  auto &SII = *LIS.getSlotIndexes();
216  for (MachineInstr *I : R) {
217  auto SI = SII.getInstructionIndex(*I);
218  Indexes.push_back(After ? SI.getDeadSlot() : SI.getBaseIndex());
219  }
220  llvm::sort(Indexes);
221 
222  auto &MRI = (*R.begin())->getParent()->getParent()->getRegInfo();
224  SmallVector<SlotIndex, 32> LiveIdxs, SRLiveIdxs;
225  for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
226  auto Reg = Register::index2VirtReg(I);
227  if (!LIS.hasInterval(Reg))
228  continue;
229  auto &LI = LIS.getInterval(Reg);
230  LiveIdxs.clear();
231  if (!LI.findIndexesLiveAt(Indexes, std::back_inserter(LiveIdxs)))
232  continue;
233  if (!LI.hasSubRanges()) {
234  for (auto SI : LiveIdxs)
235  LiveRegMap[SII.getInstructionFromIndex(SI)][Reg] =
237  } else
238  for (const auto &S : LI.subranges()) {
239  // constrain search for subranges by indexes live at main range
240  SRLiveIdxs.clear();
241  S.findIndexesLiveAt(LiveIdxs, std::back_inserter(SRLiveIdxs));
242  for (auto SI : SRLiveIdxs)
243  LiveRegMap[SII.getInstructionFromIndex(SI)][Reg] |= S.LaneMask;
244  }
245  }
246  return LiveRegMap;
247 }
248 
250  const LiveIntervals &LIS) {
251  return getLiveRegs(LIS.getInstructionIndex(MI).getDeadSlot(), LIS,
252  MI.getParent()->getParent()->getRegInfo());
253 }
254 
256  const LiveIntervals &LIS) {
257  return getLiveRegs(LIS.getInstructionIndex(MI).getBaseIndex(), LIS,
258  MI.getParent()->getParent()->getRegInfo());
259 }
260 
261 template <typename Range>
263  Range &&LiveRegs) {
264  GCNRegPressure Res;
265  for (const auto &RM : LiveRegs)
266  Res.inc(RM.first, LaneBitmask::getNone(), RM.second, MRI);
267  return Res;
268 }
269 
270 bool isEqual(const GCNRPTracker::LiveRegSet &S1,
271  const GCNRPTracker::LiveRegSet &S2);
272 
273 void printLivesAt(SlotIndex SI,
274  const LiveIntervals &LIS,
275  const MachineRegisterInfo &MRI);
276 
277 } // end namespace llvm
278 
279 #endif // LLVM_LIB_TARGET_AMDGPU_GCNREGPRESSURE_H
llvm::LaneBitmask
Definition: LaneBitmask.h:40
llvm::alignTo
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:148
llvm::GCNRegPressure::getSGPRTuplesWeight
unsigned getSGPRTuplesWeight() const
Definition: GCNRegPressure.h:61
llvm::GCNUpwardRPTracker::reset
void reset(const MachineInstr &MI, const LiveRegSet *LiveRegs=nullptr)
Definition: GCNRegPressure.cpp:294
MI
IRTranslator LLVM IR MI
Definition: IRTranslator.cpp:102
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::GCNRegPressure
Definition: GCNRegPressure.h:30
llvm::GCNRPTracker::LiveRegs
LiveRegSet LiveRegs
Definition: GCNRegPressure.h:113
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::getLiveRegsBefore
GCNRPTracker::LiveRegSet getLiveRegsBefore(const MachineInstr &MI, const LiveIntervals &LIS)
Definition: GCNRegPressure.h:255
llvm::LiveIntervals::getSlotIndexes
SlotIndexes * getSlotIndexes() const
Definition: LiveIntervals.h:211
llvm::GCNRPTracker::getLiveRegs
const decltype(LiveRegs) & getLiveRegs() const
Definition: GCNRegPressure.h:125
llvm::GCNRegPressure::max
friend GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
Definition: GCNRegPressure.h:100
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::getRegPressure
GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI, Range &&LiveRegs)
Definition: GCNRegPressure.h:262
llvm::getLiveRegMap
DenseMap< MachineInstr *, GCNRPTracker::LiveRegSet > getLiveRegMap(Range &&R, bool After, LiveIntervals &LIS)
creates a map MachineInstr -> LiveRegSet R - range of iterators on instructions After - upon entry or...
Definition: GCNRegPressure.h:212
llvm::getLiveLaneMask
LaneBitmask getLiveLaneMask(unsigned Reg, SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
Definition: GCNRegPressure.cpp:244
llvm::GCNRegPressure::operator!=
bool operator!=(const GCNRegPressure &O) const
Definition: GCNRegPressure.h:84
llvm::GCNRegPressure::RegKind
RegKind
Definition: GCNRegPressure.h:31
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1168
llvm::GCNRPTracker::GCNRPTracker
GCNRPTracker(const LiveIntervals &LIS_)
Definition: GCNRegPressure.h:118
llvm::max
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
Definition: GCNRegPressure.h:100
llvm::GCNRPTracker::clearMaxPressure
void clearMaxPressure()
Definition: GCNRegPressure.h:128
llvm::MachineRegisterInfo::getNumVirtRegs
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
Definition: MachineRegisterInfo.h:757
llvm::GCNSubtarget
Definition: GCNSubtarget.h:38
llvm::Register::index2VirtReg
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:84
llvm::GCNRegPressure::less
bool less(const GCNSubtarget &ST, const GCNRegPressure &O, unsigned MaxOccupancy=std::numeric_limits< unsigned >::max()) const
Definition: GCNRegPressure.cpp:123
llvm::getLiveRegsAfter
GCNRPTracker::LiveRegSet getLiveRegsAfter(const MachineInstr &MI, const LiveIntervals &LIS)
Definition: GCNRegPressure.h:249
llvm::GCNRegPressure::getVGPRTuplesWeight
unsigned getVGPRTuplesWeight() const
Definition: GCNRegPressure.h:59
llvm::isEqual
bool isEqual(const GCNRPTracker::LiveRegSet &S1, const GCNRPTracker::LiveRegSet &S2)
Definition: GCNRegPressure.cpp:55
llvm::LiveIntervals::getInstructionIndex
SlotIndex getInstructionIndex(const MachineInstr &Instr) const
Returns the base index of the given instruction.
Definition: LiveIntervals.h:226
llvm::GCNDownwardRPTracker
Definition: GCNRegPressure.h:161
llvm::lltok::equal
@ equal
Definition: LLToken.h:25
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::GCNUpwardRPTracker::recede
void recede(const MachineInstr &MI)
Definition: GCNRegPressure.cpp:299
llvm::GCNRegPressure::AGPR_TUPLE
@ AGPR_TUPLE
Definition: GCNRegPressure.h:37
llvm::GCNRPTracker::moveMaxPressure
decltype(MaxPressure) moveMaxPressure()
Definition: GCNRegPressure.h:131
llvm::GCNRPTracker
Definition: GCNRegPressure.h:107
llvm::GCNRegPressure::inc
void inc(unsigned Reg, LaneBitmask PrevMask, LaneBitmask NewMask, const MachineRegisterInfo &MRI)
Definition: GCNRegPressure.cpp:84
llvm::GCNRPTracker::getLastTrackedMI
const MachineInstr * getLastTrackedMI() const
Definition: GCNRegPressure.h:126
GCNSubtarget.h
llvm::GCNRegPressure::getSGPRNum
unsigned getSGPRNum() const
Definition: GCNRegPressure.h:49
llvm::GCNDownwardRPTracker::advanceBeforeNext
bool advanceBeforeNext()
Definition: GCNRegPressure.cpp:355
P2
This might compile to this xmm1 xorps xmm0 movss xmm0 ret Now consider if the code caused xmm1 to get spilled This might produce this xmm1 movaps xmm0 movaps xmm1 movss xmm0 ret since the reload is only used by these we could fold it into the producing something like xmm1 movaps xmm0 ret saving two instructions The basic idea is that a reload from a spill if only one byte chunk is bring in zeros the one element instead of elements This can be used to simplify a variety of shuffle where the elements are fixed zeros This code generates ugly probably due to costs being off or< 4 x float > * P2
Definition: README-SSE.txt:278
E
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
llvm::GCNRPTracker::MaxPressure
GCNRegPressure MaxPressure
Definition: GCNRegPressure.h:114
llvm::GCNRegPressure::getOccupancy
unsigned getOccupancy(const GCNSubtarget &ST) const
Definition: GCNRegPressure.h:63
llvm::LaneBitmask::getNone
static constexpr LaneBitmask getNone()
Definition: LaneBitmask.h:83
llvm::GCNRegPressure::VGPR32
@ VGPR32
Definition: GCNRegPressure.h:34
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::SlotIndex::getDeadSlot
SlotIndex getDeadSlot() const
Returns the dead def kill slot for the current instruction.
Definition: SlotIndexes.h:259
llvm::GCNUpwardRPTracker
Definition: GCNRegPressure.h:145
llvm::GCNRPTracker::MRI
const MachineRegisterInfo * MRI
Definition: GCNRegPressure.h:116
llvm::GCNDownwardRPTracker::GCNDownwardRPTracker
GCNDownwardRPTracker(const LiveIntervals &LIS_)
Definition: GCNRegPressure.h:168
llvm::GCNDownwardRPTracker::advance
bool advance()
Definition: GCNRegPressure.cpp:410
llvm::SlotIndex::getBaseIndex
SlotIndex getBaseIndex() const
Returns the base index for associated with this index.
Definition: SlotIndexes.h:241
llvm::RISCVFenceField::O
@ O
Definition: RISCVBaseInfo.h:179
llvm::GCNUpwardRPTracker::GCNUpwardRPTracker
GCNUpwardRPTracker(const LiveIntervals &LIS_)
Definition: GCNRegPressure.h:147
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
LiveIntervals.h
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:572
llvm::ARM_MB::ST
@ ST
Definition: ARMBaseInfo.h:73
move
compiles ldr LCPI1_0 ldr ldr mov lsr tst moveq r1 ldr LCPI1_1 and r0 bx lr It would be better to do something like to fold the shift into the conditional move
Definition: README.txt:546
llvm::DenseMap< unsigned, LaneBitmask >
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::GCNRegPressure::empty
bool empty() const
Definition: GCNRegPressure.h:45
llvm::GCNRegPressure::SGPR32
@ SGPR32
Definition: GCNRegPressure.h:32
llvm::GCNDownwardRPTracker::reset
bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs=nullptr)
Definition: GCNRegPressure.cpp:342
SI
StandardInstrumentations SI(Debug, VerifyEach)
llvm::GCNRegPressure::AGPR32
@ AGPR32
Definition: GCNRegPressure.h:36
llvm::GCNRegPressure::dump
void dump() const
Definition: GCNRegPressure.h:89
llvm::LiveIntervals::getInterval
LiveInterval & getInterval(Register Reg)
Definition: LiveIntervals.h:114
llvm::AArch64::RM
@ RM
Definition: AArch64ISelLowering.h:472
llvm::GCNRegPressure::GCNRegPressure
GCNRegPressure()
Definition: GCNRegPressure.h:41
llvm::GCNRegPressure::TOTAL_KINDS
@ TOTAL_KINDS
Definition: GCNRegPressure.h:38
llvm::min
Expected< ExpressionValue > min(const ExpressionValue &Lhs, const ExpressionValue &Rhs)
Definition: FileCheck.cpp:357
getParent
static const Function * getParent(const Value *V)
Definition: BasicAliasAnalysis.cpp:776
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::GCNRPTracker::moveLiveRegs
decltype(LiveRegs) moveLiveRegs()
Definition: GCNRegPressure.h:137
llvm::LiveRegSet
A set of live virtual registers and physical register units.
Definition: RegisterPressure.h:260
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::GCNDownwardRPTracker::getNext
MachineBasicBlock::const_iterator getNext() const
Definition: GCNRegPressure.h:170
llvm::GCNRegPressure::SGPR_TUPLE
@ SGPR_TUPLE
Definition: GCNRegPressure.h:33
llvm::GCNRPTracker::LiveRegSet
DenseMap< unsigned, LaneBitmask > LiveRegSet
Definition: GCNRegPressure.h:109
llvm::MachineRegisterInfo::getMaxLaneMaskForVReg
LaneBitmask getMaxLaneMaskForVReg(Register Reg) const
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual registe...
Definition: MachineRegisterInfo.cpp:493
llvm::GCNRegPressure::getVGPRNum
unsigned getVGPRNum(bool UnifiedVGPRFile) const
Definition: GCNRegPressure.h:50
llvm::GCNUpwardRPTracker::isValid
bool isValid() const
Definition: GCNRegPressure.cpp:462
llvm::GCNRegPressure::higherOccupancy
bool higherOccupancy(const GCNSubtarget &ST, const GCNRegPressure &O) const
Definition: GCNRegPressure.h:73
llvm::sort
void sort(IteratorTy Start, IteratorTy End)
Definition: STLExtras.h:1488
llvm::LiveIntervals
Definition: LiveIntervals.h:54
llvm::SmallVectorImpl::clear
void clear()
Definition: SmallVector.h:585
llvm::GCNDownwardRPTracker::advanceToNext
void advanceToNext()
Definition: GCNRegPressure.cpp:390
llvm::GCNRPTracker::LIS
const LiveIntervals & LIS
Definition: GCNRegPressure.h:112
llvm::GCNRegPressure::VGPR_TUPLE
@ VGPR_TUPLE
Definition: GCNRegPressure.h:35
llvm::GCNRegPressure::operator==
bool operator==(const GCNRegPressure &O) const
Definition: GCNRegPressure.h:80
llvm::GCNRPTracker::reset
void reset(const MachineInstr &MI, const LiveRegSet *LiveRegsCopy, bool After)
Definition: GCNRegPressure.cpp:278
llvm::GCNRPTracker::CurPressure
GCNRegPressure CurPressure
Definition: GCNRegPressure.h:114
llvm::GCNRPTracker::printLiveRegs
static void printLiveRegs(raw_ostream &OS, const LiveRegSet &LiveRegs, const MachineRegisterInfo &MRI)
Definition: GCNRegPressure.cpp:486
llvm::GCNRegPressure::clear
void clear()
Definition: GCNRegPressure.h:47
llvm::printLivesAt
void printLivesAt(SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
Definition: GCNRegPressure.cpp:23
llvm::max
Align max(MaybeAlign Lhs, Align Rhs)
Definition: Alignment.h:340
llvm::getLiveRegs
GCNRPTracker::LiveRegSet getLiveRegs(SlotIndex SI, const LiveIntervals &LIS, const MachineRegisterInfo &MRI)
Definition: GCNRegPressure.cpp:263
llvm::LiveIntervals::hasInterval
bool hasInterval(Register Reg) const
Definition: LiveIntervals.h:125
llvm::GCNRPTracker::LastTrackedMI
const MachineInstr * LastTrackedMI
Definition: GCNRegPressure.h:115
llvm::GCNRegPressure::print
void print(raw_ostream &OS, const GCNSubtarget *ST=nullptr) const
Definition: GCNRegPressure.cpp:172
llvm::MachineInstrBundleIterator< const MachineInstr >
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
llvm::GCNRegPressure::getAGPRNum
unsigned getAGPRNum() const
Definition: GCNRegPressure.h:57