LLVM 24.0.0git
llvm::ScheduleDAGInstrs Class Referenceabstract

A ScheduleDAG for scheduling lists of MachineInstr. More...

#include "llvm/CodeGen/ScheduleDAGInstrs.h"

Inheritance diagram for llvm::ScheduleDAGInstrs:
[legend]

Public Types

enum  DumpDirection { TopDown , BottomUp , Bidirectional , NotSet }
 The direction that should be used to dump the scheduled Sequence. More...

Public Member Functions

void setDumpDirection (DumpDirection D)
 ScheduleDAGInstrs (MachineFunction &mf, const MachineLoopInfo *mli, bool RemoveKillFlags=false)
 ~ScheduleDAGInstrs () override=default
const TargetSchedModel * getSchedModel () const
 Gets the machine model for instruction scheduling.
const MCSchedClassDesc * getSchedClass (SUnit *SU) const
 Resolves and cache a resolved scheduling class for an SUnit.
bool IsReachable (SUnit *SU, SUnit *TargetSU)
 IsReachable - Checks if SU is reachable from TargetSU.
bool shouldScheduleSingleMIRegions () const
 Whether regions with a single MI should be scheduled.
MachineBasicBlock::iterator begin () const
 Returns an iterator to the top of the current scheduling region.
MachineBasicBlock::iterator end () const
 Returns an iterator to the bottom of the current scheduling region.
SUnit * newSUnit (MachineInstr *MI)
 Creates a new SUnit and return a ptr to it.
SUnit * getSUnit (MachineInstr *MI) const
 Returns an existing SUnit for this MI, or nullptr.
virtual bool doMBBSchedRegionsTopDown () const
 If this method returns true, handling of the scheduling regions themselves (in case of a scheduling boundary in MBB) will be done beginning with the topmost region of MBB.
virtual void startBlock (MachineBasicBlock *BB)
 Prepares to perform scheduling in the given block.
virtual void finishBlock ()
 Cleans up after scheduling in the given block.
virtual void enterRegion (MachineBasicBlock *bb, MachineBasicBlock::iterator begin, MachineBasicBlock::iterator end, unsigned regioninstrs)
 Initialize the DAG and common scheduler state for a new scheduling region.
virtual void exitRegion ()
 Called when the scheduler has finished scheduling the current region.
void buildSchedGraph (AAResults *AA, RegPressureTracker *RPTracker=nullptr, PressureDiffs *PDiffs=nullptr, LiveIntervals *LIS=nullptr, bool TrackLaneMasks=false)
 Builds SUnits for the current region.
void addSchedBarrierDeps ()
 Adds dependencies from instructions in the current list of instructions being scheduled to scheduling barrier.
virtual void schedule ()=0
 Orders nodes according to selected style.
virtual void finalizeSchedule ()
 Allow targets to perform final scheduling actions at the level of the whole MachineFunction.
void dumpNode (const SUnit &SU) const override
void dump () const override
std::string getGraphNodeLabel (const SUnit *SU) const override
 Returns a label for a DAG node that points to an instruction.
std::string getDAGName () const override
 Returns a label for the region of code covered by the DAG.
void fixupKills (MachineBasicBlock &MBB)
 Fixes register kill flags that scheduling has made invalid.
bool canAddEdge (SUnit *SuccSU, SUnit *PredSU)
 True if an edge can be added from PredSU to SuccSU without creating a cycle.
bool addEdge (SUnit *SuccSU, const SDep &PredDep)
 Add a DAG edge to the given SU with the given predecessor dependence data.
SmallVector< ClusterInfo > & getClusters ()
 Returns the array of the clusters.
ClusterInfo * getCluster (unsigned Idx)
 Get the specific cluster, return nullptr for InvalidClusterId.
Public Member Functions inherited from llvm::ScheduleDAG
 ScheduleDAG (const ScheduleDAG &)=delete
ScheduleDAG & operator= (const ScheduleDAG &)=delete
 ScheduleDAG (MachineFunction &mf)
virtual ~ScheduleDAG ()
void clearDAG ()
 Clears the DAG state (between regions).
const MCInstrDesc * getInstrDesc (const SUnit *SU) const
 Returns the MCInstrDesc of this SUnit.
virtual void viewGraph (const Twine &Name, const Twine &Title)
 Pops up a GraphViz/gv window with the ScheduleDAG rendered using 'dot'.
virtual void viewGraph ()
 Out-of-line implementation with no arguments is handy for gdb.
void dumpNodeName (const SUnit &SU) const
virtual void addCustomGraphFeatures (GraphWriter< ScheduleDAG * > &) const
 Adds custom features for a visualization of the ScheduleDAG.
unsigned VerifyScheduledDAG (bool isBottomUp)
 Verifies that all SUnits were scheduled and that their state is consistent.

Protected Types

using DbgValueVector

Protected Member Functions

void initSUnits ()
 Creates an SUnit for each real instruction, numbered in top-down topological order.
void addPhysRegDataDeps (SUnit *SU, unsigned OperIdx)
 MO is an operand of SU's instruction that defines a physical register.
void addPhysRegDeps (SUnit *SU, unsigned OperIdx)
 Adds register dependencies (data, anti, and output) from this SUnit to following instructions in the same scheduling region that depend the physical register referenced at OperIdx.
void addVRegDefDeps (SUnit *SU, unsigned OperIdx)
 Adds register output and data dependencies from this SUnit to instructions that occur later in the same scheduling region if they read from or write to the virtual register defined at OperIdx.
void addVRegUseDeps (SUnit *SU, unsigned OperIdx)
 Adds a register data dependency if the instruction that defines the virtual register used at OperIdx is mapped to an SUnit.
LaneBitmask getLaneMaskForMO (const MachineOperand &MO) const
 Returns a mask for which lanes get read/written by the given (register) machine operand.
bool deadDefHasNoUse (const MachineOperand &MO)
 Returns true if the def register in MO has no uses.
Protected Member Functions inherited from llvm::ScheduleDAG
void dumpNodeAll (const SUnit &SU) const

Protected Attributes

const MachineLoopInfo * MLI = nullptr
const MachineFrameInfo & MFI
TargetSchedModel SchedModel
 TargetSchedModel provides an interface to the machine model.
bool RemoveKillFlags
 True if the DAG builder should remove kill flags (in preparation for rescheduling).
bool ScheduleSingleMIRegions = false
 True if regions with a single MI should be scheduled.
bool CanHandleTerminators = false
 The standard DAG builder does not normally include terminators as DAG nodes because it does not create the necessary dependencies to prevent reordering.
bool TrackLaneMasks = false
 Whether lane masks should get tracked.
MachineBasicBlock * BB = nullptr
 The block in which to insert instructions.
MachineBasicBlock::iterator RegionBegin
 The beginning of the range to be scheduled.
MachineBasicBlock::iterator RegionEnd
 The end of the range to be scheduled.
unsigned NumRegionInstrs = 0
 Instructions in this region (distance(RegionBegin, RegionEnd)).
DenseMap< MachineInstr *, SUnit * > MISUnitMap
 After calling BuildSchedGraph, each machine instruction in the current scheduling region is mapped to an SUnit.
RegUnit2SUnitsMap Defs
 Defs, Uses - Remember where defs and uses of each register are as we iterate upward through the instructions.
RegUnit2SUnitsMap Uses
VReg2SUnitMultiMap CurrentVRegDefs
 Tracks the last instruction(s) in this region defining each virtual register.
VReg2SUnitOperIdxMultiMap CurrentVRegUses
 Tracks the last instructions in this region using each virtual register.
SmallVector< ClusterInfo > Clusters
DumpDirection DumpDir = NotSet
ScheduleDAGTopologicalSort Topo
 Topo - A topological ordering for SUnits which permits fast IsReachable and similar queries.
DbgValueVector DbgValues
 Remember instruction that precedes DBG_VALUE.
MachineInstr * FirstDbgValue = nullptr
LiveRegUnits LiveRegs
 Set of live physical registers for updating kill flags.

Friends

class ScheduleDAGDependencyBuilder

Additional Inherited Members

Public Attributes inherited from llvm::ScheduleDAG
const TargetMachine & TM
 Target processor.
const TargetInstrInfo * TII
 Target instruction information.
const TargetRegisterInfo * TRI
 Target processor register info.
MachineFunction & MF
 Machine function.
MachineRegisterInfo & MRI
 Virtual/real register map.
std::vector< SUnit > SUnits
 The scheduling units.
SUnit EntrySU
 Special node for the region entry.
SUnit ExitSU
 Special node for the region exit.
bool StressSched

Detailed Description

A ScheduleDAG for scheduling lists of MachineInstr.

Definition at line 109 of file ScheduleDAGInstrs.h.

Member Typedef Documentation

◆ DbgValueVector

Initial value:
std::vector<std::pair<MachineInstr *, MachineInstr *>>

Definition at line 192 of file ScheduleDAGInstrs.h.

Member Enumeration Documentation

◆ DumpDirection

The direction that should be used to dump the scheduled Sequence.

Enumerator
TopDown 
BottomUp 
Bidirectional 
NotSet 

Definition at line 176 of file ScheduleDAGInstrs.h.

Constructor & Destructor Documentation

◆ ScheduleDAGInstrs()

◆ ~ScheduleDAGInstrs()

llvm::ScheduleDAGInstrs::~ScheduleDAGInstrs ( )
overridedefault

Member Function Documentation

◆ addEdge()

bool ScheduleDAGInstrs::addEdge ( SUnit * SuccSU,
const SDep & PredDep )

Add a DAG edge to the given SU with the given predecessor dependence data.

Returns
true if the edge may be added without creating a cycle OR if an equivalent edge already existed (false indicates failure).

Definition at line 1189 of file ScheduleDAGInstrs.cpp.

References llvm::SUnit::addPred(), llvm::ScheduleDAG::ExitSU, llvm::SDep::getSUnit(), llvm::SDep::isArtificial(), and Topo.

Referenced by llvm::HexagonSubtarget::CallMutation::apply(), llvm::RISCVVectorMaskDAGMutation::apply(), and llvm::fuseInstructionPair().

◆ addPhysRegDataDeps()

◆ addPhysRegDeps()

void ScheduleDAGInstrs::addPhysRegDeps ( SUnit * SU,
unsigned OperIdx )
protected

◆ addSchedBarrierDeps()

void ScheduleDAGInstrs::addSchedBarrierDeps ( )

Adds dependencies from instructions in the current list of instructions being scheduled to scheduling barrier.

We want to make sure instructions which define registers that are either used by the terminator or are live-out are properly scheduled. This is especially important when the definition latency of the return value(s) are too high to be hidden by the branch or when the liveout registers used by instructions in the fallthrough block.

Definition at line 183 of file ScheduleDAGInstrs.cpp.

References addVRegUseDeps(), llvm::MachineInstr::all_uses(), BB, llvm::ScheduleDAG::ExitSU, llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::getNumOperands(), llvm::MCInstrDesc::hasImplicitUseOfPhysReg(), llvm::MachineInstr::isBarrier(), llvm::MachineInstr::isCall(), llvm::MCRegUnitMaskIterator::isValid(), RegionBegin, RegionEnd, llvm::skipDebugInstructionsBackward(), llvm::ScheduleDAG::TRI, and Uses.

◆ addVRegDefDeps()

void ScheduleDAGInstrs::addVRegDefDeps ( SUnit * SU,
unsigned OperIdx )
protected

Adds register output and data dependencies from this SUnit to instructions that occur later in the same scheduling region if they read from or write to the virtual register defined at OperIdx.

TODO: Hoist loop induction variable increments. This has to be reevaluated. Generally, IV scheduling should be done before coalescing.

Definition at line 396 of file ScheduleDAGInstrs.cpp.

References llvm::SUnit::addPred(), llvm::LaneBitmask::any(), assert(), CurrentVRegDefs, CurrentVRegUses, llvm::SDep::Data, deadDefHasNoUse(), llvm::drop_begin(), llvm::LaneBitmask::getAll(), llvm::SUnit::getInstr(), getLaneMaskForMO(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), I, llvm::MachineOperand::isDead(), llvm::MachineOperand::isUndef(), llvm::make_range(), llvm::ScheduleDAG::MF, MI, llvm::ScheduleDAG::MRI, none, llvm::SDep::Output, SchedModel, llvm::MachineOperand::setIsUndef(), llvm::SDep::setLatency(), and TrackLaneMasks.

◆ addVRegUseDeps()

void ScheduleDAGInstrs::addVRegUseDeps ( SUnit * SU,
unsigned OperIdx )
protected

Adds a register data dependency if the instruction that defines the virtual register used at OperIdx is mapped to an SUnit.

Add a register antidependency from this SUnit to instructions that occur later in the same scheduling region if they write the virtual register.

TODO: Handle ExitSU "uses" properly.

Definition at line 516 of file ScheduleDAGInstrs.cpp.

References llvm::SDep::Anti, assert(), CurrentVRegDefs, CurrentVRegUses, llvm::LaneBitmask::getAll(), llvm::SUnit::getInstr(), getLaneMaskForMO(), llvm::MachineOperand::getReg(), llvm::make_range(), MI, none, and TrackLaneMasks.

Referenced by addSchedBarrierDeps().

◆ begin()

MachineBasicBlock::iterator llvm::ScheduleDAGInstrs::begin ( ) const
inline

◆ buildSchedGraph()

void ScheduleDAGInstrs::buildSchedGraph ( AAResults * AA,
RegPressureTracker * RPTracker = nullptr,
PressureDiffs * PDiffs = nullptr,
LiveIntervals * LIS = nullptr,
bool TrackLaneMasks = false )

◆ canAddEdge()

bool ScheduleDAGInstrs::canAddEdge ( SUnit * SuccSU,
SUnit * PredSU )

True if an edge can be added from PredSU to SuccSU without creating a cycle.

Definition at line 1185 of file ScheduleDAGInstrs.cpp.

References llvm::ScheduleDAG::ExitSU, and Topo.

Referenced by llvm::RISCVVectorMaskDAGMutation::apply().

◆ deadDefHasNoUse()

bool ScheduleDAGInstrs::deadDefHasNoUse ( const MachineOperand & MO)
protected

Returns true if the def register in MO has no uses.

Definition at line 383 of file ScheduleDAGInstrs.cpp.

References CurrentVRegUses, getLaneMaskForMO(), and llvm::MachineOperand::getReg().

Referenced by addVRegDefDeps().

◆ doMBBSchedRegionsTopDown()

virtual bool llvm::ScheduleDAGInstrs::doMBBSchedRegionsTopDown ( ) const
inlinevirtual

If this method returns true, handling of the scheduling regions themselves (in case of a scheduling boundary in MBB) will be done beginning with the topmost region of MBB.

Reimplemented in llvm::ScheduleDAGMI.

Definition at line 245 of file ScheduleDAGInstrs.h.

◆ dump()

void ScheduleDAGInstrs::dump ( ) const
overridevirtual

◆ dumpNode()

◆ end()

MachineBasicBlock::iterator llvm::ScheduleDAGInstrs::end ( ) const
inline

Returns an iterator to the bottom of the current scheduling region.

Definition at line 234 of file ScheduleDAGInstrs.h.

References RegionEnd.

Referenced by enterRegion(), llvm::ScheduleDAGMI::enterRegion(), and llvm::ScheduleDAGMILive::enterRegion().

◆ enterRegion()

void ScheduleDAGInstrs::enterRegion ( MachineBasicBlock * bb,
MachineBasicBlock::iterator begin,
MachineBasicBlock::iterator end,
unsigned regioninstrs )
virtual

Initialize the DAG and common scheduler state for a new scheduling region.

This does not actually create the DAG, only clears it. The scheduling driver may call BuildSchedGraph multiple times per scheduling region.

Reimplemented in llvm::GCNIterativeScheduler, llvm::ScheduleDAGMI, and llvm::ScheduleDAGMILive.

Definition at line 169 of file ScheduleDAGInstrs.cpp.

References assert(), BB, begin(), end(), NumRegionInstrs, RegionBegin, and RegionEnd.

Referenced by llvm::ScheduleDAGMI::enterRegion().

◆ exitRegion()

void ScheduleDAGInstrs::exitRegion ( )
virtual

Called when the scheduler has finished scheduling the current region.

Definition at line 179 of file ScheduleDAGInstrs.cpp.

◆ finalizeSchedule()

virtual void llvm::ScheduleDAGInstrs::finalizeSchedule ( )
inlinevirtual

Allow targets to perform final scheduling actions at the level of the whole MachineFunction.

By default does nothing.

Reimplemented in llvm::GCNIterativeScheduler, llvm::GCNPostScheduleDAGMILive, and llvm::GCNScheduleDAGMILive.

Definition at line 292 of file ScheduleDAGInstrs.h.

Referenced by llvm::GCNPostScheduleDAGMILive::finalizeSchedule().

◆ finishBlock()

void ScheduleDAGInstrs::finishBlock ( )
virtual

Cleans up after scheduling in the given block.

Reimplemented in llvm::ScheduleDAGMI, and llvm::SwingSchedulerDAG.

Definition at line 164 of file ScheduleDAGInstrs.cpp.

References BB.

Referenced by llvm::ScheduleDAGMI::finishBlock(), and llvm::SwingSchedulerDAG::finishBlock().

◆ fixupKills()

◆ getCluster()

ClusterInfo * llvm::ScheduleDAGInstrs::getCluster ( unsigned Idx)
inline

Get the specific cluster, return nullptr for InvalidClusterId.

Definition at line 321 of file ScheduleDAGInstrs.h.

References Clusters, and llvm::InvalidClusterId.

◆ getClusters()

SmallVector< ClusterInfo > & llvm::ScheduleDAGInstrs::getClusters ( )
inline

Returns the array of the clusters.

Definition at line 318 of file ScheduleDAGInstrs.h.

References Clusters.

Referenced by llvm::fuseInstructionPair().

◆ getDAGName()

std::string ScheduleDAGInstrs::getDAGName ( ) const
overridevirtual

Returns a label for the region of code covered by the DAG.

Return the basic block label.

It is not necessarily unique because a block contains multiple scheduling regions. But it is fine for visualization.

Implements llvm::ScheduleDAG.

Definition at line 1181 of file ScheduleDAGInstrs.cpp.

References BB.

Referenced by llvm::ScheduleDAGMI::viewGraph().

◆ getGraphNodeLabel()

std::string ScheduleDAGInstrs::getGraphNodeLabel ( const SUnit * SU) const
overridevirtual

Returns a label for a DAG node that points to an instruction.

Implements llvm::ScheduleDAG.

Definition at line 1167 of file ScheduleDAGInstrs.cpp.

References llvm::ScheduleDAG::EntrySU, llvm::ScheduleDAG::ExitSU, llvm::SUnit::getInstr(), and llvm::MachineInstr::print().

◆ getLaneMaskForMO()

LaneBitmask ScheduleDAGInstrs::getLaneMaskForMO ( const MachineOperand & MO) const
protected

◆ getSchedClass()

◆ getSchedModel()

const TargetSchedModel * llvm::ScheduleDAGInstrs::getSchedModel ( ) const
inline

Gets the machine model for instruction scheduling.

Definition at line 211 of file ScheduleDAGInstrs.h.

References SchedModel.

◆ getSUnit()

◆ initSUnits()

void ScheduleDAGInstrs::initSUnits ( )
protected

Creates an SUnit for each real instruction, numbered in top-down topological order.

The instruction order A < B, implies that no edge exists from B to A.

Map each real instruction to its SUnit.

After initSUnits, the SUnits vector cannot be resized and the scheduler may hang onto SUnit pointers. We may relax this in the future by using SUnit IDs instead of pointers.

MachineScheduler relies on initSUnits numbering the nodes by their order in the original instruction list.

Definition at line 554 of file ScheduleDAGInstrs.cpp.

References llvm::SUnit::getInstr(), getSchedClass(), llvm::SUnit::hasReservedResource, llvm::SUnit::isCall, llvm::SUnit::isCommutable, llvm::SUnit::isUnbuffered, llvm::SUnit::Latency, llvm::make_range(), MI, MISUnitMap, newSUnit(), NumRegionInstrs, RegionBegin, RegionEnd, SchedModel, and llvm::ScheduleDAG::SUnits.

Referenced by buildSchedGraph().

◆ IsReachable()

bool llvm::ScheduleDAGInstrs::IsReachable ( SUnit * SU,
SUnit * TargetSU )
inline

IsReachable - Checks if SU is reachable from TargetSU.

Definition at line 221 of file ScheduleDAGInstrs.h.

References Topo.

◆ newSUnit()

SUnit * llvm::ScheduleDAGInstrs::newSUnit ( MachineInstr * MI)
inline

Creates a new SUnit and return a ptr to it.

Definition at line 341 of file ScheduleDAGInstrs.h.

References assert(), MI, and llvm::ScheduleDAG::SUnits.

Referenced by initSUnits().

◆ schedule()

virtual void llvm::ScheduleDAGInstrs::schedule ( )
pure virtual

◆ setDumpDirection()

void llvm::ScheduleDAGInstrs::setDumpDirection ( DumpDirection D)
inline

Definition at line 183 of file ScheduleDAGInstrs.h.

References D(), and DumpDir.

Referenced by llvm::ScheduleDAGMI::enterRegion().

◆ shouldScheduleSingleMIRegions()

bool llvm::ScheduleDAGInstrs::shouldScheduleSingleMIRegions ( ) const
inline

Whether regions with a single MI should be scheduled.

Definition at line 226 of file ScheduleDAGInstrs.h.

References ScheduleSingleMIRegions.

◆ startBlock()

void ScheduleDAGInstrs::startBlock ( MachineBasicBlock * BB)
virtual

Prepares to perform scheduling in the given block.

Reimplemented in llvm::ScheduleDAGMI.

Definition at line 160 of file ScheduleDAGInstrs.cpp.

References BB.

Referenced by llvm::ScheduleDAGMI::startBlock().

◆ ScheduleDAGDependencyBuilder

friend class ScheduleDAGDependencyBuilder
friend

Definition at line 172 of file ScheduleDAGInstrs.h.

References ScheduleDAGDependencyBuilder.

Referenced by buildSchedGraph(), and ScheduleDAGDependencyBuilder.

Member Data Documentation

◆ BB

◆ CanHandleTerminators

bool llvm::ScheduleDAGInstrs::CanHandleTerminators = false
protected

The standard DAG builder does not normally include terminators as DAG nodes because it does not create the necessary dependencies to prevent reordering.

A specialized scheduler can override TargetInstrInfo::isSchedulingBoundary then enable this flag to indicate it has taken responsibility for scheduling the terminator correctly.

Definition at line 129 of file ScheduleDAGInstrs.h.

Referenced by llvm::DefaultVLIWScheduler::DefaultVLIWScheduler().

◆ Clusters

SmallVector<ClusterInfo> llvm::ScheduleDAGInstrs::Clusters
protected

Definition at line 170 of file ScheduleDAGInstrs.h.

Referenced by getCluster(), and getClusters().

◆ CurrentVRegDefs

VReg2SUnitMultiMap llvm::ScheduleDAGInstrs::CurrentVRegDefs
protected

Tracks the last instruction(s) in this region defining each virtual register.

There may be multiple current definitions for a register with disjunct lanemasks.

Definition at line 166 of file ScheduleDAGInstrs.h.

Referenced by addVRegDefDeps(), addVRegUseDeps(), and buildSchedGraph().

◆ CurrentVRegUses

VReg2SUnitOperIdxMultiMap llvm::ScheduleDAGInstrs::CurrentVRegUses
protected

Tracks the last instructions in this region using each virtual register.

Definition at line 168 of file ScheduleDAGInstrs.h.

Referenced by addVRegDefDeps(), addVRegUseDeps(), buildSchedGraph(), and deadDefHasNoUse().

◆ DbgValues

DbgValueVector llvm::ScheduleDAGInstrs::DbgValues
protected

Remember instruction that precedes DBG_VALUE.

These are generated by buildSchedGraph but persist so they can be referenced when emitting the final schedule.

Definition at line 197 of file ScheduleDAGInstrs.h.

Referenced by buildSchedGraph(), llvm::GCNIterativeScheduler::detachSchedule(), llvm::ScheduleDAGMI::placeDebugValues(), and ScheduleDAGInstrs().

◆ Defs

RegUnit2SUnitsMap llvm::ScheduleDAGInstrs::Defs
protected

Defs, Uses - Remember where defs and uses of each register are as we iterate upward through the instructions.

This is allocated here instead of inside BuildSchedGraph to avoid the need for it to be initialized and destructed for each block.

Definition at line 160 of file ScheduleDAGInstrs.h.

Referenced by addPhysRegDeps(), and buildSchedGraph().

◆ DumpDir

DumpDirection llvm::ScheduleDAGInstrs::DumpDir = NotSet
protected

Definition at line 186 of file ScheduleDAGInstrs.h.

Referenced by llvm::ScheduleDAGMI::dumpSchedule(), and setDumpDirection().

◆ FirstDbgValue

MachineInstr* llvm::ScheduleDAGInstrs::FirstDbgValue = nullptr
protected

◆ LiveRegs

LiveRegUnits llvm::ScheduleDAGInstrs::LiveRegs
protected

Set of live physical registers for updating kill flags.

Definition at line 201 of file ScheduleDAGInstrs.h.

Referenced by fixupKills().

◆ MFI

◆ MISUnitMap

DenseMap<MachineInstr*, SUnit*> llvm::ScheduleDAGInstrs::MISUnitMap
protected

After calling BuildSchedGraph, each machine instruction in the current scheduling region is mapped to an SUnit.

Definition at line 151 of file ScheduleDAGInstrs.h.

Referenced by llvm::SwingSchedulerDAG::applyInstrChange(), buildSchedGraph(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), getSUnit(), and initSUnits().

◆ MLI

◆ NumRegionInstrs

unsigned llvm::ScheduleDAGInstrs::NumRegionInstrs = 0
protected

Instructions in this region (distance(RegionBegin, RegionEnd)).

Definition at line 147 of file ScheduleDAGInstrs.h.

Referenced by llvm::GCNIterativeScheduler::enterRegion(), enterRegion(), and initSUnits().

◆ RegionBegin

◆ RegionEnd

◆ RemoveKillFlags

bool llvm::ScheduleDAGInstrs::RemoveKillFlags
protected

True if the DAG builder should remove kill flags (in preparation for rescheduling).

Definition at line 119 of file ScheduleDAGInstrs.h.

Referenced by addPhysRegDeps(), llvm::GCNPostScheduleDAGMILive::GCNPostScheduleDAGMILive(), ScheduleDAGInstrs(), and llvm::ScheduleDAGMI::ScheduleDAGMI().

◆ SchedModel

◆ ScheduleSingleMIRegions

bool llvm::ScheduleDAGInstrs::ScheduleSingleMIRegions = false
protected

True if regions with a single MI should be scheduled.

Definition at line 122 of file ScheduleDAGInstrs.h.

Referenced by llvm::GCNScheduleDAGMILive::GCNScheduleDAGMILive(), and shouldScheduleSingleMIRegions().

◆ Topo

ScheduleDAGTopologicalSort llvm::ScheduleDAGInstrs::Topo
protected

Topo - A topological ordering for SUnits which permits fast IsReachable and similar queries.

Definition at line 190 of file ScheduleDAGInstrs.h.

Referenced by addEdge(), buildSchedGraph(), canAddEdge(), llvm::SIScheduleDAGMI::GetTopo(), IsReachable(), llvm::VLIWMachineScheduler::schedule(), and ScheduleDAGInstrs().

◆ TrackLaneMasks

bool llvm::ScheduleDAGInstrs::TrackLaneMasks = false
protected

Whether lane masks should get tracked.

Definition at line 132 of file ScheduleDAGInstrs.h.

Referenced by addVRegDefDeps(), addVRegUseDeps(), buildSchedGraph(), and llvm::ScheduleDAGMILive::collectVRegUses().

◆ Uses

RegUnit2SUnitsMap llvm::ScheduleDAGInstrs::Uses
protected

The documentation for this class was generated from the following files: