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M68kRegisterInfo.h
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1 //===-- M68kRegisterInfo.h - M68k Register Information Impl --*- C++ --===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file contains the M68k implementation of the TargetRegisterInfo
11 /// class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_M68K_M68KREGISTERINFO_H
16 #define LLVM_LIB_TARGET_M68K_M68KREGISTERINFO_H
17 
18 #include "M68k.h"
19 
21 
22 #define GET_REGINFO_HEADER
23 #include "M68kGenRegisterInfo.inc"
24 
25 namespace llvm {
26 class M68kSubtarget;
27 class TargetInstrInfo;
28 class Type;
29 
31  virtual void anchor();
32 
33  /// Physical register used as stack ptr.
34  unsigned StackPtr;
35 
36  /// Physical register used as frame ptr.
37  unsigned FramePtr;
38 
39  /// Physical register used as a base ptr in complex stack frames. I.e., when
40  /// we need a 3rd base, not just SP and FP, due to variable size stack
41  /// objects.
42  unsigned BasePtr;
43 
44  /// Physical register used to store GOT address if needed.
45  unsigned GlobalBasePtr;
46 
47 protected:
49 
50 public:
52 
53  const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
54 
56  CallingConv::ID) const override;
57 
58  /// Returns a register class with registers that can be used in forming tail
59  /// calls.
60  const TargetRegisterClass *
61  getRegsForTailCall(const MachineFunction &MF) const;
62 
63  /// Return a mega-register of the specified register Reg so its sub-register
64  /// of index SubIdx is Reg, its super(or mega) Reg. In other words it will
65  /// return a register that is not direct super register but still shares
66  /// physical register with Reg.
67  /// NOTE not sure about the term though.
68  unsigned getMatchingMegaReg(unsigned Reg,
69  const TargetRegisterClass *RC) const;
70 
71  /// Returns the Register Class of a physical register of the given type,
72  /// picking the biggest register class of the right type that contains this
73  /// physreg.
74  const TargetRegisterClass *getMaximalPhysRegClass(unsigned reg, MVT VT) const;
75 
76  /// Return index of a register within a register class, otherwise return -1
77  int getRegisterOrder(unsigned Reg, const TargetRegisterClass &TRC) const;
78 
79  /// Return spill order index of a register, if there is none then trap
80  int getSpillRegisterOrder(unsigned Reg) const;
81 
82  BitVector getReservedRegs(const MachineFunction &MF) const override;
83 
84  bool requiresRegisterScavenging(const MachineFunction &MF) const override;
85 
86  bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
87 
88  /// FrameIndex represent objects inside a abstract stack. We must replace
89  /// FrameIndex with an stack/frame pointer direct reference.
91  unsigned FIOperandNum,
92  RegScavenger *RS = nullptr) const override;
93 
94  bool hasBasePointer(const MachineFunction &MF) const;
95 
96  /// True if the stack can be realigned for the target.
97  bool canRealignStack(const MachineFunction &MF) const override;
98 
99  Register getFrameRegister(const MachineFunction &MF) const override;
100  unsigned getStackRegister() const { return StackPtr; }
101  unsigned getBaseRegister() const { return BasePtr; }
102  unsigned getGlobalBaseRegister() const { return GlobalBasePtr; }
103 
104  const TargetRegisterClass *intRegClass(unsigned Size) const;
105 };
106 
107 } // end namespace llvm
108 
109 #endif
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1558
llvm::M68kRegisterInfo::intRegClass
const TargetRegisterClass * intRegClass(unsigned Size) const
Definition: M68kRegisterInfo.cpp:265
llvm::M68kRegisterInfo::M68kRegisterInfo
M68kRegisterInfo(const M68kSubtarget &Subtarget)
Definition: M68kRegisterInfo.cpp:44
llvm::M68kRegisterInfo::getSpillRegisterOrder
int getSpillRegisterOrder(unsigned Reg) const
Return spill order index of a register, if there is none then trap.
Definition: M68kRegisterInfo.cpp:115
llvm::M68kRegisterInfo::getStackRegister
unsigned getStackRegister() const
Definition: M68kRegisterInfo.h:100
llvm::M68kRegisterInfo
Definition: M68kRegisterInfo.h:30
llvm::M68kRegisterInfo::trackLivenessAfterRegAlloc
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override
Definition: M68kRegisterInfo.cpp:217
llvm::M68kRegisterInfo::getFrameRegister
Register getFrameRegister(const MachineFunction &MF) const override
Definition: M68kRegisterInfo.cpp:260
llvm::M68kRegisterInfo::getCalleeSavedRegs
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Definition: M68kRegisterInfo.cpp:59
M68k.h
llvm::M68kRegisterInfo::getMatchingMegaReg
unsigned getMatchingMegaReg(unsigned Reg, const TargetRegisterClass *RC) const
Return a mega-register of the specified register Reg so its sub-register of index SubIdx is Reg,...
Definition: M68kRegisterInfo.cpp:75
llvm::M68kRegisterInfo::getMaximalPhysRegClass
const TargetRegisterClass * getMaximalPhysRegClass(unsigned reg, MVT VT) const
Returns the Register Class of a physical register of the given type, picking the biggest register cla...
Definition: M68kRegisterInfo.cpp:84
llvm::M68kRegisterInfo::Subtarget
const M68kSubtarget & Subtarget
Definition: M68kRegisterInfo.h:48
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::M68kRegisterInfo::getGlobalBaseRegister
unsigned getGlobalBaseRegister() const
Definition: M68kRegisterInfo.h:102
llvm::M68kRegisterInfo::requiresRegisterScavenging
bool requiresRegisterScavenging(const MachineFunction &MF) const override
Definition: M68kRegisterInfo.cpp:212
llvm::M68kRegisterInfo::canRealignStack
bool canRealignStack(const MachineFunction &MF) const override
True if the stack can be realigned for the target.
Definition: M68kRegisterInfo.cpp:241
llvm::M68kRegisterInfo::eliminateFrameIndex
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
FrameIndex represent objects inside a abstract stack.
Definition: M68kRegisterInfo.cpp:164
llvm::BitVector
Definition: BitVector.h:74
llvm::CallingConv::ID
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
llvm::M68kSubtarget
Definition: M68kSubtarget.h:45
llvm::RegScavenger
Definition: RegisterScavenging.h:34
TemplateParamKind::Type
@ Type
llvm::MVT
Machine Value Type.
Definition: MachineValueType.h:31
llvm::MachineFunction
Definition: MachineFunction.h:234
uint32_t
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::M68kRegisterInfo::getRegsForTailCall
const TargetRegisterClass * getRegsForTailCall(const MachineFunction &MF) const
Returns a register class with registers that can be used in forming tail calls.
Definition: M68kRegisterInfo.cpp:70
llvm::M68kRegisterInfo::getReservedRegs
BitVector getReservedRegs(const MachineFunction &MF) const override
Definition: M68kRegisterInfo.cpp:121
uint16_t
llvm::M68kRegisterInfo::hasBasePointer
bool hasBasePointer(const MachineFunction &MF) const
Definition: M68kRegisterInfo.cpp:226
llvm::M68kRegisterInfo::getRegisterOrder
int getRegisterOrder(unsigned Reg, const TargetRegisterClass &TRC) const
Return index of a register within a register class, otherwise return -1.
Definition: M68kRegisterInfo.cpp:105
llvm::M68kRegisterInfo::getCallPreservedMask
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
Definition: M68kRegisterInfo.cpp:64
llvm::M68kRegisterInfo::getBaseRegister
unsigned getBaseRegister() const
Definition: M68kRegisterInfo.h:101
llvm::MachineInstrBundleIterator< MachineInstr >
TargetRegisterInfo.h
M68kGenRegisterInfo