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RegisterScavenging.h
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1 //===- RegisterScavenging.h - Machine register scavenging -------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This file declares the machine register scavenger class. It can provide
11 /// information such as unused register at any point in a machine basic block.
12 /// It also provides a mechanism to make registers available by evicting them
13 /// to spill slots.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
19 
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/ADT/SmallVector.h"
25 #include "llvm/MC/LaneBitmask.h"
26 
27 namespace llvm {
28 
29 class MachineInstr;
30 class TargetInstrInfo;
31 class TargetRegisterClass;
32 class TargetRegisterInfo;
33 
34 class RegScavenger {
35  const TargetRegisterInfo *TRI;
36  const TargetInstrInfo *TII;
38  MachineBasicBlock *MBB = nullptr;
40  unsigned NumRegUnits = 0;
41 
42  /// True if RegScavenger is currently tracking the liveness of registers.
43  bool Tracking = false;
44 
45  /// Information on scavenged registers (held in a spill slot).
46  struct ScavengedInfo {
47  ScavengedInfo(int FI = -1) : FrameIndex(FI) {}
48 
49  /// A spill slot used for scavenging a register post register allocation.
50  int FrameIndex;
51 
52  /// If non-zero, the specific register is currently being
53  /// scavenged. That is, it is spilled to this scavenging stack slot.
54  Register Reg;
55 
56  /// The instruction that restores the scavenged register from stack.
57  const MachineInstr *Restore = nullptr;
58  };
59 
60  /// A vector of information on scavenged registers.
62 
63  LiveRegUnits LiveUnits;
64 
65  // These BitVectors are only used internally to forward(). They are members
66  // to avoid frequent reallocations.
67  BitVector KillRegUnits, DefRegUnits;
68  BitVector TmpRegUnits;
69 
70 public:
71  RegScavenger() = default;
72 
73  /// Start tracking liveness from the begin of basic block \p MBB.
75 
76  /// Start tracking liveness from the end of basic block \p MBB.
77  /// Use backward() to move towards the beginning of the block. This is
78  /// preferred to enterBasicBlock() and forward() because it does not depend
79  /// on the presence of kill flags.
81 
82  /// Move the internal MBB iterator and update register states.
83  void forward();
84 
85  /// Move the internal MBB iterator and update register states until
86  /// it has processed the specific iterator.
88  if (!Tracking && MBB->begin() != I) forward();
89  while (MBBI != I) forward();
90  }
91 
92  /// Update internal register state and move MBB iterator backwards.
93  /// Contrary to unprocess() this method gives precise results even in the
94  /// absence of kill flags.
95  void backward();
96 
97  /// Call backward() as long as the internal iterator does not point to \p I.
99  while (MBBI != I)
100  backward();
101  }
102 
103  /// Move the internal MBB iterator but do not update register states.
105  if (I == MachineBasicBlock::iterator(nullptr))
106  Tracking = false;
107  MBBI = I;
108  }
109 
111 
112  /// Return if a specific register is currently used.
113  bool isRegUsed(Register Reg, bool includeReserved = true) const;
114 
115  /// Return all available registers in the register class in Mask.
117 
118  /// Find an unused register of the specified register class.
119  /// Return 0 if none is found.
120  Register FindUnusedReg(const TargetRegisterClass *RC) const;
121 
122  /// Add a scavenging frame index.
123  void addScavengingFrameIndex(int FI) {
124  Scavenged.push_back(ScavengedInfo(FI));
125  }
126 
127  /// Query whether a frame index is a scavenging frame index.
128  bool isScavengingFrameIndex(int FI) const {
129  for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
130  IE = Scavenged.end(); I != IE; ++I)
131  if (I->FrameIndex == FI)
132  return true;
133 
134  return false;
135  }
136 
137  /// Get an array of scavenging frame indices.
139  for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
140  IE = Scavenged.end(); I != IE; ++I)
141  if (I->FrameIndex >= 0)
142  A.push_back(I->FrameIndex);
143  }
144 
145  /// Make a register of the specific register class
146  /// available and do the appropriate bookkeeping. SPAdj is the stack
147  /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
148  /// Returns the scavenged register.
149  /// This is deprecated as it depends on the quality of the kill flags being
150  /// present; Use scavengeRegisterBackwards() instead!
151  ///
152  /// If \p AllowSpill is false, fail if a spill is required to make the
153  /// register available, and return NoRegister.
155  MachineBasicBlock::iterator I, int SPAdj,
156  bool AllowSpill = true);
157  Register scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj,
158  bool AllowSpill = true) {
159  return scavengeRegister(RegClass, MBBI, SPAdj, AllowSpill);
160  }
161 
162  /// Make a register of the specific register class available from the current
163  /// position backwards to the place before \p To. If \p RestoreAfter is true
164  /// this includes the instruction following the current position.
165  /// SPAdj is the stack adjustment due to call frame, it's passed along to
166  /// eliminateFrameIndex().
167  /// Returns the scavenged register.
168  ///
169  /// If \p AllowSpill is false, fail if a spill is required to make the
170  /// register available, and return NoRegister.
173  bool RestoreAfter, int SPAdj,
174  bool AllowSpill = true);
175 
176  /// Tell the scavenger a register is used.
178 
179 private:
180  /// Returns true if a register is reserved. It is never "unused".
181  bool isReserved(Register Reg) const { return MRI->isReserved(Reg); }
182 
183  /// setUsed / setUnused - Mark the state of one or a number of register units.
184  ///
185  void setUsed(const BitVector &RegUnits) {
186  LiveUnits.addUnits(RegUnits);
187  }
188  void setUnused(const BitVector &RegUnits) {
189  LiveUnits.removeUnits(RegUnits);
190  }
191 
192  /// Processes the current instruction and fill the KillRegUnits and
193  /// DefRegUnits bit vectors.
194  void determineKillsAndDefs();
195 
196  /// Add all Reg Units that Reg contains to BV.
197  void addRegUnits(BitVector &BV, MCRegister Reg);
198 
199  /// Remove all Reg Units that \p Reg contains from \p BV.
200  void removeRegUnits(BitVector &BV, MCRegister Reg);
201 
202  /// Return the candidate register that is unused for the longest after
203  /// StartMI. UseMI is set to the instruction where the search stopped.
204  ///
205  /// No more than InstrLimit instructions are inspected.
206  Register findSurvivorReg(MachineBasicBlock::iterator StartMI,
207  BitVector &Candidates,
208  unsigned InstrLimit,
210 
211  /// Initialize RegisterScavenger.
212  void init(MachineBasicBlock &MBB);
213 
214  /// Mark live-in registers of basic block as used.
215  void setLiveInsUsed(const MachineBasicBlock &MBB);
216 
217  /// Spill a register after position \p After and reload it before position
218  /// \p UseMI.
219  ScavengedInfo &spill(Register Reg, const TargetRegisterClass &RC, int SPAdj,
222 };
223 
224 /// Replaces all frame index virtual registers with physical registers. Uses the
225 /// register scavenger to find an appropriate register to use.
226 void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS);
227 
228 } // end namespace llvm
229 
230 #endif // LLVM_CODEGEN_REGISTERSCAVENGING_H
llvm::LaneBitmask
Definition: LaneBitmask.h:40
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::RegScavenger::scavengeRegister
Register scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj, bool AllowSpill=true)
Definition: RegisterScavenging.h:157
UseMI
MachineInstrBuilder & UseMI
Definition: AArch64ExpandPseudoInsts.cpp:102
llvm::MachineRegisterInfo
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Definition: MachineRegisterInfo.h:52
llvm::RegScavenger::scavengeRegisterBackwards
Register scavengeRegisterBackwards(const TargetRegisterClass &RC, MachineBasicBlock::iterator To, bool RestoreAfter, int SPAdj, bool AllowSpill=true)
Make a register of the specific register class available from the current position backwards to the p...
Definition: RegisterScavenging.cpp:566
llvm::SmallVector< ScavengedInfo, 2 >
MachineBasicBlock.h
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:231
llvm::LiveRegUnits::addUnits
void addUnits(const BitVector &RegUnits)
Adds all register units marked in the bitvector RegUnits.
Definition: LiveRegUnits.h:144
InstrLimit
static cl::opt< unsigned > InstrLimit("dfa-instr-limit", cl::Hidden, cl::init(0), cl::desc("If present, stops packetizing after N instructions"))
llvm::RegScavenger::FindUnusedReg
Register FindUnusedReg(const TargetRegisterClass *RC) const
Find an unused register of the specified register class.
Definition: RegisterScavenging.cpp:268
MachineRegisterInfo.h
llvm::RegScavenger::isScavengingFrameIndex
bool isScavengingFrameIndex(int FI) const
Query whether a frame index is a scavenging frame index.
Definition: RegisterScavenging.h:128
llvm::RegScavenger::isRegUsed
bool isRegUsed(Register Reg, bool includeReserved=true) const
Return if a specific register is currently used.
Definition: RegisterScavenging.cpp:262
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition: TargetInstrInfo.h:97
llvm::RegScavenger::scavengeRegister
Register scavengeRegister(const TargetRegisterClass *RC, MachineBasicBlock::iterator I, int SPAdj, bool AllowSpill=true)
Make a register of the specific register class available and do the appropriate bookkeeping.
Definition: RegisterScavenging.cpp:521
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::RegScavenger::getScavengingFrameIndices
void getScavengingFrameIndices(SmallVectorImpl< int > &A) const
Get an array of scavenging frame indices.
Definition: RegisterScavenging.h:138
llvm::RegScavenger::backward
void backward()
Update internal register state and move MBB iterator backwards.
Definition: RegisterScavenging.cpp:241
llvm::RegScavenger::backward
void backward(MachineBasicBlock::iterator I)
Call backward() as long as the internal iterator does not point to I.
Definition: RegisterScavenging.h:98
llvm::RegScavenger::enterBasicBlockEnd
void enterBasicBlockEnd(MachineBasicBlock &MBB)
Start tracking liveness from the end of basic block MBB.
Definition: RegisterScavenging.cpp:89
BitVector.h
llvm::BitVector
Definition: BitVector.h:74
llvm::LiveRegUnits
A set of register units used to track register liveness.
Definition: LiveRegUnits.h:30
llvm::MachineBasicBlock
Definition: MachineBasicBlock.h:95
llvm::RegScavenger::skipTo
void skipTo(MachineBasicBlock::iterator I)
Move the internal MBB iterator but do not update register states.
Definition: RegisterScavenging.h:104
llvm::RegScavenger::RegScavenger
RegScavenger()=default
llvm::ARM_PROC::IE
@ IE
Definition: ARMBaseInfo.h:27
llvm::ISD::Register
@ Register
Definition: ISDOpcodes.h:74
llvm::RegScavenger::getCurrentPosition
MachineBasicBlock::iterator getCurrentPosition() const
Definition: RegisterScavenging.h:110
llvm::MachineInstr
Representation of each machine instruction.
Definition: MachineInstr.h:64
llvm::LiveRegUnits::removeUnits
void removeUnits(const BitVector &RegUnits)
Removes all register units marked in the bitvector RegUnits.
Definition: LiveRegUnits.h:148
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::scavengeFrameVirtualRegs
void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS)
Replaces all frame index virtual registers with physical registers.
Definition: RegisterScavenging.cpp:738
llvm::RegScavenger
Definition: RegisterScavenging.h:34
llvm::RegScavenger::addScavengingFrameIndex
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Definition: RegisterScavenging.h:123
llvm::MachineBasicBlock::iterator
MachineInstrBundleIterator< MachineInstr > iterator
Definition: MachineBasicBlock.h:233
MBBI
MachineBasicBlock MachineBasicBlock::iterator MBBI
Definition: AArch64SLSHardening.cpp:75
LiveRegUnits.h
MRI
unsigned const MachineRegisterInfo * MRI
Definition: AArch64AdvSIMDScalarPass.cpp:105
llvm::Register
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
llvm::RegScavenger::enterBasicBlock
void enterBasicBlock(MachineBasicBlock &MBB)
Start tracking liveness from the begin of basic block MBB.
Definition: RegisterScavenging.cpp:84
llvm::ISD::FrameIndex
@ FrameIndex
Definition: ISDOpcodes.h:80
MBB
MachineBasicBlock & MBB
Definition: AArch64SLSHardening.cpp:74
llvm::RegScavenger::setRegUsed
void setRegUsed(Register Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Tell the scavenger a register is used.
Definition: RegisterScavenging.cpp:53
llvm::RegScavenger::forward
void forward()
Move the internal MBB iterator and update register states.
Definition: RegisterScavenging.cpp:157
llvm::RegScavenger::forward
void forward(MachineBasicBlock::iterator I)
Move the internal MBB iterator and update register states until it has processed the specific iterato...
Definition: RegisterScavenging.h:87
llvm::RegScavenger::getRegsAvailable
BitVector getRegsAvailable(const TargetRegisterClass *RC)
Return all available registers in the register class in Mask.
Definition: RegisterScavenging.cpp:279
SmallVector.h
LaneBitmask.h
llvm::SmallVectorImpl
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:43
llvm::MachineInstrBundleIterator< MachineInstr >
llvm::LaneBitmask::getAll
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:84