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17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
30 class TargetInstrInfo;
31 class TargetRegisterClass;
32 class TargetRegisterInfo;
40 unsigned NumRegUnits = 0;
43 bool Tracking =
false;
46 struct ScavengedInfo {
81 for (ScavengedInfo &Slot : Scavenged) {
82 if (Slot.FrameIndex == FI) {
85 Slot.Restore = Restore;
144 Scavenged.push_back(ScavengedInfo(FI));
150 IE = Scavenged.end();
I !=
IE; ++
I)
151 if (
I->FrameIndex == FI)
160 IE = Scavenged.end();
I !=
IE; ++
I)
161 if (
I->FrameIndex >= 0)
162 A.push_back(
I->FrameIndex);
176 bool AllowSpill =
true);
178 bool AllowSpill =
true) {
193 bool RestoreAfter,
int SPAdj,
194 bool AllowSpill =
true);
205 void setUsed(
const BitVector &RegUnits) {
208 void setUnused(
const BitVector &RegUnits) {
214 void determineKillsAndDefs();
217 void addRegUnits(BitVector &BV, MCRegister
Reg);
220 void removeRegUnits(BitVector &BV, MCRegister
Reg);
227 BitVector &Candidates,
232 void init(MachineBasicBlock &MBB);
236 ScavengedInfo &spill(Register
Reg,
const TargetRegisterClass &RC,
int SPAdj,
247 #endif // LLVM_CODEGEN_REGISTERSCAVENGING_H
This is an optimization pass for GlobalISel generic memory operations.
Register scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj, bool AllowSpill=true)
MachineInstrBuilder & UseMI
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Register scavengeRegisterBackwards(const TargetRegisterClass &RC, MachineBasicBlock::iterator To, bool RestoreAfter, int SPAdj, bool AllowSpill=true)
Make a register of the specific register class available from the current position backwards to the p...
Reg
All possible values of the reg field in the ModR/M byte.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void addUnits(const BitVector &RegUnits)
Adds all register units marked in the bitvector RegUnits.
static cl::opt< unsigned > InstrLimit("dfa-instr-limit", cl::Hidden, cl::init(0), cl::desc("If present, stops packetizing after N instructions"))
Register FindUnusedReg(const TargetRegisterClass *RC) const
Find an unused register of the specified register class.
bool isScavengingFrameIndex(int FI) const
Query whether a frame index is a scavenging frame index.
bool isRegUsed(Register Reg, bool includeReserved=true) const
Return if a specific register is currently used.
TargetInstrInfo - Interface to description of machine instruction set.
Register scavengeRegister(const TargetRegisterClass *RC, MachineBasicBlock::iterator I, int SPAdj, bool AllowSpill=true)
Make a register of the specific register class available and do the appropriate bookkeeping.
void getScavengingFrameIndices(SmallVectorImpl< int > &A) const
Get an array of scavenging frame indices.
void backward()
Update internal register state and move MBB iterator backwards.
void backward(MachineBasicBlock::iterator I)
Call backward() as long as the internal iterator does not point to I.
void enterBasicBlockEnd(MachineBasicBlock &MBB)
Start tracking liveness from the end of basic block MBB.
A set of register units used to track register liveness.
void skipTo(MachineBasicBlock::iterator I)
Move the internal MBB iterator but do not update register states.
MachineBasicBlock::iterator getCurrentPosition() const
Representation of each machine instruction.
void removeUnits(const BitVector &RegUnits)
Removes all register units marked in the bitvector RegUnits.
void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS)
Replaces all frame index virtual registers with physical registers.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
void assignRegToScavengingIndex(int FI, Register Reg, MachineInstr *Restore=nullptr)
Record that Reg is in use at scavenging index FI.
MachineInstrBundleIterator< MachineInstr > iterator
MachineBasicBlock MachineBasicBlock::iterator MBBI
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned const MachineRegisterInfo * MRI
Wrapper class representing virtual and physical registers.
void enterBasicBlock(MachineBasicBlock &MBB)
Start tracking liveness from the begin of basic block MBB.
void setRegUsed(Register Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Tell the scavenger a register is used.
void forward()
Move the internal MBB iterator and update register states.
void forward(MachineBasicBlock::iterator I)
Move the internal MBB iterator and update register states until it has processed the specific iterato...
BitVector getRegsAvailable(const TargetRegisterClass *RC)
Return all available registers in the register class in Mask.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
static constexpr LaneBitmask getAll()