LLVM  16.0.0git
Macros | Variables
RISCVRegisterInfo.cpp File Reference
#include "RISCVRegisterInfo.h"
#include "RISCV.h"
#include "RISCVMachineFunctionInfo.h"
#include "RISCVSubtarget.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/Support/ErrorHandling.h"
#include "RISCVGenRegisterInfo.inc"
Include dependency graph for RISCVRegisterInfo.cpp:

Go to the source code of this file.

Macros

#define GET_REGINFO_TARGET_DESC
 

Variables

static cl::opt< bool > DisableRegAllocHints ("riscv-disable-regalloc-hints", cl::Hidden, cl::init(false), cl::desc("Disable two address hints for register " "allocation"))
 
static const std::pair< unsigned, intFixedCSRFIMap []
 

Macro Definition Documentation

◆ GET_REGINFO_TARGET_DESC

#define GET_REGINFO_TARGET_DESC

Definition at line 27 of file RISCVRegisterInfo.cpp.

Variable Documentation

◆ DisableRegAllocHints

cl::opt<bool> DisableRegAllocHints("riscv-disable-regalloc-hints", cl::Hidden, cl::init(false), cl::desc("Disable two address hints for register " "allocation"))
static

◆ FixedCSRFIMap

const std::pair<unsigned, int> FixedCSRFIMap[]
static
Initial value:
= {
{ RISCV::X1, -1},
{ RISCV::X8, -2},
{ RISCV::X9, -3},
{ RISCV::X18, -4},
{ RISCV::X19, -5},
{ RISCV::X20, -6},
{ RISCV::X21, -7},
{ RISCV::X22, -8},
{ RISCV::X23, -9},
{ RISCV::X24, -10},
{ RISCV::X25, -11},
{ RISCV::X26, -12},
{ RISCV::X27, -13}
}

Definition at line 132 of file RISCVRegisterInfo.cpp.

Referenced by llvm::RISCVRegisterInfo::hasReservedSpillSlot().