LLVM 20.0.0git
SparcMachineFunctionInfo.h
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1//===- SparcMachineFunctionInfo.h - Sparc Machine Function Info -*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares Sparc specific per-machine-function information.
10//
11//===----------------------------------------------------------------------===//
12#ifndef LLVM_LIB_TARGET_SPARC_SPARCMACHINEFUNCTIONINFO_H
13#define LLVM_LIB_TARGET_SPARC_SPARCMACHINEFUNCTIONINFO_H
14
16
17namespace llvm {
18
20 virtual void anchor();
21 private:
22 Register GlobalBaseReg;
23
24 /// VarArgsFrameOffset - Frame offset to start of varargs area.
25 int VarArgsFrameOffset;
26
27 /// SRetReturnReg - Holds the virtual register into which the sret
28 /// argument is passed.
29 Register SRetReturnReg;
30
31 /// IsLeafProc - True if the function is a leaf procedure.
32 bool IsLeafProc;
33 public:
35 : GlobalBaseReg(0), VarArgsFrameOffset(0), SRetReturnReg(0),
36 IsLeafProc(false) {}
38 : GlobalBaseReg(0), VarArgsFrameOffset(0), SRetReturnReg(0),
39 IsLeafProc(false) {}
40
44 const override;
45
46 Register getGlobalBaseReg() const { return GlobalBaseReg; }
47 void setGlobalBaseReg(Register Reg) { GlobalBaseReg = Reg; }
48
49 int getVarArgsFrameOffset() const { return VarArgsFrameOffset; }
50 void setVarArgsFrameOffset(int Offset) { VarArgsFrameOffset = Offset; }
51
52 Register getSRetReturnReg() const { return SRetReturnReg; }
53 void setSRetReturnReg(Register Reg) { SRetReturnReg = Reg; }
54
55 void setLeafProc(bool rhs) { IsLeafProc = rhs; }
56 bool isLeafProc() const { return IsLeafProc; }
57 };
58}
59
60#endif
#define F(x, y, z)
Definition: MD5.cpp:55
unsigned Reg
Basic Register Allocator
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:66
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
MachineFunctionInfo * clone(BumpPtrAllocator &Allocator, MachineFunction &DestMF, const DenseMap< MachineBasicBlock *, MachineBasicBlock * > &Src2DstMBB) const override
Make a functionally equivalent copy of this MachineFunctionInfo in MF.
SparcMachineFunctionInfo(const Function &F, const TargetSubtargetInfo *STI)
TargetSubtargetInfo - Generic base class for all target subtargets.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:480
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...