LLVM 19.0.0git
SystemZCopyPhysRegs.cpp
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1//===---------- SystemZPhysRegCopy.cpp - Handle phys reg copies -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass makes sure that a COPY of a physical register will be
10// implementable after register allocation in copyPhysReg() (this could be
11// done in EmitInstrWithCustomInserter() instead if COPY instructions would
12// be passed to it).
13//
14//===----------------------------------------------------------------------===//
15
25
26using namespace llvm;
27
28namespace {
29
30class SystemZCopyPhysRegs : public MachineFunctionPass {
31public:
32 static char ID;
33 SystemZCopyPhysRegs()
34 : MachineFunctionPass(ID), TII(nullptr), MRI(nullptr) {
36 }
37
38 bool runOnMachineFunction(MachineFunction &MF) override;
39 void getAnalysisUsage(AnalysisUsage &AU) const override;
40
41private:
42
43 bool visitMBB(MachineBasicBlock &MBB);
44
45 const SystemZInstrInfo *TII;
47};
48
49char SystemZCopyPhysRegs::ID = 0;
50
51} // end anonymous namespace
52
53INITIALIZE_PASS(SystemZCopyPhysRegs, "systemz-copy-physregs",
54 "SystemZ Copy Physregs", false, false)
55
57 return new SystemZCopyPhysRegs();
58}
59
60void SystemZCopyPhysRegs::getAnalysisUsage(AnalysisUsage &AU) const {
61 AU.setPreservesCFG();
63}
64
65bool SystemZCopyPhysRegs::visitMBB(MachineBasicBlock &MBB) {
66 bool Modified = false;
67
68 // Certain special registers can only be copied from a subset of the
69 // default register class of the type. It is therefore necessary to create
70 // the target copy instructions before regalloc instead of in copyPhysReg().
72 MBBI != E; ) {
73 MachineInstr *MI = &*MBBI++;
74 if (!MI->isCopy())
75 continue;
76
77 DebugLoc DL = MI->getDebugLoc();
78 Register SrcReg = MI->getOperand(1).getReg();
79 Register DstReg = MI->getOperand(0).getReg();
80 if (DstReg.isVirtual() &&
81 (SrcReg == SystemZ::CC || SystemZ::AR32BitRegClass.contains(SrcReg))) {
82 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass);
83 if (SrcReg == SystemZ::CC)
84 BuildMI(MBB, MI, DL, TII->get(SystemZ::IPM), Tmp);
85 else
86 BuildMI(MBB, MI, DL, TII->get(SystemZ::EAR), Tmp).addReg(SrcReg);
87 MI->getOperand(1).setReg(Tmp);
88 Modified = true;
89 }
90 else if (SrcReg.isVirtual() &&
91 SystemZ::AR32BitRegClass.contains(DstReg)) {
92 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass);
93 MI->getOperand(0).setReg(Tmp);
94 BuildMI(MBB, MBBI, DL, TII->get(SystemZ::SAR), DstReg).addReg(Tmp);
95 Modified = true;
96 }
97 }
98
99 return Modified;
100}
101
102bool SystemZCopyPhysRegs::runOnMachineFunction(MachineFunction &F) {
103 TII = F.getSubtarget<SystemZSubtarget>().getInstrInfo();
104 MRI = &F.getRegInfo();
105
106 bool Modified = false;
107 for (auto &MBB : F)
108 Modified |= visitMBB(MBB);
109
110 return Modified;
111}
112
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define F(x, y, z)
Definition: MD5.cpp:55
const char LLVMTargetMachineRef TM
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:38
Represent the analysis usage information of a pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:269
A debug info location.
Definition: DebugLoc.h:33
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
Definition: MachineInstr.h:69
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
constexpr bool isVirtual() const
Return true if the specified register number is in the virtual register namespace.
Definition: Register.h:91
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
FunctionPass * createSystemZCopyPhysRegsPass(SystemZTargetMachine &TM)
void initializeSystemZCopyPhysRegsPass(PassRegistry &)