13#ifndef LLVM_EXECUTIONENGINE_JITLINK_AARCH64_H
14#define LLVM_EXECUTIONENGINE_JITLINK_AARCH64_H
342 constexpr uint32_t LoadStoreImm12Mask = 0x3b000000;
343 return (Instr & LoadStoreImm12Mask) == 0x39000000;
347 constexpr uint32_t TestAndBranchImm14Mask = 0x7e000000;
348 return (Instr & TestAndBranchImm14Mask) == 0x36000000;
352 constexpr uint32_t CondBranchImm19Mask = 0xfe000000;
353 return (Instr & CondBranchImm19Mask) == 0x54000000;
357 constexpr uint32_t CompAndBranchImm19Mask = 0x7e000000;
358 return (Instr & CompAndBranchImm19Mask) == 0x34000000;
368 constexpr uint32_t Vec128Mask = 0x04800000;
371 uint32_t ImplicitShift = Instr >> 30;
372 if (ImplicitShift == 0)
373 if ((Instr & Vec128Mask) == Vec128Mask)
376 return ImplicitShift;
384 constexpr uint32_t MoveWideImm16Mask = 0x5f9fffe0;
385 return (Instr & MoveWideImm16Mask) == 0x52800000;
394 uint32_t ImplicitShift = (Instr >> 21) & 0b11;
395 return ImplicitShift << 4;
403 using namespace support;
405 char *BlockWorkingMem =
B.getAlreadyMutableContent().data();
406 char *FixupPtr = BlockWorkingMem +
E.getOffset();
409 switch (
E.getKind()) {
411 uint64_t Value =
E.getTarget().getAddress().getValue() +
E.getAddend();
412 *(ulittle64_t *)FixupPtr =
Value;
416 uint64_t Value =
E.getTarget().getAddress().getValue() +
E.getAddend();
417 if (
Value > std::numeric_limits<uint32_t>::max())
419 *(ulittle32_t *)FixupPtr =
Value;
428 Value =
E.getTarget().getAddress() - FixupAddress +
E.getAddend();
430 Value = FixupAddress -
E.getTarget().getAddress() +
E.getAddend();
433 if (
Value < std::numeric_limits<int32_t>::min() ||
434 Value > std::numeric_limits<int32_t>::max())
436 *(little32_t *)FixupPtr =
Value;
438 *(little64_t *)FixupPtr =
Value;
443 "Branch-inst is not 32-bit aligned");
445 int64_t
Value =
E.getTarget().getAddress() - FixupAddress +
E.getAddend();
448 return make_error<JITLinkError>(
"BranchPCRel26 target is not 32-bit "
451 if (
Value < -(1 << 27) ||
Value > ((1 << 27) - 1))
454 uint32_t RawInstr = *(little32_t *)FixupPtr;
455 assert((RawInstr & 0x7fffffff) == 0x14000000 &&
456 "RawInstr isn't a B or BR immediate instruction");
458 uint32_t FixedInstr = RawInstr | Imm;
459 *(little32_t *)FixupPtr = FixedInstr;
464 (
E.getTarget().getAddress() +
E.getAddend()).getValue();
466 uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
468 "RawInstr isn't a MOVK/MOVZ instruction");
471 uint32_t Imm = (TargetOffset >> ImmShift) & 0xffff;
472 uint32_t FixedInstr = RawInstr | (Imm << 5);
473 *(ulittle32_t *)FixupPtr = FixedInstr;
477 assert((FixupAddress.
getValue() & 0x3) == 0 &&
"LDR is not 32-bit aligned");
478 assert(
E.getAddend() == 0 &&
"LDRLiteral19 with non-zero addend");
479 uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
480 assert(RawInstr == 0x58000010 &&
"RawInstr isn't a 64-bit LDR literal");
481 int64_t Delta =
E.getTarget().getAddress() - FixupAddress;
483 return make_error<JITLinkError>(
"LDR literal target is not 32-bit "
485 if (Delta < -(1 << 20) || Delta > ((1 << 20) - 1))
489 uint32_t FixedInstr = RawInstr | EncodedImm;
490 *(ulittle32_t *)FixupPtr = FixedInstr;
495 "Test and branch is not 32-bit aligned");
496 uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
498 "RawInstr is not a test and branch");
499 int64_t Delta =
E.getTarget().getAddress() +
E.getAddend() - FixupAddress;
501 return make_error<JITLinkError>(
502 "Test and branch literal target is not 32-bit aligned");
503 if (!isInt<16>(Delta))
506 uint32_t FixedInstr = RawInstr | EncodedImm;
507 *(ulittle32_t *)FixupPtr = FixedInstr;
512 "Conditional branch is not 32-bit aligned");
513 uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
515 "RawInstr is not a conditional branch");
516 int64_t Delta =
E.getTarget().getAddress() +
E.getAddend() - FixupAddress;
518 return make_error<JITLinkError>(
519 "Conditional branch literal target is not 32-bit "
521 if (!isInt<21>(Delta))
524 uint32_t FixedInstr = RawInstr | EncodedImm;
525 *(ulittle32_t *)FixupPtr = FixedInstr;
530 (
E.getTarget().getAddress().getValue() +
E.getAddend()) &
533 FixupAddress.
getValue() & ~static_cast<uint64_t>(4096 - 1);
535 int64_t PageDelta = TargetPage - PCPage;
536 if (!isInt<33>(PageDelta))
539 uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
540 assert((RawInstr & 0xffffffe0) == 0x90000000 &&
541 "RawInstr isn't an ADRP instruction");
544 uint32_t FixedInstr = RawInstr | (ImmLo << 29) | (ImmHi << 5);
545 *(ulittle32_t *)FixupPtr = FixedInstr;
550 (
E.getTarget().getAddress() +
E.getAddend()).getValue() & 0xfff;
552 uint32_t RawInstr = *(ulittle32_t *)FixupPtr;
555 if (TargetOffset & ((1 << ImmShift) - 1))
556 return make_error<JITLinkError>(
"PAGEOFF12 target is not aligned");
558 uint32_t EncodedImm = (TargetOffset >> ImmShift) << 10;
559 uint32_t FixedInstr = RawInstr | EncodedImm;
560 *(ulittle32_t *)FixupPtr = FixedInstr;
564 return make_error<JITLinkError>(
565 "In graph " +
G.getName() +
", section " +
B.getSection().getName() +
598 Symbol *InitialTarget =
nullptr,
603 B.addEdge(
Pointer64, 0, *InitialTarget, InitialAddend);
604 return G.addAnonymousSymbol(
B, 0, 8,
false,
false);
617 B.addEdge(
Page21, 0, PointerSymbol, 0);
629 return G.addAnonymousSymbol(
641 const char *BlockWorkingMem =
B->getContent().data();
642 const char *FixupPtr = BlockWorkingMem +
E.getOffset();
644 switch (
E.getKind()) {
656 "GOTPageOffset12/TLVPageOffset12 with non-zero addend");
657 assert((RawInstr & 0xfffffc00) == 0xf9400000 &&
658 "RawInstr isn't a 64-bit LDR immediate");
669 "Fell through switch, but no new kind to set");
671 dbgs() <<
" Fixing " <<
G.getEdgeKindName(
E.getKind()) <<
" edge at "
672 <<
B->getFixupAddress(
E) <<
" (" <<
B->getAddress() <<
" + "
673 <<
formatv(
"{0:x}",
E.getOffset()) <<
")\n";
675 E.setKind(KindToSet);
705 dbgs() <<
" Fixing " <<
G.getEdgeKindName(
E.getKind()) <<
" edge at "
706 <<
B->getFixupAddress(
E) <<
" (" <<
B->getAddress() <<
" + "
707 <<
formatv(
"{0:x}",
E.getOffset()) <<
")\n";
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
#define DEBUG_WITH_TYPE(TYPE, X)
DEBUG_WITH_TYPE macro - This macro should be used by passes to emit debug information.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Lightweight error class with error context and mandatory checking.
static ErrorSuccess success()
Create a success value.
StringRef - Represent a constant reference to a string, i.e.
Target - Wrapper for Target specific information.
LLVM Value Representation.
An Addressable with content and edges.
Represents fixups and constraints in the LinkGraph.
Represents an object file section.
A CRTP base for tables that are built on demand, e.g.
Symbol & getEntryForTarget(LinkGraph &G, Symbol &Target)
Return the constructed entry.
Global Offset Table Builder.
Symbol & createEntry(LinkGraph &G, Symbol &Target)
bool visitEdge(LinkGraph &G, Block *B, Edge &E)
static StringRef getSectionName()
Procedure Linkage Table Builder.
static StringRef getSectionName()
bool visitEdge(LinkGraph &G, Block *B, Edge &E)
PLTTableManager(GOTTableManager &GOT)
Symbol & createEntry(LinkGraph &G, Symbol &Target)
Section & getStubsSection(LinkGraph &G)
Represents an address in the executor process.
uint64_t getValue() const
const char NullPointerContent[PointerSize]
AArch64 null pointer content.
bool isCondBranchImm19(uint32_t Instr)
constexpr uint64_t PointerSize
aarch64 pointer size.
bool isMoveWideImm16(uint32_t Instr)
bool isCompAndBranchImm19(uint32_t Instr)
Error applyFixup(LinkGraph &G, Block &B, const Edge &E)
Apply fixup expression for edge to block content.
const char PointerJumpStubContent[12]
bool isLoadStoreImm12(uint32_t Instr)
const char * getEdgeKindName(Edge::Kind K)
Returns a string name for the given aarch64 edge.
Block & createPointerJumpStubBlock(LinkGraph &G, Section &StubSection, Symbol &PointerSymbol)
Create a jump stub block that jumps via the pointer at the given symbol.
Symbol & createAnonymousPointer(LinkGraph &G, Section &PointerSection, Symbol *InitialTarget=nullptr, uint64_t InitialAddend=0)
Creates a new pointer block in the given section and returns an Anonymous symobl pointing to it.
EdgeKind_aarch64
Represents aarch64 fixups and other aarch64-specific edge kinds.
@ LDRLiteral19
The signed 21-bit delta from the fixup to the target.
@ CondBranch19PCRel
A 19-bit PC-relative conditional branch.
@ RequestTLVPAndTransformToPageOffset12
A TLVP entry getter/constructor, transformed to PageOffset12.
@ RequestTLSDescEntryAndTransformToPageOffset12
A TLSDesc entry getter/constructor, transformed to PageOffset12.
@ Page21
The signed 21-bit delta from the fixup page to the page containing the target.
@ Branch26PCRel
A 26-bit PC-relative branch.
@ Pointer64
A plain 64-bit pointer value relocation.
@ Pointer32
A plain 32-bit pointer value relocation.
@ RequestTLVPAndTransformToPage21
A TLVP entry getter/constructor, transformed to Page21.
@ MoveWide16
A 16-bit slice of the target address (which slice depends on the instruction at the fixup location).
@ TestAndBranch14PCRel
A 14-bit PC-relative test and branch.
@ RequestGOTAndTransformToPage21
A GOT entry getter/constructor, transformed to Page21 pointing at the GOT entry for the original targ...
@ RequestGOTAndTransformToPageOffset12
A GOT entry getter/constructor, transformed to Pageoffset12 pointing at the GOT entry for the origina...
@ NegDelta32
A 32-bit negative delta.
@ NegDelta64
A 64-bit negative delta.
@ RequestGOTAndTransformToDelta32
A GOT entry getter/constructor, transformed to Delta32 pointing at the GOT entry for the original tar...
@ PageOffset12
The 12-bit (potentially shifted) offset of the target within its page.
@ RequestTLSDescEntryAndTransformToPage21
A TLSDesc entry getter/constructor, transformed to Page21.
bool isTestAndBranchImm14(uint32_t Instr)
unsigned getPageOffset12Shift(uint32_t Instr)
unsigned getMoveWide16Shift(uint32_t Instr)
Symbol & createAnonymousPointerJumpStub(LinkGraph &G, Section &StubSection, Symbol &PointerSymbol)
Create a jump stub that jumps via the pointer at the given symbol and an anonymous symbol pointing to...
Error makeTargetOutOfRangeError(const LinkGraph &G, const Block &B, const Edge &E)
Create an out of range error for the given edge in the given block.
This is an optimization pass for GlobalISel generic memory operations.
auto formatv(const char *Fmt, Ts &&... Vals) -> formatv_object< decltype(std::make_tuple(detail::build_format_adapter(std::forward< Ts >(Vals))...))>
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.