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13 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
14 #define LLVM_CODEGEN_MACHINEOPERAND_H
29 class MachineBasicBlock;
31 class MachineRegisterInfo;
32 class MCCFIInstruction;
34 class ModuleSlotTracker;
35 class TargetIntrinsicInfo;
36 class TargetRegisterInfo;
83 unsigned SubReg_TargetFlags : 12;
109 unsigned IsDeadOrKill : 1;
112 unsigned IsRenamable : 1;
131 unsigned IsUndef : 1;
142 unsigned IsInternalRead : 1;
147 unsigned IsEarlyClobber : 1;
151 unsigned IsDebug : 1;
167 union ContentsUnion {
169 MachineBasicBlock *
MBB;
171 const ConstantInt *CI;
179 ArrayRef<int> ShuffleMask;
183 MachineOperand *Prev;
184 MachineOperand *Next;
193 const GlobalValue *GV;
202 : OpKind(K), SubReg_TargetFlags(0) {
204 static_assert(
alignof(MachineOperand) <=
alignof(int64_t),
205 "MachineOperand shouldn't be more than 8 byte aligned");
206 static_assert(
sizeof(Contents) <= 2 *
sizeof(
void *),
207 "Contents should be at most two pointers");
208 static_assert(
sizeof(MachineOperand) <=
209 alignTo<
alignof(int64_t)>(2 *
sizeof(
unsigned) +
211 "MachineOperand too big. Should be Kind, SmallContents, "
212 "ParentMI, and Contents");
221 return isReg() ? 0 : SubReg_TargetFlags;
224 assert(!
isReg() &&
"Register operands can't have target flags");
225 SubReg_TargetFlags =
F;
226 assert(SubReg_TargetFlags ==
F &&
"Target flags out of range");
229 assert(!
isReg() &&
"Register operands can't have target flags");
230 SubReg_TargetFlags |=
F;
231 assert((SubReg_TargetFlags &
F) &&
"Target flags out of range");
303 bool ShouldPrintRegisterTies,
unsigned TiedOperandIdx,
360 assert(
isReg() &&
"This is not a register operand!");
361 return Register(SmallContents.RegNo);
365 assert(
isReg() &&
"Wrong MachineOperand accessor");
366 return SubReg_TargetFlags;
370 assert(
isReg() &&
"Wrong MachineOperand accessor");
375 assert(
isReg() &&
"Wrong MachineOperand accessor");
380 assert(
isReg() &&
"Wrong MachineOperand accessor");
385 assert(
isReg() &&
"Wrong MachineOperand accessor");
386 return IsDeadOrKill & IsDef;
390 assert(
isReg() &&
"Wrong MachineOperand accessor");
391 return IsDeadOrKill & !IsDef;
395 assert(
isReg() &&
"Wrong MachineOperand accessor");
431 assert(
isReg() &&
"Wrong MachineOperand accessor");
432 return IsInternalRead;
436 assert(
isReg() &&
"Wrong MachineOperand accessor");
437 return IsEarlyClobber;
441 assert(
isReg() &&
"Wrong MachineOperand accessor");
446 assert(
isReg() &&
"Wrong MachineOperand accessor");
458 assert(
isReg() &&
"Wrong MachineOperand accessor");
482 SubReg_TargetFlags = subReg;
483 assert(SubReg_TargetFlags == subReg &&
"SubReg out of range");
510 assert(
isReg() && !IsDef &&
"Wrong MachineOperand mutator");
511 assert((!Val || !
isDebug()) &&
"Marking a debug operation as kill");
516 assert(
isReg() && IsDef &&
"Wrong MachineOperand mutator");
529 IsInternalRead = Val;
533 assert(
isReg() && IsDef &&
"Wrong MachineOperand mutator");
534 IsEarlyClobber = Val;
538 assert(
isReg() && !IsDef &&
"Wrong MachineOperand mutator");
547 assert(
isImm() &&
"Wrong MachineOperand accessor");
548 return Contents.ImmVal;
562 assert(
isMBB() &&
"Wrong MachineOperand accessor");
568 "Wrong MachineOperand accessor");
569 return Contents.OffsetedInfo.Val.Index;
574 return Contents.OffsetedInfo.Val.GV;
579 return Contents.OffsetedInfo.Val.BA;
589 return Contents.CFIIndex;
594 return Contents.IntrinsicID;
599 return Contents.Pred;
604 return Contents.ShuffleMask;
612 "Wrong MachineOperand accessor");
613 return int64_t(
uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
614 SmallContents.OffsetLo;
619 return Contents.OffsetedInfo.Val.SymbolName;
628 assert(PhysReg < (1u << 30) &&
"Not a physical register");
629 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
641 return Contents.RegMask;
646 return (NumRegs + 31) / 32;
652 return Contents.RegMask;
666 Contents.ImmVal = immVal;
682 "Wrong MachineOperand mutator");
683 SmallContents.OffsetLo = unsigned(Offset);
684 Contents.OffsetedInfo.OffsetHi =
int(Offset >> 32);
689 "Wrong MachineOperand mutator");
690 Contents.OffsetedInfo.Val.Index = Idx;
709 Contents.RegMask = RegMaskPtr;
714 Contents.IntrinsicID = IID;
750 void ChangeToES(
const char *SymName,
unsigned TargetFlags = 0);
754 unsigned TargetFlags = 0);
764 unsigned TargetFlags = 0);
796 Op.Contents.CFP = CFP;
819 Op.SmallContents.RegNo =
Reg;
820 Op.Contents.Reg.Prev =
nullptr;
821 Op.Contents.Reg.Next =
nullptr;
826 unsigned TargetFlags = 0) {
829 Op.setTargetFlags(TargetFlags);
838 unsigned TargetFlags = 0) {
841 Op.setOffset(Offset);
842 Op.setTargetFlags(TargetFlags);
846 unsigned TargetFlags = 0) {
849 Op.setOffset(Offset);
850 Op.setTargetFlags(TargetFlags);
856 Op.setTargetFlags(TargetFlags);
860 unsigned TargetFlags = 0) {
862 Op.Contents.OffsetedInfo.Val.GV = GV;
863 Op.setOffset(Offset);
864 Op.setTargetFlags(TargetFlags);
868 unsigned TargetFlags = 0) {
870 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
872 Op.setTargetFlags(TargetFlags);
876 unsigned TargetFlags = 0) {
878 Op.Contents.OffsetedInfo.Val.BA = BA;
879 Op.setOffset(Offset);
880 Op.setTargetFlags(TargetFlags);
898 Op.Contents.RegMask =
Mask;
902 assert(
Mask &&
"Missing live-out register mask");
904 Op.Contents.RegMask =
Mask;
909 Op.Contents.MD = Meta;
914 unsigned TargetFlags = 0) {
916 Op.Contents.Sym = Sym;
918 Op.setTargetFlags(TargetFlags);
924 Op.Contents.CFIIndex = CFIIndex;
930 Op.Contents.IntrinsicID =
ID;
936 Op.Contents.Pred = Pred;
942 Op.Contents.ShuffleMask =
Mask;
952 void removeRegFromUses();
955 enum :
unsigned char {
969 bool isOnRegUseList()
const {
970 assert(
isReg() &&
"Can only add reg operand to use lists");
971 return Contents.Reg.Prev !=
nullptr;
978 MachineOperand::MO_Empty));
982 MachineOperand::MO_Tombstone));
989 MachineOperand::MO_Empty) ||
991 MachineOperand::MO_Tombstone))
992 return LHS.getType() ==
RHS.getType();
993 return LHS.isIdenticalTo(
RHS);
1004 hash_code
hash_value(
const MachineOperand &MO);
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
@ MO_BlockAddress
Address of a basic block.
void setRegMask(const uint32_t *RegMaskPtr)
Sets value of register mask operand referencing Mask.
@ MO_Immediate
Immediate operand.
This is an optimization pass for GlobalISel generic memory operations.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
void setIsInternalRead(bool Val=true)
bool isBlockAddress() const
isBlockAddress - Tests if this is a MO_BlockAddress operand.
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
@ MO_ShuffleMask
Other IR Constant for ISel (shuffle masks)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
const GlobalValue * getGlobal() const
@ MO_RegisterLiveOut
Mask of live-out registers.
static unsigned getHashValue(const MachineOperand &MO)
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
static void printIRSlotNumber(raw_ostream &OS, int Slot)
Print an IRSlotNumber.
Intrinsic::ID getIntrinsicID() const
void setIsKill(bool Val=true)
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
static bool isEqual(const MachineOperand &LHS, const MachineOperand &RHS)
const BlockAddress * getBlockAddress() const
Reg
All possible values of the reg field in the ModR/M byte.
void setImm(int64_t immVal)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void setMetadata(const MDNode *MD)
void addTargetFlag(unsigned F)
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
static MachineOperand CreateMetadata(const MDNode *Meta)
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
@ MO_CFIIndex
MCCFIInstruction index.
const char * getTargetIndexName() const
getTargetIndexName - If this MachineOperand is a TargetIndex that has a name, attempt to get the name...
bool isCImm() const
isCImm - Test if this is a MO_CImmediate operand.
void setPredicate(unsigned Predicate)
void ChangeToTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
Replace this operand with a target index.
void setIsUse(bool Val=true)
void ChangeToFrameIndex(int Idx, unsigned TargetFlags=0)
Replace this operand with a frame index.
bool isFI() const
isFI - Tests if this is a MO_FrameIndex operand.
hash_code hash_value(const APFloat &Arg)
See friend declarations above.
int64_t getOffset() const
Return the offset from the symbol in this operand.
Manage lifetime of a slot tracker for printing IR.
unsigned const TargetRegisterInfo * TRI
void setCImm(const ConstantInt *CI)
MCSymbol * getMCSymbol() const
@ MO_Register
Register operand.
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
TargetIntrinsicInfo - Interface to description of machine instruction set.
bool clobbersPhysReg(MCRegister PhysReg) const
clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
This is the shared class of boolean and integer constants.
An information struct used to provide DenseMap with the various necessary components for a given valu...
friend hash_code hash_value(const MachineOperand &MO)
MachineOperand hash_value overload.
bool isValidExcessOperand() const
Return true if this operand can validly be appended to an arbitrary operand list.
static MachineOperand CreateImm(int64_t Val)
void ChangeToRegister(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
ChangeToRegister - Replace this operand with a new register operand of the specified value.
@ MO_GlobalAddress
Address of a global value.
static unsigned getRegMaskSize(unsigned NumRegs)
Returns number of elements needed for a regmask array.
Clang compiles this i1 i64 store i64 i64 store i64 i64 store i64 i64 store i64 align Which gets codegen d xmm0 movaps rbp movaps rbp movaps rbp movaps rbp rbp rbp rbp rbp It would be better to have movq s of instead of the movaps s LLVM produces ret int
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
void setSubReg(unsigned subReg)
@ MO_FrameIndex
Abstract Stack Frame Index.
bool isMBB() const
isMBB - Tests if this is a MO_MachineBasicBlock operand.
void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags=0)
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value.
MachineOperand class - Representation of each machine instruction operand.
const MachineInstr * getParent() const
This class implements an extremely fast bulk output stream that can only output to a stream.
ConstantFP - Floating Point Values [float, double].
void ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
static MachineOperand CreateFI(int Idx)
void setTargetFlags(unsigned F)
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
bool isRegLiveOut() const
isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
static void printOperandOffset(raw_ostream &OS, int64_t Offset)
Print the offset with explicit +/- signs.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
const MDNode * getMetadata() const
static MachineOperand CreateShuffleMask(ArrayRef< int > Mask)
@ MO_Metadata
Metadata reference (for debug info)
Predicate
Predicate - These are "(BI << 5) | BO" for various predicates.
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
void ChangeToFPImmediate(const ConstantFP *FPImm, unsigned TargetFlags=0)
ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value.
void setIsDead(bool Val=true)
unsigned getTargetFlags() const
void substVirtReg(Register Reg, unsigned SubIdx, const TargetRegisterInfo &)
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const ConstantInt * getCImm() const
Representation of each machine instruction.
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
static MachineOperand getTombstoneKey()
@ MO_Predicate
Generic predicate for ISel.
@ MO_MCSymbol
MCSymbol reference (for debug/eh info)
void setIntrinsicID(Intrinsic::ID IID)
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const ConstantFP * getFPImm() const
unsigned getPredicate() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool isEarlyClobber() const
ArrayRef< int > getShuffleMask() const
@ MO_TargetIndex
Target-dependent index+offset operand.
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
bool isRegMask() const
isRegMask - Tests if this is a MO_RegisterMask operand.
@ MO_FPImmediate
Floating-point immediate operand.
Register getReg() const
getReg - Returns the register number.
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
void setIsDebug(bool Val=true)
bool isTargetIndex() const
isTargetIndex - Tests if this is a MO_TargetIndex operand.
@ MO_JumpTableIndex
Address of indexed Jump Table for switch.
bool isShuffleMask() const
The address of a basic block.
@ MO_CImmediate
Immediate >64bit operand.
void setIsDef(bool Val=true)
Change a def to a use, or a use to a def.
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
MachineBasicBlock * getMBB() const
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
StringRef - Represent a constant reference to a string, i.e.
void ChangeToES(const char *SymName, unsigned TargetFlags=0)
ChangeToES - Replace this operand with a new external symbol operand.
bool isIntrinsicID() const
void setIsEarlyClobber(bool Val=true)
void setIsUndef(bool Val=true)
void setIsRenamable(bool Val=true)
@ MO_MachineBasicBlock
MachineBasicBlock reference.
@ MO_IntrinsicID
Intrinsic ID for ISel.
static MachineOperand CreateCImm(const ConstantInt *CI)
Wrapper class representing virtual and physical registers.
unsigned getSubReg() const
static MachineOperand getEmptyKey()
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
constexpr char SymbolName[]
Key for Kernel::Metadata::mSymbolName.
void ChangeToGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
ChangeToGA - Replace this operand with a new global address operand.
bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register.
bool isMetadata() const
isMetadata - Tests if this is a MO_Metadata operand.
@ MO_ExternalSymbol
Name of external global symbol.
void setFPImm(const ConstantFP *CFP)
unsigned getCFIIndex() const
void setImplicit(bool Val=true)
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool isFPImm() const
isFPImm - Tests if this is a MO_FPImmediate operand.
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
const char * getSymbolName() const
void setReg(Register Reg)
Change the register this operand corresponds to.
void clearParent()
clearParent - Reset the parent pointer.
void setMBB(MachineBasicBlock *MBB)
bool isInternalRead() const
const uint32_t * getRegLiveOut() const
getRegLiveOut - Returns a bit mask of live-out registers.
void substPhysReg(MCRegister Reg, const TargetRegisterInfo &)
substPhysReg - Substitute the current register with the physical register Reg, taking any existing Su...
@ MO_RegisterMask
Mask of preserved registers.
static MachineOperand CreatePredicate(unsigned Pred)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
Wrapper class representing physical registers. Should be passed by value.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
An opaque object representing a hash code.
@ MO_ConstantPoolIndex
Address of indexed Constant in Constant Pool.
void setOffset(int64_t Offset)