LLVM 17.0.0git
|
Classes | |
class | Inst |
Typedefs | |
using | InstSeq = SmallVector< Inst, 8 > |
Enumerations | |
enum | OpndKind { RegImm , Imm , RegReg , RegX0 } |
Functions | |
InstSeq | generateInstSeq (int64_t Val, const FeatureBitset &ActiveFeatures) |
int | getIntMatCost (const APInt &Val, unsigned Size, const FeatureBitset &ActiveFeatures, bool CompressionCost) |
using llvm::RISCVMatInt::InstSeq = typedef SmallVector<Inst, 8> |
Definition at line 42 of file RISCVMatInt.h.
Enumerator | |
---|---|
RegImm | |
Imm | |
RegReg | |
RegX0 |
Definition at line 21 of file RISCVMatInt.h.
InstSeq llvm::RISCVMatInt::generateInstSeq | ( | int64_t | Val, |
const FeatureBitset & | ActiveFeatures | ||
) |
Definition at line 175 of file RISCVMatInt.cpp.
References assert(), llvm::SmallVectorImpl< T >::clear(), llvm::countl_zero(), llvm::countr_zero(), llvm::SmallVectorImpl< T >::emplace_back(), llvm::SmallVectorBase< Size_T >::empty(), extractRotateInfo(), generateInstSeqImpl(), llvm::Hi, llvm::Hi_32(), llvm::Lo, llvm::Lo_32(), llvm::popcount(), and llvm::SmallVectorBase< Size_T >::size().
Referenced by getIntMatCost(), lowerConstant(), llvm::RISCVInstrInfo::movImm(), selectConstantAddr(), selectImm(), and llvm::RISCVTargetLowering::shouldConvertConstantLoadToIntImm().
int llvm::RISCVMatInt::getIntMatCost | ( | const APInt & | Val, |
unsigned | Size, | ||
const FeatureBitset & | ActiveFeatures, | ||
bool | CompressionCost | ||
) |
Definition at line 374 of file RISCVMatInt.cpp.
References llvm::APInt::ashr(), generateInstSeq(), getInstSeqCost(), llvm::APInt::getSExtValue(), HasRVC, llvm::APInt::sextOrTrunc(), and Size.
Referenced by llvm::RISCVTTIImpl::getIntImmCost(), llvm::RISCVTargetLowering::isDesirableToCommuteWithShift(), llvm::RISCVTargetLowering::isFPImmLegal(), and llvm::RISCVTargetLowering::PerformDAGCombine().