llvm::ARMRegisterInfo Struct Reference

#include "Target/ARM/ARMRegisterInfo.h"

Inheritance diagram for llvm::ARMRegisterInfo:

Public Member Functions
virtual void	anchor ()
	ARMRegisterInfo ()
Public Member Functions inherited from llvm::ARMBaseRegisterInfo
const MCPhysReg *	getCalleeSavedRegs (const MachineFunction *MF) const override
	Code Generation virtual methods...
const MCPhysReg *	getCalleeSavedRegsViaCopy (const MachineFunction *MF) const
const uint32_t *	getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
const uint32_t *	getNoPreservedMask () const override
const uint32_t *	getTLSCallPreservedMask (const MachineFunction &MF) const
const uint32_t *	getSjLjDispatchPreservedMask (const MachineFunction &MF) const
const uint32_t *	getThisReturnPreservedMask (const MachineFunction &MF, CallingConv::ID) const
	getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i32 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e.
ArrayRef< MCPhysReg >	getIntraCallClobberedRegs (const MachineFunction *MF) const override
BitVector	getReservedRegs (const MachineFunction &MF) const override
bool	isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override
bool	isInlineAsmReadOnlyReg (const MachineFunction &MF, MCRegister PhysReg) const override
const TargetRegisterClass *	getPointerRegClass (unsigned Kind=0) const override
const TargetRegisterClass *	getCrossCopyRegClass (const TargetRegisterClass *RC) const override
const TargetRegisterClass *	getLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &MF) const override
unsigned	getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
bool	getRegAllocationHints (Register VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override
void	updateRegAllocHint (Register Reg, Register NewReg, MachineFunction &MF) const override
bool	hasBasePointer (const MachineFunction &MF) const
bool	canRealignStack (const MachineFunction &MF) const override
int64_t	getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const override
bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
	needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.
Register	materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override
	materializeFrameBaseRegister - Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block.
void	resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override
bool	isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override
bool	cannotEliminateFrame (const MachineFunction &MF) const
Register	getFrameRegister (const MachineFunction &MF) const override
Register	getBaseRegister () const
virtual void	emitLoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, Register DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, Register PredReg=Register(), unsigned MIFlags=MachineInstr::NoFlags) const
	emitLoadConstPool - Emits a load from constpool to materialize the specified immediate.
bool	requiresRegisterScavenging (const MachineFunction &MF) const override
	Code Generation virtual methods...
bool	requiresFrameIndexScavenging (const MachineFunction &MF) const override
bool	requiresVirtualBaseRegisters (const MachineFunction &MF) const override
bool	eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool	shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
	SrcRC and DstRC will be morphed into NewRC if this returns true.
int	getSEHRegNum (unsigned i) const

Additional Inherited Members
Protected Member Functions inherited from llvm::ARMBaseRegisterInfo
	ARMBaseRegisterInfo ()
Protected Attributes inherited from llvm::ARMBaseRegisterInfo
unsigned	BasePtr = ARM::R6
	BasePtr - ARM physical register used as a base ptr in complex stack frames.

Detailed Description

Definition at line 20 of file ARMRegisterInfo.h.

Constructor & Destructor Documentation

ARMRegisterInfo()

ARMRegisterInfo::ARMRegisterInfo ( )

default

Member Function Documentation

anchor()

void ARMRegisterInfo::anchor ( )

virtual

Definition at line 16 of file ARMRegisterInfo.cpp.

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The documentation for this struct was generated from the following files:

• lib/Target/ARM/ARMRegisterInfo.h
• lib/Target/ARM/ARMRegisterInfo.cpp