LLVM  10.0.0svn
MachineInstrBuilder.h
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1 //===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file exposes a function named BuildMI, which is useful for dramatically
10 // simplifying how MachineInstr's are created. It allows use of code like this:
11 //
12 // M = BuildMI(MBB, MI, DL, TII.get(X86::ADD8rr), Dst)
13 // .addReg(argVal1)
14 // .addReg(argVal2);
15 //
16 //===----------------------------------------------------------------------===//
17 
18 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
19 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20 
21 #include "llvm/ADT/ArrayRef.h"
29 #include "llvm/IR/InstrTypes.h"
30 #include "llvm/IR/Intrinsics.h"
32 #include <cassert>
33 #include <cstdint>
34 #include <utility>
35 
36 namespace llvm {
37 
38 class MCInstrDesc;
39 class MDNode;
40 
41 namespace RegState {
42 
43  enum {
44  Define = 0x2,
45  Implicit = 0x4,
46  Kill = 0x8,
47  Dead = 0x10,
48  Undef = 0x20,
49  EarlyClobber = 0x40,
50  Debug = 0x80,
51  InternalRead = 0x100,
52  Renamable = 0x200,
56  };
57 
58 } // end namespace RegState
59 
61  MachineFunction *MF = nullptr;
62  MachineInstr *MI = nullptr;
63 
64 public:
65  MachineInstrBuilder() = default;
66 
67  /// Create a MachineInstrBuilder for manipulating an existing instruction.
68  /// F must be the machine function that was used to allocate I.
71  : MF(&F), MI(&*I) {}
72 
73  /// Allow automatic conversion to the machine instruction we are working on.
74  operator MachineInstr*() const { return MI; }
75  MachineInstr *operator->() const { return MI; }
76  operator MachineBasicBlock::iterator() const { return MI; }
77 
78  /// If conversion operators fail, use this method to get the MachineInstr
79  /// explicitly.
80  MachineInstr *getInstr() const { return MI; }
81 
82  /// Get the register for the operand index.
83  /// The operand at the index should be a register (asserted by
84  /// MachineOperand).
85  Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); }
86 
87  /// Add a new virtual register operand.
88  const MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
89  unsigned SubReg = 0) const {
90  assert((flags & 0x1) == 0 &&
91  "Passing in 'true' to addReg is forbidden! Use enums instead.");
93  flags & RegState::Define,
94  flags & RegState::Implicit,
95  flags & RegState::Kill,
96  flags & RegState::Dead,
97  flags & RegState::Undef,
98  flags & RegState::EarlyClobber,
99  SubReg,
100  flags & RegState::Debug,
101  flags & RegState::InternalRead,
102  flags & RegState::Renamable));
103  return *this;
104  }
105 
106  /// Add a virtual register definition operand.
107  const MachineInstrBuilder &addDef(unsigned RegNo, unsigned Flags = 0,
108  unsigned SubReg = 0) const {
109  return addReg(RegNo, Flags | RegState::Define, SubReg);
110  }
111 
112  /// Add a virtual register use operand. It is an error for Flags to contain
113  /// `RegState::Define` when calling this function.
114  const MachineInstrBuilder &addUse(unsigned RegNo, unsigned Flags = 0,
115  unsigned SubReg = 0) const {
116  assert(!(Flags & RegState::Define) &&
117  "Misleading addUse defines register, use addReg instead.");
118  return addReg(RegNo, Flags, SubReg);
119  }
120 
121  /// Add a new immediate operand.
122  const MachineInstrBuilder &addImm(int64_t Val) const {
123  MI->addOperand(*MF, MachineOperand::CreateImm(Val));
124  return *this;
125  }
126 
127  const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
128  MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
129  return *this;
130  }
131 
132  const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
134  return *this;
135  }
136 
138  unsigned char TargetFlags = 0) const {
139  MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
140  return *this;
141  }
142 
143  const MachineInstrBuilder &addFrameIndex(int Idx) const {
144  MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
145  return *this;
146  }
147 
149  int Offset = 0,
150  unsigned char TargetFlags = 0) const {
151  MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
152  return *this;
153  }
154 
155  const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
156  unsigned char TargetFlags = 0) const {
158  TargetFlags));
159  return *this;
160  }
161 
163  unsigned char TargetFlags = 0) const {
164  MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
165  return *this;
166  }
167 
169  int64_t Offset = 0,
170  unsigned char TargetFlags = 0) const {
171  MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
172  return *this;
173  }
174 
175  const MachineInstrBuilder &addExternalSymbol(const char *FnName,
176  unsigned char TargetFlags = 0) const {
177  MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
178  return *this;
179  }
180 
182  int64_t Offset = 0,
183  unsigned char TargetFlags = 0) const {
184  MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
185  return *this;
186  }
187 
190  return *this;
191  }
192 
194  MI->addMemOperand(*MF, MMO);
195  return *this;
196  }
197 
198  const MachineInstrBuilder &
200  MI->setMemRefs(*MF, MMOs);
201  return *this;
202  }
203 
204  const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const {
205  MI->cloneMemRefs(*MF, OtherMI);
206  return *this;
207  }
208 
209  const MachineInstrBuilder &
211  MI->cloneMergedMemRefs(*MF, OtherMIs);
212  return *this;
213  }
214 
215  const MachineInstrBuilder &add(const MachineOperand &MO) const {
216  MI->addOperand(*MF, MO);
217  return *this;
218  }
219 
221  for (const MachineOperand &MO : MOs) {
222  MI->addOperand(*MF, MO);
223  }
224  return *this;
225  }
226 
227  const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
229  assert((MI->isDebugValue() ? static_cast<bool>(MI->getDebugVariable())
230  : true) &&
231  "first MDNode argument of a DBG_VALUE not a variable");
232  assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
233  : true) &&
234  "first MDNode argument of a DBG_LABEL not a label");
235  return *this;
236  }
237 
238  const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
239  MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
240  return *this;
241  }
242 
245  return *this;
246  }
247 
250  return *this;
251  }
252 
254  unsigned char TargetFlags = 0) const {
255  MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags));
256  return *this;
257  }
258 
259  const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
260  MI->setFlags(Flags);
261  return *this;
262  }
263 
265  MI->setFlag(Flag);
266  return *this;
267  }
268 
269  // Add a displacement from an existing MachineOperand with an added offset.
270  const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
271  unsigned char TargetFlags = 0) const {
272  // If caller specifies new TargetFlags then use it, otherwise the
273  // default behavior is to copy the target flags from the existing
274  // MachineOperand. This means if the caller wants to clear the
275  // target flags it needs to do so explicitly.
276  if (0 == TargetFlags)
277  TargetFlags = Disp.getTargetFlags();
278 
279  switch (Disp.getType()) {
280  default:
281  llvm_unreachable("Unhandled operand type in addDisp()");
283  return addImm(Disp.getImm() + off);
285  return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
286  TargetFlags);
288  return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
289  TargetFlags);
291  return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off,
292  TargetFlags);
293  }
294  }
295 
296  /// Copy all the implicit operands from OtherMI onto this one.
297  const MachineInstrBuilder &
298  copyImplicitOps(const MachineInstr &OtherMI) const {
299  MI->copyImplicitOps(*MF, OtherMI);
300  return *this;
301  }
302 
304  const TargetRegisterInfo &TRI,
305  const RegisterBankInfo &RBI) const {
306  return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
307  }
308 };
309 
310 /// Builder interface. Specify how to create the initial instruction itself.
312  const MCInstrDesc &MCID) {
313  return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
314 }
315 
316 /// This version of the builder sets up the first operand as a
317 /// destination virtual register.
319  const MCInstrDesc &MCID, unsigned DestReg) {
320  return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL))
321  .addReg(DestReg, RegState::Define);
322 }
323 
324 /// This version of the builder inserts the newly-built instruction before
325 /// the given position in the given MachineBasicBlock, and sets up the first
326 /// operand as a destination virtual register.
329  const DebugLoc &DL, const MCInstrDesc &MCID,
330  unsigned DestReg) {
331  MachineFunction &MF = *BB.getParent();
332  MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
333  BB.insert(I, MI);
334  return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
335 }
336 
337 /// This version of the builder inserts the newly-built instruction before
338 /// the given position in the given MachineBasicBlock, and sets up the first
339 /// operand as a destination virtual register.
340 ///
341 /// If \c I is inside a bundle, then the newly inserted \a MachineInstr is
342 /// added to the same bundle.
345  const DebugLoc &DL, const MCInstrDesc &MCID,
346  unsigned DestReg) {
347  MachineFunction &MF = *BB.getParent();
348  MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
349  BB.insert(I, MI);
350  return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
351 }
352 
354  const DebugLoc &DL, const MCInstrDesc &MCID,
355  unsigned DestReg) {
356  // Calling the overload for instr_iterator is always correct. However, the
357  // definition is not available in headers, so inline the check.
358  if (I.isInsideBundle())
359  return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg);
360  return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg);
361 }
362 
364  const DebugLoc &DL, const MCInstrDesc &MCID,
365  unsigned DestReg) {
366  return BuildMI(BB, *I, DL, MCID, DestReg);
367 }
368 
369 /// This version of the builder inserts the newly-built instruction before the
370 /// given position in the given MachineBasicBlock, and does NOT take a
371 /// destination register.
374  const DebugLoc &DL,
375  const MCInstrDesc &MCID) {
376  MachineFunction &MF = *BB.getParent();
377  MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
378  BB.insert(I, MI);
379  return MachineInstrBuilder(MF, MI);
380 }
381 
384  const DebugLoc &DL,
385  const MCInstrDesc &MCID) {
386  MachineFunction &MF = *BB.getParent();
387  MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
388  BB.insert(I, MI);
389  return MachineInstrBuilder(MF, MI);
390 }
391 
393  const DebugLoc &DL,
394  const MCInstrDesc &MCID) {
395  // Calling the overload for instr_iterator is always correct. However, the
396  // definition is not available in headers, so inline the check.
397  if (I.isInsideBundle())
398  return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID);
399  return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID);
400 }
401 
403  const DebugLoc &DL,
404  const MCInstrDesc &MCID) {
405  return BuildMI(BB, *I, DL, MCID);
406 }
407 
408 /// This version of the builder inserts the newly-built instruction at the end
409 /// of the given MachineBasicBlock, and does NOT take a destination register.
411  const MCInstrDesc &MCID) {
412  return BuildMI(*BB, BB->end(), DL, MCID);
413 }
414 
415 /// This version of the builder inserts the newly-built instruction at the
416 /// end of the given MachineBasicBlock, and sets up the first operand as a
417 /// destination virtual register.
419  const MCInstrDesc &MCID, unsigned DestReg) {
420  return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
421 }
422 
423 /// This version of the builder builds a DBG_VALUE intrinsic
424 /// for either a value in a register or a register-indirect
425 /// address. The convention is that a DBG_VALUE is indirect iff the
426 /// second operand is an immediate.
428  const MCInstrDesc &MCID, bool IsIndirect,
429  unsigned Reg, const MDNode *Variable,
430  const MDNode *Expr);
431 
432 /// This version of the builder builds a DBG_VALUE intrinsic
433 /// for a MachineOperand.
435  const MCInstrDesc &MCID, bool IsIndirect,
436  MachineOperand &MO, const MDNode *Variable,
437  const MDNode *Expr);
438 
439 /// This version of the builder builds a DBG_VALUE intrinsic
440 /// for either a value in a register or a register-indirect
441 /// address and inserts it at position I.
444  const MCInstrDesc &MCID, bool IsIndirect,
445  unsigned Reg, const MDNode *Variable,
446  const MDNode *Expr);
447 
448 /// This version of the builder builds a DBG_VALUE intrinsic
449 /// for a machine operand and inserts it at position I.
452  const MCInstrDesc &MCID, bool IsIndirect,
453  MachineOperand &MO, const MDNode *Variable,
454  const MDNode *Expr);
455 
456 /// Clone a DBG_VALUE whose value has been spilled to FrameIndex.
459  const MachineInstr &Orig, int FrameIndex);
460 
461 /// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
462 /// modifying an instruction in place while iterating over a basic block.
463 void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex);
464 
465 inline unsigned getDefRegState(bool B) {
466  return B ? RegState::Define : 0;
467 }
468 inline unsigned getImplRegState(bool B) {
469  return B ? RegState::Implicit : 0;
470 }
471 inline unsigned getKillRegState(bool B) {
472  return B ? RegState::Kill : 0;
473 }
474 inline unsigned getDeadRegState(bool B) {
475  return B ? RegState::Dead : 0;
476 }
477 inline unsigned getUndefRegState(bool B) {
478  return B ? RegState::Undef : 0;
479 }
480 inline unsigned getInternalReadRegState(bool B) {
481  return B ? RegState::InternalRead : 0;
482 }
483 inline unsigned getDebugRegState(bool B) {
484  return B ? RegState::Debug : 0;
485 }
486 inline unsigned getRenamableRegState(bool B) {
487  return B ? RegState::Renamable : 0;
488 }
489 
490 /// Get all register state flags from machine operand \p RegOp.
491 inline unsigned getRegState(const MachineOperand &RegOp) {
492  assert(RegOp.isReg() && "Not a register operand");
493  return getDefRegState(RegOp.isDef()) |
494  getImplRegState(RegOp.isImplicit()) |
495  getKillRegState(RegOp.isKill()) |
496  getDeadRegState(RegOp.isDead()) |
497  getUndefRegState(RegOp.isUndef()) |
499  getDebugRegState(RegOp.isDebug()) |
502  RegOp.isRenamable());
503 }
504 
505 /// Helper class for constructing bundles of MachineInstrs.
506 ///
507 /// MIBundleBuilder can create a bundle from scratch by inserting new
508 /// MachineInstrs one at a time, or it can create a bundle from a sequence of
509 /// existing MachineInstrs in a basic block.
511  MachineBasicBlock &MBB;
514 
515 public:
516  /// Create an MIBundleBuilder that inserts instructions into a new bundle in
517  /// BB above the bundle or instruction at Pos.
519  : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
520 
521  /// Create a bundle from the sequence of instructions between B and E.
524  : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
525  assert(B != E && "No instructions to bundle");
526  ++B;
527  while (B != E) {
528  MachineInstr &MI = *B;
529  ++B;
530  MI.bundleWithPred();
531  }
532  }
533 
534  /// Create an MIBundleBuilder representing an existing instruction or bundle
535  /// that has MI as its head.
537  : MBB(*MI->getParent()), Begin(MI),
538  End(getBundleEnd(MI->getIterator())) {}
539 
540  /// Return a reference to the basic block containing this bundle.
541  MachineBasicBlock &getMBB() const { return MBB; }
542 
543  /// Return true if no instructions have been inserted in this bundle yet.
544  /// Empty bundles aren't representable in a MachineBasicBlock.
545  bool empty() const { return Begin == End; }
546 
547  /// Return an iterator to the first bundled instruction.
548  MachineBasicBlock::instr_iterator begin() const { return Begin; }
549 
550  /// Return an iterator beyond the last bundled instruction.
551  MachineBasicBlock::instr_iterator end() const { return End; }
552 
553  /// Insert MI into this bundle before I which must point to an instruction in
554  /// the bundle, or end().
556  MachineInstr *MI) {
557  MBB.insert(I, MI);
558  if (I == Begin) {
559  if (!empty())
560  MI->bundleWithSucc();
561  Begin = MI->getIterator();
562  return *this;
563  }
564  if (I == End) {
565  MI->bundleWithPred();
566  return *this;
567  }
568  // MI was inserted in the middle of the bundle, so its neighbors' flags are
569  // already fine. Update MI's bundle flags manually.
572  return *this;
573  }
574 
575  /// Insert MI into MBB by prepending it to the instructions in the bundle.
576  /// MI will become the first instruction in the bundle.
578  return insert(begin(), MI);
579  }
580 
581  /// Insert MI into MBB by appending it to the instructions in the bundle.
582  /// MI will become the last instruction in the bundle.
584  return insert(end(), MI);
585  }
586 };
587 
588 } // end namespace llvm
589 
590 #endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H
unsigned getTargetFlags() const
MachineBasicBlock & getMBB() const
Return a reference to the basic block containing this bundle.
const MachineInstrBuilder & setMemRefs(ArrayRef< MachineMemOperand *> MMOs) const
void bundleWithPred()
Bundle this instruction with its predecessor.
const MachineInstrBuilder & addMetadata(const MDNode *MD) const
const MachineInstrBuilder & add(const MachineOperand &MO) const
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:233
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
Create an MIBundleBuilder that inserts instructions into a new bundle in BB above the bundle or instr...
bool isDebugLabel() const
static MachineOperand CreateCImm(const ConstantInt *CI)
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:224
unsigned getRegState(const MachineOperand &RegOp)
Get all register state flags from machine operand RegOp.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned char TargetFlags=0)
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
Register getReg(unsigned Idx) const
Get the register for the operand index.
const MachineInstrBuilder & addIntrinsicID(Intrinsic::ID ID) const
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
static MachineOperand CreateJTI(unsigned Idx, unsigned char TargetFlags=0)
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:164
unsigned Reg
const MachineInstrBuilder & addPredicate(CmpInst::Predicate Pred) const
unsigned getInternalReadRegState(bool B)
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
Metadata node.
Definition: Metadata.h:863
F(f)
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned char TargetFlags=0) const
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, const DebugLoc &DL, bool NoImp=false)
CreateMachineInstr - Allocate a new MachineInstr.
const MachineInstrBuilder & addTargetIndex(unsigned Idx, int64_t Offset=0, unsigned char TargetFlags=0) const
bool isInternalRead() const
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B, MachineBasicBlock::iterator E)
Create a bundle from the sequence of instructions between B and E.
The address of a basic block.
Definition: Constants.h:839
Holds all the information related to register banks.
A description of a memory reference used in the backend.
MachineInstr * buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I, const MachineInstr &Orig, int FrameIndex)
Clone a DBG_VALUE whose value has been spilled to FrameIndex.
MachineInstrBuilder(MachineFunction &F, MachineInstr *I)
Create a MachineInstrBuilder for manipulating an existing instruction.
const HexagonInstrInfo * TII
const MachineInstrBuilder & addUse(unsigned RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
unsigned SubReg
void bundleWithSucc()
Bundle this instruction with its successor.
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
void copyImplicitOps(MachineFunction &MF, const MachineInstr &MI)
Copy implicit register operands from specified instruction to this instruction.
MIBundleBuilder & prepend(MachineInstr *MI)
Insert MI into MBB by prepending it to the instructions in the bundle.
const MachineInstrBuilder & addFPImm(const ConstantFP *Val) const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
void addMemOperand(MachineFunction &MF, MachineMemOperand *MO)
Add a MachineMemOperand to the machine instruction.
static MachineOperand CreatePredicate(unsigned Pred)
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
Definition: MachineInstr.h:352
unsigned getUndefRegState(bool B)
unsigned getKillRegState(bool B)
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:117
unsigned getDebugRegState(bool B)
TargetInstrInfo - Interface to description of machine instruction set.
unsigned getDeadRegState(bool B)
unsigned getDefRegState(bool B)
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Address of a global value.
MachineInstrBundleIterator< MachineInstr > iterator
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
const MachineInstrBuilder & addBlockAddress(const BlockAddress *BA, int64_t Offset=0, unsigned char TargetFlags=0) const
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned char TargetFlags=0)
const MachineInstrBuilder & addCImm(const ConstantInt *Val) const
static MachineOperand CreateFPImm(const ConstantFP *CFP)
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
const GlobalValue * getGlobal() const
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:263
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned char TargetFlags=0)
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:302
Address of a basic block.
MachineBasicBlock::instr_iterator begin() const
Return an iterator to the first bundled instruction.
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:732
const DILabel * getDebugLabel() const
Return the debug label referenced by this DBG_LABEL instruction.
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)
self_iterator getIterator()
Definition: ilist_node.h:81
const MachineInstrBuilder & addSym(MCSymbol *Sym, unsigned char TargetFlags=0) const
const MachineInstrBuilder & addFrameIndex(int Idx) const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MachineInstrBuilder & add(ArrayRef< MachineOperand > MOs) const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr bool empty(const T &RangeOrContainer)
Test whether RangeOrContainer is empty. Similar to C++17 std::empty.
Definition: STLExtras.h:209
void cloneMemRefs(MachineFunction &MF, const MachineInstr &MI)
Clone another MachineInstr&#39;s memory reference descriptor list and replace ours with it...
static MachineOperand CreateMetadata(const MDNode *Meta)
This is the shared class of boolean and integer constants.
Definition: Constants.h:83
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
unsigned getRenamableRegState(bool B)
MachineBasicBlock::instr_iterator end() const
Return an iterator beyond the last bundled instruction.
void setFlags(unsigned flags)
Definition: MachineInstr.h:306
MachineInstr * operator->() const
bool isDebugValue() const
MachineOperand class - Representation of each machine instruction operand.
bool empty() const
Return true if no instructions have been inserted in this bundle yet.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
const MachineInstrBuilder & addConstantPoolIndex(unsigned Idx, int Offset=0, unsigned char TargetFlags=0) const
const MachineInstrBuilder & addDisp(const MachineOperand &Disp, int64_t off, unsigned char TargetFlags=0) const
void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex)
Update a DBG_VALUE whose value has been spilled to FrameIndex.
bool constrainSelectedInstRegOperands(MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands...
Definition: Utils.cpp:113
MachineInstr * getInstr() const
If conversion operators fail, use this method to get the MachineInstr explicitly. ...
MIBundleBuilder & insert(MachineBasicBlock::instr_iterator I, MachineInstr *MI)
Insert MI into this bundle before I which must point to an instruction in the bundle, or end().
int64_t getImm() const
static MachineOperand CreateES(const char *SymName, unsigned char TargetFlags=0)
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
const MachineInstrBuilder & copyImplicitOps(const MachineInstr &OtherMI) const
Copy all the implicit operands from OtherMI onto this one.
Representation of each machine instruction.
Definition: MachineInstr.h:64
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0)
const MachineInstrBuilder & setMIFlags(unsigned Flags) const
void cloneMergedMemRefs(MachineFunction &MF, ArrayRef< const MachineInstr *> MIs)
Clone the merge of multiple MachineInstrs&#39; memory reference descriptors list and replace ours with it...
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
int64_t getOffset() const
Return the offset from the symbol in this operand.
const BlockAddress * getBlockAddress() const
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned char TargetFlags=0) const
static MachineOperand CreateImm(int64_t Val)
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned getImplRegState(bool B)
const MachineInstrBuilder & cloneMemRefs(const MachineInstr &OtherMI) const
const MachineInstrBuilder & cloneMergedMemRefs(ArrayRef< const MachineInstr *> OtherMIs) const
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Instructions::iterator instr_iterator
const MachineInstrBuilder & addJumpTableIndex(unsigned Idx, unsigned char TargetFlags=0) const
MIBundleBuilder & append(MachineInstr *MI)
Insert MI into MBB by appending it to the instructions in the bundle.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void setMemRefs(MachineFunction &MF, ArrayRef< MachineMemOperand *> MemRefs)
Assign this MachineInstr&#39;s memory reference descriptor list.
const DILocalVariable * getDebugVariable() const
Return the debug variable referenced by this DBG_VALUE instruction.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
static const Function * getParent(const Value *V)
IRTranslator LLVM IR MI
Address of indexed Constant in Constant Pool.
const MachineInstrBuilder & addDef(unsigned RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
Register getReg() const
getReg - Returns the register number.
MachineBasicBlock::instr_iterator getBundleEnd(MachineBasicBlock::instr_iterator I)
Returns an iterator pointing beyond the bundle containing I.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0) const
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:416
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
static MachineOperand CreateFI(int Idx)
MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
MIBundleBuilder(MachineInstr *MI)
Create an MIBundleBuilder representing an existing instruction or bundle that has MI as its head...
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
Wrapper class representing virtual and physical registers.
Definition: Register.h:18
Helper class for constructing bundles of MachineInstrs.
bool isImplicit() const