LLVM  16.0.0git
ARMTargetStreamer.cpp
Go to the documentation of this file.
1 //===- ARMTargetStreamer.cpp - ARMTargetStreamer class --*- C++ -*---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the ARMTargetStreamer class.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 #include "llvm/MC/ConstantPools.h"
15 #include "llvm/MC/MCAsmInfo.h"
16 #include "llvm/MC/MCContext.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/MC/MCStreamer.h"
22 
23 using namespace llvm;
24 
25 //
26 // ARMTargetStreamer Implemenation
27 //
28 
30  : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
31 
33 
34 // The constant pool handling is shared by all ARMTargetStreamer
35 // implementations.
37  return ConstantPools->addEntry(Streamer, Expr, 4, Loc);
38 }
39 
41  ConstantPools->emitForCurrentSection(Streamer);
42  ConstantPools->clearCacheForCurrentSection(Streamer);
43 }
44 
45 // finish() - write out any non-empty assembler constant pools.
47  ConstantPools->emitAll(Streamer);
48 }
49 
50 // reset() - Reset any state
52 
53 void ARMTargetStreamer::emitInst(uint32_t Inst, char Suffix) {
54  unsigned Size;
55  char Buffer[4];
56  const bool LittleEndian = getStreamer().getContext().getAsmInfo()->isLittleEndian();
57 
58  switch (Suffix) {
59  case '\0':
60  Size = 4;
61 
62  for (unsigned II = 0, IE = Size; II != IE; II++) {
63  const unsigned I = LittleEndian ? (Size - II - 1) : II;
64  Buffer[Size - II - 1] = uint8_t(Inst >> I * CHAR_BIT);
65  }
66 
67  break;
68  case 'n':
69  case 'w':
70  Size = (Suffix == 'n' ? 2 : 4);
71 
72  // Thumb wide instructions are emitted as a pair of 16-bit words of the
73  // appropriate endianness.
74  for (unsigned II = 0, IE = Size; II != IE; II = II + 2) {
75  const unsigned I0 = LittleEndian ? II + 0 : II + 1;
76  const unsigned I1 = LittleEndian ? II + 1 : II + 0;
77  Buffer[Size - II - 2] = uint8_t(Inst >> I0 * CHAR_BIT);
78  Buffer[Size - II - 1] = uint8_t(Inst >> I1 * CHAR_BIT);
79  }
80 
81  break;
82  default:
83  llvm_unreachable("Invalid Suffix");
84  }
85  getStreamer().emitBytes(StringRef(Buffer, Size));
86 }
87 
88 // The remaining callbacks should be handled separately by each
89 // streamer.
93 void ARMTargetStreamer::emitPersonality(const MCSymbol *Personality) {}
96 void ARMTargetStreamer::emitSetFP(unsigned FpReg, unsigned SpReg,
97  int64_t Offset) {}
98 void ARMTargetStreamer::emitMovSP(unsigned Reg, int64_t Offset) {}
99 void ARMTargetStreamer::emitPad(int64_t Offset) {}
101  bool isVector) {}
103  const SmallVectorImpl<uint8_t> &Opcodes) {
104 }
108  StringRef String) {}
110  unsigned IntValue,
111  StringRef StringValue) {}
115 void ARMTargetStreamer::emitFPU(unsigned FPU) {}
118  const MCSymbolRefExpr *SRE) {}
120 
121 void ARMTargetStreamer::emitARMWinCFIAllocStack(unsigned Size, bool Wide) {}
124 void ARMTargetStreamer::emitARMWinCFISaveFRegs(unsigned First, unsigned Last) {}
131 
133  if (STI.getCPU() == "xscale")
134  return ARMBuildAttrs::v5TEJ;
135 
136  if (STI.hasFeature(ARM::HasV9_0aOps))
137  return ARMBuildAttrs::v9_A;
138  else if (STI.hasFeature(ARM::HasV8Ops)) {
139  if (STI.hasFeature(ARM::FeatureRClass))
140  return ARMBuildAttrs::v8_R;
141  return ARMBuildAttrs::v8_A;
142  } else if (STI.hasFeature(ARM::HasV8_1MMainlineOps))
144  else if (STI.hasFeature(ARM::HasV8MMainlineOps))
146  else if (STI.hasFeature(ARM::HasV7Ops)) {
147  if (STI.hasFeature(ARM::FeatureMClass) && STI.hasFeature(ARM::FeatureDSP))
148  return ARMBuildAttrs::v7E_M;
149  return ARMBuildAttrs::v7;
150  } else if (STI.hasFeature(ARM::HasV6T2Ops))
151  return ARMBuildAttrs::v6T2;
152  else if (STI.hasFeature(ARM::HasV8MBaselineOps))
154  else if (STI.hasFeature(ARM::HasV6MOps))
155  return ARMBuildAttrs::v6S_M;
156  else if (STI.hasFeature(ARM::HasV6Ops))
157  return ARMBuildAttrs::v6;
158  else if (STI.hasFeature(ARM::HasV5TEOps))
159  return ARMBuildAttrs::v5TE;
160  else if (STI.hasFeature(ARM::HasV5TOps))
161  return ARMBuildAttrs::v5T;
162  else if (STI.hasFeature(ARM::HasV4TOps))
163  return ARMBuildAttrs::v4T;
164  else
165  return ARMBuildAttrs::v4;
166 }
167 
168 static bool isV8M(const MCSubtargetInfo &STI) {
169  // Note that v8M Baseline is a subset of v6T2!
170  return (STI.hasFeature(ARM::HasV8MBaselineOps) &&
171  !STI.hasFeature(ARM::HasV6T2Ops)) ||
172  STI.hasFeature(ARM::HasV8MMainlineOps);
173 }
174 
175 /// Emit the build attributes that only depend on the hardware that we expect
176 // /to be available, and not on the ABI, or any source-language choices.
178  switchVendor("aeabi");
179 
180  const StringRef CPUString = STI.getCPU();
181  if (!CPUString.empty() && !CPUString.startswith("generic")) {
182  // FIXME: remove krait check when GNU tools support krait cpu
183  if (STI.hasFeature(ARM::ProcKrait)) {
185  // We consider krait as a "cortex-a9" + hwdiv CPU
186  // Enable hwdiv through ".arch_extension idiv"
187  if (STI.hasFeature(ARM::FeatureHWDivThumb) ||
188  STI.hasFeature(ARM::FeatureHWDivARM))
190  } else {
192  }
193  }
194 
196 
197  if (STI.hasFeature(ARM::FeatureAClass)) {
200  } else if (STI.hasFeature(ARM::FeatureRClass)) {
203  } else if (STI.hasFeature(ARM::FeatureMClass)) {
206  }
207 
208  emitAttribute(ARMBuildAttrs::ARM_ISA_use, STI.hasFeature(ARM::FeatureNoARM)
211 
212  if (isV8M(STI)) {
215  } else if (STI.hasFeature(ARM::FeatureThumb2)) {
218  } else if (STI.hasFeature(ARM::HasV4TOps)) {
220  }
221 
222  if (STI.hasFeature(ARM::FeatureNEON)) {
223  /* NEON is not exactly a VFP architecture, but GAS emit one of
224  * neon/neon-fp-armv8/neon-vfpv4/vfpv3/vfpv2 for .fpu parameters */
225  if (STI.hasFeature(ARM::FeatureFPARMv8)) {
226  if (STI.hasFeature(ARM::FeatureCrypto))
227  emitFPU(ARM::FK_CRYPTO_NEON_FP_ARMV8);
228  else
229  emitFPU(ARM::FK_NEON_FP_ARMV8);
230  } else if (STI.hasFeature(ARM::FeatureVFP4))
231  emitFPU(ARM::FK_NEON_VFPV4);
232  else
233  emitFPU(STI.hasFeature(ARM::FeatureFP16) ? ARM::FK_NEON_FP16
234  : ARM::FK_NEON);
235  // Emit Tag_Advanced_SIMD_arch for ARMv8 architecture
236  if (STI.hasFeature(ARM::HasV8Ops))
238  STI.hasFeature(ARM::HasV8_1aOps)
241  } else {
242  if (STI.hasFeature(ARM::FeatureFPARMv8_D16_SP))
243  // FPv5 and FP-ARMv8 have the same instructions, so are modeled as one
244  // FPU, but there are two different names for it depending on the CPU.
245  emitFPU(STI.hasFeature(ARM::FeatureD32)
246  ? ARM::FK_FP_ARMV8
247  : (STI.hasFeature(ARM::FeatureFP64) ? ARM::FK_FPV5_D16
248  : ARM::FK_FPV5_SP_D16));
249  else if (STI.hasFeature(ARM::FeatureVFP4_D16_SP))
250  emitFPU(STI.hasFeature(ARM::FeatureD32)
251  ? ARM::FK_VFPV4
252  : (STI.hasFeature(ARM::FeatureFP64) ? ARM::FK_VFPV4_D16
253  : ARM::FK_FPV4_SP_D16));
254  else if (STI.hasFeature(ARM::FeatureVFP3_D16_SP))
255  emitFPU(
256  STI.hasFeature(ARM::FeatureD32)
257  // +d32
258  ? (STI.hasFeature(ARM::FeatureFP16) ? ARM::FK_VFPV3_FP16
259  : ARM::FK_VFPV3)
260  // -d32
261  : (STI.hasFeature(ARM::FeatureFP64)
262  ? (STI.hasFeature(ARM::FeatureFP16)
263  ? ARM::FK_VFPV3_D16_FP16
264  : ARM::FK_VFPV3_D16)
265  : (STI.hasFeature(ARM::FeatureFP16) ? ARM::FK_VFPV3XD_FP16
266  : ARM::FK_VFPV3XD)));
267  else if (STI.hasFeature(ARM::FeatureVFP2_SP))
268  emitFPU(ARM::FK_VFPV2);
269  }
270 
271  // ABI_HardFP_use attribute to indicate single precision FP.
272  if (STI.hasFeature(ARM::FeatureVFP2_SP) && !STI.hasFeature(ARM::FeatureFP64))
275 
276  if (STI.hasFeature(ARM::FeatureFP16))
278 
279  if (STI.hasFeature(ARM::FeatureMP))
281 
282  if (STI.hasFeature(ARM::HasMVEFloatOps))
284  else if (STI.hasFeature(ARM::HasMVEIntegerOps))
286 
287  // Hardware divide in ARM mode is part of base arch, starting from ARMv8.
288  // If only Thumb hwdiv is present, it must also be in base arch (ARMv7-R/M).
289  // It is not possible to produce DisallowDIV: if hwdiv is present in the base
290  // arch, supplying -hwdiv downgrades the effective arch, via ClearImpliedBits.
291  // AllowDIVExt is only emitted if hwdiv isn't available in the base arch;
292  // otherwise, the default value (AllowDIVIfExists) applies.
293  if (STI.hasFeature(ARM::FeatureHWDivARM) && !STI.hasFeature(ARM::HasV8Ops))
295 
296  if (STI.hasFeature(ARM::FeatureDSP) && isV8M(STI))
298 
299  if (STI.hasFeature(ARM::FeatureStrictAlign))
302  else
305 
306  if (STI.hasFeature(ARM::FeatureTrustZone) &&
307  STI.hasFeature(ARM::FeatureVirtualization))
310  else if (STI.hasFeature(ARM::FeatureTrustZone))
312  else if (STI.hasFeature(ARM::FeatureVirtualization))
315 
316  if (STI.hasFeature(ARM::FeaturePACBTI)) {
319  }
320 }
321 
324  const Triple &TT = STI.getTargetTriple();
325  if (TT.isOSBinFormatELF())
327  if (TT.isOSBinFormatCOFF())
329  return new ARMTargetStreamer(S);
330 }
llvm::MCTargetStreamer::getStreamer
MCStreamer & getStreamer()
Definition: MCStreamer.h:101
llvm::ARMTargetStreamer::emitCantUnwind
virtual void emitCantUnwind()
Definition: ARMTargetStreamer.cpp:92
llvm::ARMBuildAttrs::ARM_ISA_use
@ ARM_ISA_use
Definition: ARMBuildAttributes.h:41
llvm::ARMBuildAttrs::AllowHPFP
@ AllowHPFP
Definition: ARMBuildAttributes.h:223
llvm::ARMBuildAttrs::BTI_extension
@ BTI_extension
Definition: ARMBuildAttributes.h:74
llvm::ARMBuildAttrs::AllowThumb32
@ AllowThumb32
Definition: ARMBuildAttributes.h:131
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
llvm::createARMObjectTargetWinCOFFStreamer
MCTargetStreamer * createARMObjectTargetWinCOFFStreamer(MCStreamer &S)
Definition: ARMWinCOFFStreamer.cpp:275
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
llvm::ARMTargetStreamer::emitFnEnd
virtual void emitFnEnd()
Definition: ARMTargetStreamer.cpp:91
ARMMCTargetDesc.h
llvm::ARMBuildAttrs::v7E_M
@ v7E_M
Definition: ARMBuildAttributes.h:106
llvm::ARMBuildAttrs::Advanced_SIMD_arch
@ Advanced_SIMD_arch
Definition: ARMBuildAttributes.h:45
llvm::Attribute
Definition: Attributes.h:65
llvm::ARMTargetStreamer
Definition: MCStreamer.h:135
llvm::ARMTargetStreamer::emitPersonality
virtual void emitPersonality(const MCSymbol *Personality)
Definition: ARMTargetStreamer.cpp:93
llvm::createARMObjectTargetStreamer
MCTargetStreamer * createARMObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
Definition: ARMTargetStreamer.cpp:323
llvm::ARMBuildAttrs::ApplicationProfile
@ ApplicationProfile
Definition: ARMBuildAttributes.h:117
llvm::ARMBuildAttrs::CPU_arch_profile
@ CPU_arch_profile
Definition: ARMBuildAttributes.h:40
llvm::X86Disassembler::Reg
Reg
All possible values of the reg field in the ModR/M byte.
Definition: X86DisassemblerDecoder.h:462
llvm::ARMBuildAttrs::v8_1_M_Main
@ v8_1_M_Main
Definition: ARMBuildAttributes.h:111
llvm::ARMBuildAttrs::v7
@ v7
Definition: ARMBuildAttributes.h:103
llvm::Triple
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
llvm::ARMTargetStreamer::emitARMWinCFINop
virtual void emitARMWinCFINop(bool Wide)
Definition: ARMTargetStreamer.cpp:126
llvm::ARMBuildAttrs::MPextension_use
@ MPextension_use
Definition: ARMBuildAttributes.h:69
llvm::AssemblerConstantPools
Definition: ConstantPools.h:70
llvm::ARMTargetStreamer::emitARMWinCFIAllocStack
virtual void emitARMWinCFIAllocStack(unsigned Size, bool Wide)
Definition: ARMTargetStreamer.cpp:121
llvm::ARMTargetStreamer::ARMTargetStreamer
ARMTargetStreamer(MCStreamer &S)
Definition: ARMTargetStreamer.cpp:29
llvm::ARMBuildAttrs::AllowMVEIntegerAndFloat
@ AllowMVEIntegerAndFloat
Definition: ARMBuildAttributes.h:156
TargetParser.h
llvm::ARMTargetStreamer::reset
virtual void reset()
Reset any state between object emissions, i.e.
Definition: ARMTargetStreamer.cpp:51
llvm::ARMBuildAttrs::AllowThumbDerived
@ AllowThumbDerived
Definition: ARMBuildAttributes.h:132
llvm::ARMBuildAttrs::CPU_unaligned_access
@ CPU_unaligned_access
Definition: ARMBuildAttributes.h:66
llvm::ARMTargetStreamer::emitPad
virtual void emitPad(int64_t Offset)
Definition: ARMTargetStreamer.cpp:99
new
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM ID Predecessors according to mbb< bb27, 0x8b0a7c0 > Note ADDri is not a two address instruction its result reg1037 is an operand of the PHI node in bb76 and its operand reg1039 is the result of the PHI node We should treat it as a two address code and make sure the ADDri is scheduled after any node that reads reg1039 Use info(i.e. register scavenger) to assign it a free register to allow reuse the collector could move the objects and invalidate the derived pointer This is bad enough in the first but safe points can crop up unpredictably **array_addr i32 n y store obj * new
Definition: README.txt:125
llvm::BitmaskEnumDetail::Mask
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:80
llvm::MCStreamer
Streaming machine code generation interface.
Definition: MCStreamer.h:212
llvm::ARMBuildAttrs::AllowNeonARMv8
@ AllowNeonARMv8
Definition: ARMBuildAttributes.h:151
llvm::ARM::AEK_HWDIVTHUMB
@ AEK_HWDIVTHUMB
Definition: ARMTargetParser.h:35
llvm::ARMBuildAttrs::v5TE
@ v5TE
Definition: ARMBuildAttributes.h:97
llvm::ARMTargetStreamer::emitRegSave
virtual void emitRegSave(const SmallVectorImpl< unsigned > &RegList, bool isVector)
Definition: ARMTargetStreamer.cpp:100
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::StringRef::startswith
bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
Definition: StringRef.h:256
llvm::ARMTargetStreamer::emitInst
virtual void emitInst(uint32_t Inst, char Suffix='\0')
Definition: ARMTargetStreamer.cpp:53
llvm::ARMBuildAttrs::PAC_extension
@ PAC_extension
Definition: ARMBuildAttributes.h:73
llvm::MCSubtargetInfo::hasFeature
bool hasFeature(unsigned Feature) const
Definition: MCSubtargetInfo.h:119
llvm::ARMBuildAttrs::AllowTZ
@ AllowTZ
Definition: ARMBuildAttributes.h:243
isV8M
static bool isV8M(const MCSubtargetInfo &STI)
Definition: ARMTargetStreamer.cpp:168
llvm::MCSubtargetInfo::getTargetTriple
const Triple & getTargetTriple() const
Definition: MCSubtargetInfo.h:108
MCContext.h
llvm::ARMBuildAttrs::AllowPAC
@ AllowPAC
Definition: ARMBuildAttributes.h:250
llvm::ARMTargetStreamer::emitArch
virtual void emitArch(ARM::ArchKind Arch)
Definition: ARMTargetStreamer.cpp:112
llvm::dwarf::Index
Index
Definition: Dwarf.h:472
MCSubtargetInfo.h
llvm::ARMBuildAttrs::RealTimeProfile
@ RealTimeProfile
Definition: ARMBuildAttributes.h:118
llvm::ARMBuildAttrs::v8_M_Main
@ v8_M_Main
Definition: ARMBuildAttributes.h:110
llvm::createARMObjectTargetELFStreamer
MCTargetStreamer * createARMObjectTargetELFStreamer(MCStreamer &S)
Definition: ARMELFStreamer.cpp:1479
llvm::ARMBuildAttrs::AllowMVEInteger
@ AllowMVEInteger
Definition: ARMBuildAttributes.h:155
llvm::MCTargetStreamer
Target specific streamer interface.
Definition: MCStreamer.h:93
llvm::ARMTargetStreamer::emitARMWinCFIPrologEnd
virtual void emitARMWinCFIPrologEnd(bool Fragment)
Definition: ARMTargetStreamer.cpp:127
llvm::ARM_PROC::IE
@ IE
Definition: ARMBaseInfo.h:27
llvm::ARMBuildAttrs::AllowVirtualization
@ AllowVirtualization
Definition: ARMBuildAttributes.h:244
llvm::ARMTargetStreamer::emitSetFP
virtual void emitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset=0)
Definition: ARMTargetStreamer.cpp:96
llvm::ARMTargetStreamer::emitARMWinCFISaveRegMask
virtual void emitARMWinCFISaveRegMask(unsigned Mask, bool Wide)
Definition: ARMTargetStreamer.cpp:122
llvm::StringRef::empty
constexpr bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:134
llvm::ARMTargetStreamer::emitARMWinCFIEpilogStart
virtual void emitARMWinCFIEpilogStart(unsigned Condition)
Definition: ARMTargetStreamer.cpp:128
ConstantPools.h
llvm::ARM::AEK_HWDIVARM
@ AEK_HWDIVARM
Definition: ARMTargetParser.h:36
llvm::ARMBuildAttrs::Not_Allowed
@ Not_Allowed
Definition: ARMBuildAttributes.h:125
llvm::ARMBuildAttrs::THUMB_ISA_use
@ THUMB_ISA_use
Definition: ARMBuildAttributes.h:42
llvm::ARMTargetStreamer::emitObjectArch
virtual void emitObjectArch(ARM::ArchKind Arch)
Definition: ARMTargetStreamer.cpp:114
uint64_t
llvm::MCContext::getAsmInfo
const MCAsmInfo * getAsmInfo() const
Definition: MCContext.h:447
llvm::MCTargetStreamer::Streamer
MCStreamer & Streamer
Definition: MCStreamer.h:95
llvm::ARMTargetStreamer::emitARMWinCFIEpilogEnd
virtual void emitARMWinCFIEpilogEnd()
Definition: ARMTargetStreamer.cpp:129
llvm::ARMBuildAttrs::v9_A
@ v9_A
Definition: ARMBuildAttributes.h:112
llvm::ARMTargetStreamer::emitHandlerData
virtual void emitHandlerData()
Definition: ARMTargetStreamer.cpp:95
llvm::ARMTargetStreamer::addConstantPoolEntry
const MCExpr * addConstantPoolEntry(const MCExpr *, SMLoc Loc)
Callback used to implement the ldr= pseudo.
Definition: ARMTargetStreamer.cpp:36
llvm::MCSubtargetInfo::getCPU
StringRef getCPU() const
Definition: MCSubtargetInfo.h:109
I
#define I(x, y, z)
Definition: MD5.cpp:58
llvm::ARMBuildAttrs::MicroControllerProfile
@ MicroControllerProfile
Definition: ARMBuildAttributes.h:119
llvm::ARMTargetStreamer::switchVendor
virtual void switchVendor(StringRef Vendor)
Definition: ARMTargetStreamer.cpp:105
llvm::ARMTargetStreamer::emitThumbSet
virtual void emitThumbSet(MCSymbol *Symbol, const MCExpr *Value)
Definition: ARMTargetStreamer.cpp:119
llvm::ARMTargetStreamer::emitIntTextAttribute
virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue, StringRef StringValue="")
Definition: ARMTargetStreamer.cpp:109
llvm::MCSymbolRefExpr
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:192
llvm::ARMBuildAttrs::AllowBTI
@ AllowBTI
Definition: ARMBuildAttributes.h:255
llvm::ARMBuildAttrs::AllowNeonARMv8_1a
@ AllowNeonARMv8_1a
Definition: ARMBuildAttributes.h:152
llvm::ARMBuildAttrs::v6
@ v6
Definition: ARMBuildAttributes.h:99
llvm::ARMBuildAttrs::v6T2
@ v6T2
Definition: ARMBuildAttributes.h:101
MCAsmInfo.h
llvm::ARMTargetStreamer::emitPersonalityIndex
virtual void emitPersonalityIndex(unsigned Index)
Definition: ARMTargetStreamer.cpp:94
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:143
llvm::ARMBuildAttrs::v4
@ v4
Definition: ARMBuildAttributes.h:94
llvm::ARMBuildAttrs::DIV_use
@ DIV_use
Definition: ARMBuildAttributes.h:70
uint32_t
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
llvm::ARMBuildAttrs::Allowed
@ Allowed
Definition: ARMBuildAttributes.h:126
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
getArchForCPU
static ARMBuildAttrs::CPUArch getArchForCPU(const MCSubtargetInfo &STI)
Definition: ARMTargetStreamer.cpp:132
llvm::ARMBuildAttrs::v8_A
@ v8_A
Definition: ARMBuildAttributes.h:107
llvm::ARMBuildAttrs::MVE_arch
@ MVE_arch
Definition: ARMBuildAttributes.h:72
llvm::ARMTargetStreamer::emitTargetAttributes
void emitTargetAttributes(const MCSubtargetInfo &STI)
Emit the build attributes that only depend on the hardware that we expect.
Definition: ARMTargetStreamer.cpp:177
llvm::ARMBuildAttrs::Virtualization_use
@ Virtualization_use
Definition: ARMBuildAttributes.h:77
llvm::ARMTargetStreamer::emitTextAttribute
virtual void emitTextAttribute(unsigned Attribute, StringRef String)
Definition: ARMTargetStreamer.cpp:107
llvm::ARM::ArchKind
ArchKind
Definition: ARMTargetParser.h:103
llvm::ARMTargetStreamer::emitUnwindRaw
virtual void emitUnwindRaw(int64_t StackOffset, const SmallVectorImpl< uint8_t > &Opcodes)
Definition: ARMTargetStreamer.cpp:102
llvm::ARMBuildAttrs::v8_R
@ v8_R
Definition: ARMBuildAttributes.h:108
llvm::ARMTargetStreamer::emitMovSP
virtual void emitMovSP(unsigned Reg, int64_t Offset=0)
Definition: ARMTargetStreamer.cpp:98
llvm::ARMBuildAttrs::v5T
@ v5T
Definition: ARMBuildAttributes.h:96
llvm::ARMTargetStreamer::emitAttribute
virtual void emitAttribute(unsigned Attribute, unsigned Value)
Definition: ARMTargetStreamer.cpp:106
llvm::MCAsmInfo::isLittleEndian
bool isLittleEndian() const
True if the target is little endian.
Definition: MCAsmInfo.h:557
llvm::ARMBuildAttrs::CPU_arch
@ CPU_arch
Definition: ARMBuildAttributes.h:39
llvm::ARMBuildAttrs::v8_M_Base
@ v8_M_Base
Definition: ARMBuildAttributes.h:109
llvm::ARMTargetStreamer::~ARMTargetStreamer
~ARMTargetStreamer() override
ARMBuildAttributes.h
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:83
llvm::ARMTargetStreamer::emitFnStart
virtual void emitFnStart()
Definition: ARMTargetStreamer.cpp:90
llvm::ARMTargetStreamer::emitARMWinCFISaveFRegs
virtual void emitARMWinCFISaveFRegs(unsigned First, unsigned Last)
Definition: ARMTargetStreamer.cpp:124
llvm::LegalityPredicates::isVector
LegalityPredicate isVector(unsigned TypeIdx)
True iff the specified type index is a vector.
Definition: LegalityPredicates.cpp:73
llvm::MCStreamer::getContext
MCContext & getContext() const
Definition: MCStreamer.h:293
llvm::ARMBuildAttrs::v5TEJ
@ v5TEJ
Definition: ARMBuildAttributes.h:98
MCStreamer.h
llvm::ARMTargetStreamer::emitARMWinCFISaveSP
virtual void emitARMWinCFISaveSP(unsigned Reg)
Definition: ARMTargetStreamer.cpp:123
llvm::ARMBuildAttrs::DSP_extension
@ DSP_extension
Definition: ARMBuildAttributes.h:71
llvm::ARMBuildAttrs::FP_HP_extension
@ FP_HP_extension
Definition: ARMBuildAttributes.h:67
llvm::ARMBuildAttrs::v4T
@ v4T
Definition: ARMBuildAttributes.h:95
llvm::ARMBuildAttrs::ABI_HardFP_use
@ ABI_HardFP_use
Definition: ARMBuildAttributes.h:60
llvm::ARMBuildAttrs::HardFPSinglePrecision
@ HardFPSinglePrecision
Definition: ARMBuildAttributes.h:214
llvm::ARMTargetStreamer::emitArchExtension
virtual void emitArchExtension(uint64_t ArchExt)
Definition: ARMTargetStreamer.cpp:113
llvm::ARMTargetStreamer::emitARMWinCFISaveLR
virtual void emitARMWinCFISaveLR(unsigned Offset)
Definition: ARMTargetStreamer.cpp:125
llvm::MCStreamer::emitBytes
virtual void emitBytes(StringRef Data)
Emit the bytes in Data into the output.
Definition: MCStreamer.cpp:1211
llvm::SmallVectorImpl< unsigned >
llvm::ARMBuildAttrs::CPU_name
@ CPU_name
Definition: ARMBuildAttributes.h:38
llvm::ARMBuildAttrs::AllowMP
@ AllowMP
Definition: ARMBuildAttributes.h:230
llvm::ARMTargetStreamer::finishAttributeSection
virtual void finishAttributeSection()
Definition: ARMTargetStreamer.cpp:116
llvm::ARMBuildAttrs::CPUArch
CPUArch
Definition: ARMBuildAttributes.h:92
llvm::ARMTargetStreamer::emitCurrentConstantPool
void emitCurrentConstantPool()
Callback used to implement the .ltorg directive.
Definition: ARMTargetStreamer.cpp:40
llvm::ARMBuildAttrs::v6S_M
@ v6S_M
Definition: ARMBuildAttributes.h:105
llvm::ARMTargetStreamer::emitARMWinCFICustom
virtual void emitARMWinCFICustom(unsigned Opcode)
Definition: ARMTargetStreamer.cpp:130
llvm::ARMBuildAttrs::AllowTZVirtualization
@ AllowTZVirtualization
Definition: ARMBuildAttributes.h:245
MCExpr.h
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:76
llvm::ARMTargetStreamer::emitFPU
virtual void emitFPU(unsigned FPU)
Definition: ARMTargetStreamer.cpp:115
llvm::Value
LLVM Value Representation.
Definition: Value.h:74
llvm::ARMTargetStreamer::emitConstantPools
void emitConstantPools() override
Definition: ARMTargetStreamer.cpp:46
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
llvm::ARMBuildAttrs::AllowDIVExt
@ AllowDIVExt
Definition: ARMBuildAttributes.h:238
llvm::ARMTargetStreamer::annotateTLSDescriptorSequence
virtual void annotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE)
Definition: ARMTargetStreamer.cpp:117