LLVM  14.0.0git
ARMTargetStreamer.cpp
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1 //===- ARMTargetStreamer.cpp - ARMTargetStreamer class --*- C++ -*---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the ARMTargetStreamer class.
10 //
11 //===----------------------------------------------------------------------===//
12 
14 #include "llvm/MC/ConstantPools.h"
15 #include "llvm/MC/MCAsmInfo.h"
16 #include "llvm/MC/MCContext.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/MC/MCStreamer.h"
22 
23 using namespace llvm;
24 
25 //
26 // ARMTargetStreamer Implemenation
27 //
28 
30  : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
31 
33 
34 // The constant pool handling is shared by all ARMTargetStreamer
35 // implementations.
37  return ConstantPools->addEntry(Streamer, Expr, 4, Loc);
38 }
39 
41  ConstantPools->emitForCurrentSection(Streamer);
42  ConstantPools->clearCacheForCurrentSection(Streamer);
43 }
44 
45 // finish() - write out any non-empty assembler constant pools.
47  ConstantPools->emitAll(Streamer);
48 }
49 
50 // reset() - Reset any state
52 
53 void ARMTargetStreamer::emitInst(uint32_t Inst, char Suffix) {
54  unsigned Size;
55  char Buffer[4];
56  const bool LittleEndian = getStreamer().getContext().getAsmInfo()->isLittleEndian();
57 
58  switch (Suffix) {
59  case '\0':
60  Size = 4;
61 
62  for (unsigned II = 0, IE = Size; II != IE; II++) {
63  const unsigned I = LittleEndian ? (Size - II - 1) : II;
64  Buffer[Size - II - 1] = uint8_t(Inst >> I * CHAR_BIT);
65  }
66 
67  break;
68  case 'n':
69  case 'w':
70  Size = (Suffix == 'n' ? 2 : 4);
71 
72  // Thumb wide instructions are emitted as a pair of 16-bit words of the
73  // appropriate endianness.
74  for (unsigned II = 0, IE = Size; II != IE; II = II + 2) {
75  const unsigned I0 = LittleEndian ? II + 0 : II + 1;
76  const unsigned I1 = LittleEndian ? II + 1 : II + 0;
77  Buffer[Size - II - 2] = uint8_t(Inst >> I0 * CHAR_BIT);
78  Buffer[Size - II - 1] = uint8_t(Inst >> I1 * CHAR_BIT);
79  }
80 
81  break;
82  default:
83  llvm_unreachable("Invalid Suffix");
84  }
85  getStreamer().emitBytes(StringRef(Buffer, Size));
86 }
87 
88 // The remaining callbacks should be handled separately by each
89 // streamer.
93 void ARMTargetStreamer::emitPersonality(const MCSymbol *Personality) {}
96 void ARMTargetStreamer::emitSetFP(unsigned FpReg, unsigned SpReg,
97  int64_t Offset) {}
98 void ARMTargetStreamer::emitMovSP(unsigned Reg, int64_t Offset) {}
101  bool isVector) {}
103  const SmallVectorImpl<uint8_t> &Opcodes) {
104 }
108  StringRef String) {}
110  unsigned IntValue,
111  StringRef StringValue) {}
115 void ARMTargetStreamer::emitFPU(unsigned FPU) {}
117 void
120 
122  if (STI.getCPU() == "xscale")
123  return ARMBuildAttrs::v5TEJ;
124 
125  if (STI.hasFeature(ARM::HasV8Ops)) {
126  if (STI.hasFeature(ARM::FeatureRClass))
127  return ARMBuildAttrs::v8_R;
128  return ARMBuildAttrs::v8_A;
129  } else if (STI.hasFeature(ARM::HasV8_1MMainlineOps))
131  else if (STI.hasFeature(ARM::HasV8MMainlineOps))
133  else if (STI.hasFeature(ARM::HasV7Ops)) {
134  if (STI.hasFeature(ARM::FeatureMClass) && STI.hasFeature(ARM::FeatureDSP))
135  return ARMBuildAttrs::v7E_M;
136  return ARMBuildAttrs::v7;
137  } else if (STI.hasFeature(ARM::HasV6T2Ops))
138  return ARMBuildAttrs::v6T2;
139  else if (STI.hasFeature(ARM::HasV8MBaselineOps))
141  else if (STI.hasFeature(ARM::HasV6MOps))
142  return ARMBuildAttrs::v6S_M;
143  else if (STI.hasFeature(ARM::HasV6Ops))
144  return ARMBuildAttrs::v6;
145  else if (STI.hasFeature(ARM::HasV5TEOps))
146  return ARMBuildAttrs::v5TE;
147  else if (STI.hasFeature(ARM::HasV5TOps))
148  return ARMBuildAttrs::v5T;
149  else if (STI.hasFeature(ARM::HasV4TOps))
150  return ARMBuildAttrs::v4T;
151  else
152  return ARMBuildAttrs::v4;
153 }
154 
155 static bool isV8M(const MCSubtargetInfo &STI) {
156  // Note that v8M Baseline is a subset of v6T2!
157  return (STI.hasFeature(ARM::HasV8MBaselineOps) &&
158  !STI.hasFeature(ARM::HasV6T2Ops)) ||
159  STI.hasFeature(ARM::HasV8MMainlineOps);
160 }
161 
162 /// Emit the build attributes that only depend on the hardware that we expect
163 // /to be available, and not on the ABI, or any source-language choices.
165  switchVendor("aeabi");
166 
167  const StringRef CPUString = STI.getCPU();
168  if (!CPUString.empty() && !CPUString.startswith("generic")) {
169  // FIXME: remove krait check when GNU tools support krait cpu
170  if (STI.hasFeature(ARM::ProcKrait)) {
172  // We consider krait as a "cortex-a9" + hwdiv CPU
173  // Enable hwdiv through ".arch_extension idiv"
174  if (STI.hasFeature(ARM::FeatureHWDivThumb) ||
175  STI.hasFeature(ARM::FeatureHWDivARM))
177  } else {
179  }
180  }
181 
183 
184  if (STI.hasFeature(ARM::FeatureAClass)) {
187  } else if (STI.hasFeature(ARM::FeatureRClass)) {
190  } else if (STI.hasFeature(ARM::FeatureMClass)) {
193  }
194 
195  emitAttribute(ARMBuildAttrs::ARM_ISA_use, STI.hasFeature(ARM::FeatureNoARM)
198 
199  if (isV8M(STI)) {
202  } else if (STI.hasFeature(ARM::FeatureThumb2)) {
205  } else if (STI.hasFeature(ARM::HasV4TOps)) {
207  }
208 
209  if (STI.hasFeature(ARM::FeatureNEON)) {
210  /* NEON is not exactly a VFP architecture, but GAS emit one of
211  * neon/neon-fp-armv8/neon-vfpv4/vfpv3/vfpv2 for .fpu parameters */
212  if (STI.hasFeature(ARM::FeatureFPARMv8)) {
213  if (STI.hasFeature(ARM::FeatureCrypto))
214  emitFPU(ARM::FK_CRYPTO_NEON_FP_ARMV8);
215  else
216  emitFPU(ARM::FK_NEON_FP_ARMV8);
217  } else if (STI.hasFeature(ARM::FeatureVFP4))
218  emitFPU(ARM::FK_NEON_VFPV4);
219  else
220  emitFPU(STI.hasFeature(ARM::FeatureFP16) ? ARM::FK_NEON_FP16
221  : ARM::FK_NEON);
222  // Emit Tag_Advanced_SIMD_arch for ARMv8 architecture
223  if (STI.hasFeature(ARM::HasV8Ops))
225  STI.hasFeature(ARM::HasV8_1aOps)
228  } else {
229  if (STI.hasFeature(ARM::FeatureFPARMv8_D16_SP))
230  // FPv5 and FP-ARMv8 have the same instructions, so are modeled as one
231  // FPU, but there are two different names for it depending on the CPU.
232  emitFPU(STI.hasFeature(ARM::FeatureD32)
233  ? ARM::FK_FP_ARMV8
234  : (STI.hasFeature(ARM::FeatureFP64) ? ARM::FK_FPV5_D16
235  : ARM::FK_FPV5_SP_D16));
236  else if (STI.hasFeature(ARM::FeatureVFP4_D16_SP))
237  emitFPU(STI.hasFeature(ARM::FeatureD32)
238  ? ARM::FK_VFPV4
239  : (STI.hasFeature(ARM::FeatureFP64) ? ARM::FK_VFPV4_D16
240  : ARM::FK_FPV4_SP_D16));
241  else if (STI.hasFeature(ARM::FeatureVFP3_D16_SP))
242  emitFPU(
243  STI.hasFeature(ARM::FeatureD32)
244  // +d32
245  ? (STI.hasFeature(ARM::FeatureFP16) ? ARM::FK_VFPV3_FP16
246  : ARM::FK_VFPV3)
247  // -d32
248  : (STI.hasFeature(ARM::FeatureFP64)
249  ? (STI.hasFeature(ARM::FeatureFP16)
250  ? ARM::FK_VFPV3_D16_FP16
251  : ARM::FK_VFPV3_D16)
252  : (STI.hasFeature(ARM::FeatureFP16) ? ARM::FK_VFPV3XD_FP16
253  : ARM::FK_VFPV3XD)));
254  else if (STI.hasFeature(ARM::FeatureVFP2_SP))
255  emitFPU(ARM::FK_VFPV2);
256  }
257 
258  // ABI_HardFP_use attribute to indicate single precision FP.
259  if (STI.hasFeature(ARM::FeatureVFP2_SP) && !STI.hasFeature(ARM::FeatureFP64))
262 
263  if (STI.hasFeature(ARM::FeatureFP16))
265 
266  if (STI.hasFeature(ARM::FeatureMP))
268 
269  if (STI.hasFeature(ARM::HasMVEFloatOps))
271  else if (STI.hasFeature(ARM::HasMVEIntegerOps))
273 
274  // Hardware divide in ARM mode is part of base arch, starting from ARMv8.
275  // If only Thumb hwdiv is present, it must also be in base arch (ARMv7-R/M).
276  // It is not possible to produce DisallowDIV: if hwdiv is present in the base
277  // arch, supplying -hwdiv downgrades the effective arch, via ClearImpliedBits.
278  // AllowDIVExt is only emitted if hwdiv isn't available in the base arch;
279  // otherwise, the default value (AllowDIVIfExists) applies.
280  if (STI.hasFeature(ARM::FeatureHWDivARM) && !STI.hasFeature(ARM::HasV8Ops))
282 
283  if (STI.hasFeature(ARM::FeatureDSP) && isV8M(STI))
285 
286  if (STI.hasFeature(ARM::FeatureStrictAlign))
289  else
292 
293  if (STI.hasFeature(ARM::FeatureTrustZone) &&
294  STI.hasFeature(ARM::FeatureVirtualization))
297  else if (STI.hasFeature(ARM::FeatureTrustZone))
299  else if (STI.hasFeature(ARM::FeatureVirtualization))
302 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::MCTargetStreamer::getStreamer
MCStreamer & getStreamer()
Definition: MCStreamer.h:99
llvm::ARMTargetStreamer::emitCantUnwind
virtual void emitCantUnwind()
Definition: ARMTargetStreamer.cpp:92
llvm::ARMBuildAttrs::ARM_ISA_use
@ ARM_ISA_use
Definition: ARMBuildAttributes.h:41
llvm::StringRef::startswith
LLVM_NODISCARD bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
Definition: StringRef.h:286
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
Reg
unsigned Reg
Definition: MachineSink.cpp:1566
llvm::MCSymbol
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
llvm::StringRef::empty
LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:153
llvm::ARMTargetStreamer::emitFnEnd
virtual void emitFnEnd()
Definition: ARMTargetStreamer.cpp:91
ARMMCTargetDesc.h
llvm::ARMBuildAttrs::v7E_M
@ v7E_M
Definition: ARMBuildAttributes.h:102
llvm::ARMBuildAttrs::Advanced_SIMD_arch
@ Advanced_SIMD_arch
Definition: ARMBuildAttributes.h:45
llvm::Attribute
Definition: Attributes.h:52
llvm::ARMTargetStreamer::emitPersonality
virtual void emitPersonality(const MCSymbol *Personality)
Definition: ARMTargetStreamer.cpp:93
llvm::ARMBuildAttrs::ApplicationProfile
@ ApplicationProfile
Definition: ARMBuildAttributes.h:112
llvm::ARMBuildAttrs::CPU_arch_profile
@ CPU_arch_profile
Definition: ARMBuildAttributes.h:40
llvm::ARMBuildAttrs::v8_1_M_Main
@ v8_1_M_Main
Definition: ARMBuildAttributes.h:107
llvm::ARMBuildAttrs::v7
@ v7
Definition: ARMBuildAttributes.h:99
llvm::ARMBuildAttrs::AllowMP
@ AllowMP
Definition: ARMBuildAttributes.h:225
llvm::ARMBuildAttrs::Not_Allowed
@ Not_Allowed
Definition: ARMBuildAttributes.h:120
llvm::ARMBuildAttrs::MPextension_use
@ MPextension_use
Definition: ARMBuildAttributes.h:69
llvm::AssemblerConstantPools
Definition: ConstantPools.h:69
llvm::ARMTargetStreamer::ARMTargetStreamer
ARMTargetStreamer(MCStreamer &S)
Definition: ARMTargetStreamer.cpp:29
Offset
uint64_t Offset
Definition: ELFObjHandler.cpp:81
TargetParser.h
llvm::ARMTargetStreamer::reset
virtual void reset()
Reset any state between object emissions, i.e.
Definition: ARMTargetStreamer.cpp:51
llvm::ARMBuildAttrs::AllowThumbDerived
@ AllowThumbDerived
Definition: ARMBuildAttributes.h:127
llvm::ARMBuildAttrs::CPU_unaligned_access
@ CPU_unaligned_access
Definition: ARMBuildAttributes.h:66
llvm::ARMTargetStreamer::emitPad
virtual void emitPad(int64_t Offset)
Definition: ARMTargetStreamer.cpp:99
new
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM ID Predecessors according to mbb< bb27, 0x8b0a7c0 > Note ADDri is not a two address instruction its result reg1037 is an operand of the PHI node in bb76 and its operand reg1039 is the result of the PHI node We should treat it as a two address code and make sure the ADDri is scheduled after any node that reads reg1039 Use info(i.e. register scavenger) to assign it a free register to allow reuse the collector could move the objects and invalidate the derived pointer This is bad enough in the first but safe points can crop up unpredictably **array_addr i32 n y store obj * new
Definition: README.txt:125
llvm::MCStreamer
Streaming machine code generation interface.
Definition: MCStreamer.h:199
llvm::ARM::AEK_HWDIVTHUMB
@ AEK_HWDIVTHUMB
Definition: ARMTargetParser.h:36
llvm::ARMBuildAttrs::v5TE
@ v5TE
Definition: ARMBuildAttributes.h:93
llvm::ARMTargetStreamer::emitRegSave
virtual void emitRegSave(const SmallVectorImpl< unsigned > &RegList, bool isVector)
Definition: ARMTargetStreamer.cpp:100
llvm::ARMTargetStreamer::AnnotateTLSDescriptorSequence
virtual void AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE)
Definition: ARMTargetStreamer.cpp:118
llvm::SMLoc
Represents a location in source code.
Definition: SMLoc.h:23
llvm::ARMTargetStreamer::emitInst
virtual void emitInst(uint32_t Inst, char Suffix='\0')
Definition: ARMTargetStreamer.cpp:53
llvm::MCSubtargetInfo::hasFeature
bool hasFeature(unsigned Feature) const
Definition: MCSubtargetInfo.h:118
isV8M
static bool isV8M(const MCSubtargetInfo &STI)
Definition: ARMTargetStreamer.cpp:155
MCContext.h
llvm::ARMBuildAttrs::AllowNeonARMv8
@ AllowNeonARMv8
Definition: ARMBuildAttributes.h:146
llvm::ARMTargetStreamer::emitArch
virtual void emitArch(ARM::ArchKind Arch)
Definition: ARMTargetStreamer.cpp:112
MCSubtargetInfo.h
llvm::ARMBuildAttrs::RealTimeProfile
@ RealTimeProfile
Definition: ARMBuildAttributes.h:113
llvm::ARMBuildAttrs::v8_M_Main
@ v8_M_Main
Definition: ARMBuildAttributes.h:106
llvm::MCTargetStreamer
Target specific streamer interface.
Definition: MCStreamer.h:91
llvm::ARMBuildAttrs::AllowThumb32
@ AllowThumb32
Definition: ARMBuildAttributes.h:126
llvm::ARMBuildAttrs::Allowed
@ Allowed
Definition: ARMBuildAttributes.h:121
llvm::ARM_PROC::IE
@ IE
Definition: ARMBaseInfo.h:27
llvm::ARMTargetStreamer::emitSetFP
virtual void emitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset=0)
Definition: ARMTargetStreamer.cpp:96
llvm::ARMBuildAttrs::AllowHPFP
@ AllowHPFP
Definition: ARMBuildAttributes.h:218
ConstantPools.h
llvm::ARM::AEK_HWDIVARM
@ AEK_HWDIVARM
Definition: ARMTargetParser.h:37
llvm::ARMBuildAttrs::THUMB_ISA_use
@ THUMB_ISA_use
Definition: ARMBuildAttributes.h:42
llvm::ARMTargetStreamer::emitObjectArch
virtual void emitObjectArch(ARM::ArchKind Arch)
Definition: ARMTargetStreamer.cpp:114
Index
uint32_t Index
Definition: ELFObjHandler.cpp:84
uint64_t
llvm::MCContext::getAsmInfo
const MCAsmInfo * getAsmInfo() const
Definition: MCContext.h:423
llvm::MCTargetStreamer::Streamer
MCStreamer & Streamer
Definition: MCStreamer.h:93
llvm::ARMBuildAttrs::AllowDIVExt
@ AllowDIVExt
Definition: ARMBuildAttributes.h:233
llvm::ARMTargetStreamer::emitHandlerData
virtual void emitHandlerData()
Definition: ARMTargetStreamer.cpp:95
llvm::ARMTargetStreamer::addConstantPoolEntry
const MCExpr * addConstantPoolEntry(const MCExpr *, SMLoc Loc)
Callback used to implement the ldr= pseudo.
Definition: ARMTargetStreamer.cpp:36
llvm::MCSubtargetInfo::getCPU
StringRef getCPU() const
Definition: MCSubtargetInfo.h:108
I
#define I(x, y, z)
Definition: MD5.cpp:59
llvm::ARMBuildAttrs::MicroControllerProfile
@ MicroControllerProfile
Definition: ARMBuildAttributes.h:114
llvm::ARMBuildAttrs::AllowNeonARMv8_1a
@ AllowNeonARMv8_1a
Definition: ARMBuildAttributes.h:147
llvm::ARMTargetStreamer::switchVendor
virtual void switchVendor(StringRef Vendor)
Definition: ARMTargetStreamer.cpp:105
llvm::ARMTargetStreamer::emitThumbSet
virtual void emitThumbSet(MCSymbol *Symbol, const MCExpr *Value)
Definition: ARMTargetStreamer.cpp:119
llvm::ARMTargetStreamer::emitIntTextAttribute
virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue, StringRef StringValue="")
Definition: ARMTargetStreamer.cpp:109
llvm::MCSymbolRefExpr
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:192
llvm::ARMBuildAttrs::v6
@ v6
Definition: ARMBuildAttributes.h:95
llvm::ARMBuildAttrs::v6T2
@ v6T2
Definition: ARMBuildAttributes.h:97
MCAsmInfo.h
llvm::ARMTargetStreamer::emitPersonalityIndex
virtual void emitPersonalityIndex(unsigned Index)
Definition: ARMTargetStreamer.cpp:94
llvm::StringRef
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:58
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:136
llvm::ARMBuildAttrs::v4
@ v4
Definition: ARMBuildAttributes.h:90
llvm::ARMBuildAttrs::DIV_use
@ DIV_use
Definition: ARMBuildAttributes.h:70
uint32_t
llvm::StackOffset
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
Definition: TypeSize.h:134
S
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
Definition: README.txt:210
llvm::ARMBuildAttrs::AllowVirtualization
@ AllowVirtualization
Definition: ARMBuildAttributes.h:239
getArchForCPU
static ARMBuildAttrs::CPUArch getArchForCPU(const MCSubtargetInfo &STI)
Definition: ARMTargetStreamer.cpp:121
llvm::ARMBuildAttrs::v8_A
@ v8_A
Definition: ARMBuildAttributes.h:103
llvm::ARMBuildAttrs::MVE_arch
@ MVE_arch
Definition: ARMBuildAttributes.h:72
llvm::ARMTargetStreamer::emitTargetAttributes
void emitTargetAttributes(const MCSubtargetInfo &STI)
Emit the build attributes that only depend on the hardware that we expect.
Definition: ARMTargetStreamer.cpp:164
llvm::ARMBuildAttrs::Virtualization_use
@ Virtualization_use
Definition: ARMBuildAttributes.h:75
llvm::ARMTargetStreamer::emitTextAttribute
virtual void emitTextAttribute(unsigned Attribute, StringRef String)
Definition: ARMTargetStreamer.cpp:107
llvm::ARM::ArchKind
ArchKind
Definition: ARMTargetParser.h:104
llvm::ARMTargetStreamer::emitUnwindRaw
virtual void emitUnwindRaw(int64_t StackOffset, const SmallVectorImpl< uint8_t > &Opcodes)
Definition: ARMTargetStreamer.cpp:102
llvm::ARMBuildAttrs::v8_R
@ v8_R
Definition: ARMBuildAttributes.h:104
llvm::ARMTargetStreamer::emitMovSP
virtual void emitMovSP(unsigned Reg, int64_t Offset=0)
Definition: ARMTargetStreamer.cpp:98
llvm::ARMBuildAttrs::v5T
@ v5T
Definition: ARMBuildAttributes.h:92
llvm::ARMTargetStreamer::emitAttribute
virtual void emitAttribute(unsigned Attribute, unsigned Value)
Definition: ARMTargetStreamer.cpp:106
llvm::MCAsmInfo::isLittleEndian
bool isLittleEndian() const
True if the target is little endian.
Definition: MCAsmInfo.h:545
llvm::ARMBuildAttrs::CPU_arch
@ CPU_arch
Definition: ARMBuildAttributes.h:39
llvm::ARMBuildAttrs::v8_M_Base
@ v8_M_Base
Definition: ARMBuildAttributes.h:105
llvm::ARMTargetStreamer::~ARMTargetStreamer
~ARMTargetStreamer() override
ARMBuildAttributes.h
llvm::ARMBuildAttrs::Symbol
@ Symbol
Definition: ARMBuildAttributes.h:79
llvm::ARMTargetStreamer::emitFnStart
virtual void emitFnStart()
Definition: ARMTargetStreamer.cpp:90
llvm::LegalityPredicates::isVector
LegalityPredicate isVector(unsigned TypeIdx)
True iff the specified type index is a vector.
Definition: LegalityPredicates.cpp:73
llvm::MCStreamer::getContext
MCContext & getContext() const
Definition: MCStreamer.h:280
llvm::ARMBuildAttrs::AllowTZ
@ AllowTZ
Definition: ARMBuildAttributes.h:238
llvm::ARMBuildAttrs::v5TEJ
@ v5TEJ
Definition: ARMBuildAttributes.h:94
MCStreamer.h
llvm::ARMBuildAttrs::DSP_extension
@ DSP_extension
Definition: ARMBuildAttributes.h:71
llvm::ARMBuildAttrs::FP_HP_extension
@ FP_HP_extension
Definition: ARMBuildAttributes.h:67
llvm::ARMBuildAttrs::AllowTZVirtualization
@ AllowTZVirtualization
Definition: ARMBuildAttributes.h:240
llvm::ARMBuildAttrs::v4T
@ v4T
Definition: ARMBuildAttributes.h:91
llvm::ARMBuildAttrs::ABI_HardFP_use
@ ABI_HardFP_use
Definition: ARMBuildAttributes.h:60
llvm::ARMTargetStreamer::emitArchExtension
virtual void emitArchExtension(uint64_t ArchExt)
Definition: ARMTargetStreamer.cpp:113
llvm::ARMBuildAttrs::HardFPSinglePrecision
@ HardFPSinglePrecision
Definition: ARMBuildAttributes.h:209
llvm::ARMBuildAttrs::AllowMVEInteger
@ AllowMVEInteger
Definition: ARMBuildAttributes.h:150
llvm::MCStreamer::emitBytes
virtual void emitBytes(StringRef Data)
Emit the bytes in Data into the output.
Definition: MCStreamer.cpp:1189
llvm::SmallVectorImpl< unsigned >
llvm::ARMBuildAttrs::CPU_name
@ CPU_name
Definition: ARMBuildAttributes.h:38
llvm::ARMBuildAttrs::AllowMVEIntegerAndFloat
@ AllowMVEIntegerAndFloat
Definition: ARMBuildAttributes.h:151
llvm::ARMTargetStreamer::finishAttributeSection
virtual void finishAttributeSection()
Definition: ARMTargetStreamer.cpp:116
llvm::ARMBuildAttrs::CPUArch
CPUArch
Definition: ARMBuildAttributes.h:88
llvm::ARMTargetStreamer::emitCurrentConstantPool
void emitCurrentConstantPool()
Callback used to implement the .ltorg directive.
Definition: ARMTargetStreamer.cpp:40
llvm::ARMBuildAttrs::v6S_M
@ v6S_M
Definition: ARMBuildAttributes.h:101
MCExpr.h
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition: MCSubtargetInfo.h:75
llvm::ARMTargetStreamer::emitFPU
virtual void emitFPU(unsigned FPU)
Definition: ARMTargetStreamer.cpp:115
llvm::Value
LLVM Value Representation.
Definition: Value.h:75
llvm::ARMTargetStreamer::emitConstantPools
void emitConstantPools() override
Definition: ARMTargetStreamer.cpp:46
llvm::MCExpr
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35