Go to the documentation of this file.
37 return ConstantPools->addEntry(
Streamer, Expr, 4, Loc);
41 ConstantPools->emitForCurrentSection(
Streamer);
42 ConstantPools->clearCacheForCurrentSection(
Streamer);
62 for (
unsigned II = 0,
IE = Size; II !=
IE; II++) {
63 const unsigned I = LittleEndian ? (Size - II - 1) : II;
64 Buffer[Size - II - 1] = uint8_t(Inst >>
I * CHAR_BIT);
70 Size = (Suffix ==
'n' ? 2 : 4);
74 for (
unsigned II = 0,
IE = Size; II !=
IE; II = II + 2) {
75 const unsigned I0 = LittleEndian ? II + 0 : II + 1;
76 const unsigned I1 = LittleEndian ? II + 1 : II + 0;
77 Buffer[Size - II - 2] = uint8_t(Inst >> I0 * CHAR_BIT);
78 Buffer[Size - II - 1] = uint8_t(Inst >>
I1 * CHAR_BIT);
122 if (STI.
getCPU() ==
"xscale")
131 }
else if (STI.
hasFeature(ARM::HasV8_1MMainlineOps))
133 else if (STI.
hasFeature(ARM::HasV8MMainlineOps))
141 else if (STI.
hasFeature(ARM::HasV8MBaselineOps))
159 return (STI.
hasFeature(ARM::HasV8MBaselineOps) &&
189 }
else if (STI.
hasFeature(ARM::FeatureRClass)) {
192 }
else if (STI.
hasFeature(ARM::FeatureMClass)) {
204 }
else if (STI.
hasFeature(ARM::FeatureThumb2)) {
216 emitFPU(ARM::FK_CRYPTO_NEON_FP_ARMV8);
218 emitFPU(ARM::FK_NEON_FP_ARMV8);
231 if (STI.
hasFeature(ARM::FeatureFPARMv8_D16_SP))
236 : (STI.
hasFeature(ARM::FeatureFP64) ? ARM::FK_FPV5_D16
237 : ARM::FK_FPV5_SP_D16));
238 else if (STI.
hasFeature(ARM::FeatureVFP4_D16_SP))
241 : (STI.
hasFeature(ARM::FeatureFP64) ? ARM::FK_VFPV4_D16
242 : ARM::FK_FPV4_SP_D16));
243 else if (STI.
hasFeature(ARM::FeatureVFP3_D16_SP))
247 ? (STI.
hasFeature(ARM::FeatureFP16) ? ARM::FK_VFPV3_FP16
252 ? ARM::FK_VFPV3_D16_FP16
254 : (STI.
hasFeature(ARM::FeatureFP16) ? ARM::FK_VFPV3XD_FP16
255 : ARM::FK_VFPV3XD)));
273 else if (STI.
hasFeature(ARM::HasMVEIntegerOps))
299 else if (STI.
hasFeature(ARM::FeatureTrustZone))
301 else if (STI.
hasFeature(ARM::FeatureVirtualization))
MCStreamer & getStreamer()
virtual void emitCantUnwind()
LLVM_NODISCARD bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
This is an optimization pass for GlobalISel generic memory operations.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
virtual void emitPersonality(const MCSymbol *Personality)
Reg
All possible values of the reg field in the ModR/M byte.
ARMTargetStreamer(MCStreamer &S)
virtual void reset()
Reset any state between object emissions, i.e.
virtual void emitPad(int64_t Offset)
Common register allocation spilling lr str ldr sxth r3 ldr mla r4 can lr mov lr str ldr sxth r3 mla r4 and then merge mul and lr str ldr sxth r3 mla r4 It also increase the likelihood the store may become dead bb27 Successors according to LLVM ID Predecessors according to mbb< bb27, 0x8b0a7c0 > Note ADDri is not a two address instruction its result reg1037 is an operand of the PHI node in bb76 and its operand reg1039 is the result of the PHI node We should treat it as a two address code and make sure the ADDri is scheduled after any node that reads reg1039 Use info(i.e. register scavenger) to assign it a free register to allow reuse the collector could move the objects and invalidate the derived pointer This is bad enough in the first but safe points can crop up unpredictably **array_addr i32 n y store obj * new
Streaming machine code generation interface.
virtual void emitRegSave(const SmallVectorImpl< unsigned > &RegList, bool isVector)
virtual void AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE)
Represents a location in source code.
virtual void emitInst(uint32_t Inst, char Suffix='\0')
bool hasFeature(unsigned Feature) const
static bool isV8M(const MCSubtargetInfo &STI)
virtual void emitArch(ARM::ArchKind Arch)
Target specific streamer interface.
virtual void emitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset=0)
virtual void emitObjectArch(ARM::ArchKind Arch)
constexpr LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
const MCAsmInfo * getAsmInfo() const
virtual void emitHandlerData()
const MCExpr * addConstantPoolEntry(const MCExpr *, SMLoc Loc)
Callback used to implement the ldr= pseudo.
@ AllowMVEIntegerAndFloat
virtual void switchVendor(StringRef Vendor)
virtual void emitThumbSet(MCSymbol *Symbol, const MCExpr *Value)
virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue, StringRef StringValue="")
Represent a reference to a symbol from inside an expression.
virtual void emitPersonalityIndex(unsigned Index)
StringRef - Represent a constant reference to a string, i.e.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
StackOffset is a class to represent an offset with 2 dimensions, named fixed and scalable,...
add sub stmia L5 ldr r0 bl L_printf $stub Instead of a and a wouldn t it be better to do three moves *Return an aggregate type is even return S
static ARMBuildAttrs::CPUArch getArchForCPU(const MCSubtargetInfo &STI)
void emitTargetAttributes(const MCSubtargetInfo &STI)
Emit the build attributes that only depend on the hardware that we expect.
virtual void emitTextAttribute(unsigned Attribute, StringRef String)
virtual void emitUnwindRaw(int64_t StackOffset, const SmallVectorImpl< uint8_t > &Opcodes)
virtual void emitMovSP(unsigned Reg, int64_t Offset=0)
virtual void emitAttribute(unsigned Attribute, unsigned Value)
bool isLittleEndian() const
True if the target is little endian.
~ARMTargetStreamer() override
virtual void emitFnStart()
LegalityPredicate isVector(unsigned TypeIdx)
True iff the specified type index is a vector.
MCContext & getContext() const
virtual void emitArchExtension(uint64_t ArchExt)
virtual void emitBytes(StringRef Data)
Emit the bytes in Data into the output.
virtual void finishAttributeSection()
void emitCurrentConstantPool()
Callback used to implement the .ltorg directive.
Generic base class for all target subtargets.
virtual void emitFPU(unsigned FPU)
LLVM Value Representation.
void emitConstantPools() override
Base class for the full range of assembler expressions which are needed for parsing.