LLVM 24.0.0git
NVPTXRegisterInfo.h
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1//===- NVPTXRegisterInfo.h - NVPTX Register Information Impl ----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the NVPTX implementation of the TargetRegisterInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_NVPTX_NVPTXREGISTERINFO_H
14#define LLVM_LIB_TARGET_NVPTX_NVPTXREGISTERINFO_H
15
17
18#define GET_REGINFO_HEADER
19#include "NVPTXGenRegisterInfo.inc"
20
21namespace llvm {
23private:
24 // State for debug register mapping that can be mutated even through a const
25 // pointer so that we can get the proper dwarf register encoding during ASM
26 // emission.
27 mutable DenseMap<Register, uint64_t> DebugRegisterMap;
28
29public:
31
32 //------------------------------------------------------
33 // Pure virtual functions from TargetRegisterInfo
34 //------------------------------------------------------
35
36 // NVPTX callee saved registers
37 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
38
39 BitVector getReservedRegs(const MachineFunction &MF) const override;
40
42 unsigned FIOperandNum,
43 RegScavenger *RS = nullptr) const override;
44
45 Register getFrameRegister(const MachineFunction &MF) const override;
47
48 // Manage the DebugRegisterMap. PTX virtual registers for DebugInfo are
49 // encoded using the names used in the emitted text of the PTX assembly. This
50 // mapping must be managed during assembly emission.
51 //
52 // These are marked const because the interfaces used to access this
53 // RegisterInfo object are all const, but we need to communicate some state
54 // here, because the proper encoding for debug registers is available only
55 // temporarily during ASM emission.
56 void addToDebugRegisterMap(Register VirtReg, StringRef RegisterName) const;
57 void clearDebugRegisterMap() const;
58 int64_t getDwarfRegNum(MCRegister RegNum, bool isEH) const override;
59 int64_t getDwarfRegNumForVirtReg(Register RegNum, bool isEH) const override;
60};
61
62} // end namespace llvm
63
64#endif
IRTranslator LLVM IR MI
Wrapper class representing physical registers. Should be passed by value.
Definition MCRegister.h:41
MachineInstrBundleIterator< MachineInstr > iterator
void addToDebugRegisterMap(Register VirtReg, StringRef RegisterName) const
Register getFrameLocalRegister(const MachineFunction &MF) const
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
NVPTX Callee Saved Registers.
bool eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
int64_t getDwarfRegNum(MCRegister RegNum, bool isEH) const override
Register getFrameRegister(const MachineFunction &MF) const override
int64_t getDwarfRegNumForVirtReg(Register RegNum, bool isEH) const override
Wrapper class representing virtual and physical registers.
Definition Register.h:20
Represent a constant reference to a string, i.e.
Definition StringRef.h:56
This is an optimization pass for GlobalISel generic memory operations.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Definition MCRegister.h:21