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44 switch (
MI.getOpcode()) {
45 default:
return false;
46 case TargetOpcode::IMPLICIT_DEF:
47 case TargetOpcode::KILL:
48 case TargetOpcode::CFI_INSTRUCTION:
50 case TargetOpcode::GC_LABEL:
51 case TargetOpcode::DBG_VALUE:
52 case TargetOpcode::DBG_LABEL:
63 TII->get(TargetOpcode::PATCHABLE_FUNCTION_ENTER));
73 assert(PatchType ==
"prologue-short-redirect" &&
"Only possibility today!");
76 auto &FirstMBB = *MF.
begin();
82 auto MIB =
BuildMI(FirstMBB, FirstActualI, FirstActualI->getDebugLoc(),
83 TII->get(TargetOpcode::PATCHABLE_OP))
85 .
addImm(FirstActualI->getOpcode());
87 for (
auto &MO : FirstActualI->operands())
90 FirstActualI->eraseFromParent();
98 "Implement the 'patchable-function' attribute",
false,
false)
static bool doesNotGeneratecode(const MachineInstr &MI)
Returns true if instruction MI will not result in actual machine code instructions.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
This is an optimization pass for GlobalISel generic memory operations.
const MachineInstrBuilder & add(const MachineOperand &MO) const
virtual const TargetInstrInfo * getInstrInfo() const
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void ensureAlignment(Align A)
ensureAlignment - Make sure the function is at least A bytes aligned.
Properties which a MachineFunction may have at a given point in time.
TargetInstrInfo - Interface to description of machine instruction set.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
const HexagonInstrInfo * TII
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
MachineFunctionProperties & set(Property P)
StringRef getValueAsString() const
Return the attribute's value as a string.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Representation of each machine instruction.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
StringRef - Represent a constant reference to a string, i.e.
void initializePatchableFunctionPass(PassRegistry &)
Function & getFunction()
Return the LLVM function that this machine code represents.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.