SPIRVUtils.cpp File Reference

#include "SPIRVUtils.h"
#include "MCTargetDesc/SPIRVBaseInfo.h"
#include "SPIRV.h"
#include "SPIRVInstrInfo.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Demangle/Demangle.h"
#include "llvm/IR/IntrinsicsSPIRV.h"

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Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.

Functions
static uint32_t	llvm::convertCharsToWord (const StringRef &Str, unsigned i)
static size_t	llvm::getPaddedLen (const StringRef &Str)
void	llvm::addStringImm (const StringRef &Str, MCInst &Inst)
void	llvm::addStringImm (const StringRef &Str, MachineInstrBuilder &MIB)
void	llvm::addStringImm (const StringRef &Str, IRBuilder<> &B, std::vector< Value * > &Args)
std::string	llvm::getStringImm (const MachineInstr &MI, unsigned StartIndex)
void	llvm::addNumImm (const APInt &Imm, MachineInstrBuilder &MIB)
void	llvm::buildOpName (Register Target, const StringRef &Name, MachineIRBuilder &MIRBuilder)
static void	llvm::finishBuildOpDecorate (MachineInstrBuilder &MIB, const std::vector< uint32_t > &DecArgs, StringRef StrImm)
void	llvm::buildOpDecorate (Register Reg, MachineIRBuilder &MIRBuilder, SPIRV::Decoration::Decoration Dec, const std::vector< uint32_t > &DecArgs, StringRef StrImm)
void	llvm::buildOpDecorate (Register Reg, MachineInstr &I, const SPIRVInstrInfo &TII, SPIRV::Decoration::Decoration Dec, const std::vector< uint32_t > &DecArgs, StringRef StrImm)
unsigned	llvm::storageClassToAddressSpace (SPIRV::StorageClass::StorageClass SC)
SPIRV::StorageClass::StorageClass	llvm::addressSpaceToStorageClass (unsigned AddrSpace)
SPIRV::MemorySemantics::MemorySemantics	llvm::getMemSemanticsForStorageClass (SPIRV::StorageClass::StorageClass SC)
SPIRV::MemorySemantics::MemorySemantics	llvm::getMemSemantics (AtomicOrdering Ord)
MachineInstr *	llvm::getDefInstrMaybeConstant (Register &ConstReg, const MachineRegisterInfo *MRI)
uint64_t	llvm::getIConstVal (Register ConstReg, const MachineRegisterInfo *MRI)
bool	llvm::isSpvIntrinsic (MachineInstr &MI, Intrinsic::ID IntrinsicID)
Type *	llvm::getMDOperandAsType (const MDNode *N, unsigned I)
static bool	llvm::isPipeOrAddressSpaceCastBI (const StringRef MangledName)
static bool	llvm::isEnqueueKernelBI (const StringRef MangledName)
static bool	llvm::isKernelQueryBI (const StringRef MangledName)
static bool	llvm::isNonMangledOCLBuiltin (StringRef Name)
std::string	llvm::getOclOrSpirvBuiltinDemangledName (StringRef Name)
const Type *	llvm::getTypedPtrEltType (const Type *Ty)
static bool	llvm::hasBuiltinTypePrefix (StringRef Name)
bool	llvm::isSpecialOpaqueType (const Type *Ty)