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9 #ifndef LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
10 #define LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
71 int64_t &BitOffset)
const;
76 return contains(DAG, BitSize,
Other, OtherBitSize, BitOffset);
81 static bool computeAliasing(
const SDNode *Op0,
96 #endif // LLVM_CODEGEN_SELECTIONDAGADDRESSANALYSIS_H
Helper struct to store a base, index and offset that forms an address.
This is an optimization pass for GlobalISel generic memory operations.
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
return AArch64::GPR64RegClass contains(Reg)
BaseIndexOffset(SDValue Base, SDValue Index, bool IsIndexSignExt)
bool equalBaseIndex(const BaseIndexOffset &Other, const SelectionDAG &DAG) const
Represents one node in the SelectionDAG.
void dump(const SparseBitVector< ElementSize > &LHS, raw_ostream &out)
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
bool match(Val *V, const Pattern &P)
This class implements an extremely fast bulk output stream that can only output to a stream.
int64_t getOffset() const
bool equalBaseIndex(const BaseIndexOffset &Other, const SelectionDAG &DAG, int64_t &Off) const
bool contains(const SelectionDAG &DAG, int64_t BitSize, const BaseIndexOffset &Other, int64_t OtherBitSize) const
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
bool hasValidOffset() const
BaseIndexOffset(SDValue Base, SDValue Index, int64_t Offset, bool IsIndexSignExt)
Optional< std::vector< StOtherPiece > > Other