LLVM  13.0.0git
Macros | Typedefs | Functions | Variables
SparcDisassembler.cpp File Reference
#include "MCTargetDesc/SparcMCTargetDesc.h"
#include "TargetInfo/SparcTargetInfo.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/Support/TargetRegistry.h"
#include "SparcGenDisassemblerTables.inc"
Include dependency graph for SparcDisassembler.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "sparc-disassembler"
 

Typedefs

typedef MCDisassembler::DecodeStatus DecodeStatus
 
typedef DecodeStatus(* DecodeFunc) (MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder)
 

Functions

static MCDisassemblercreateSparcDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
 
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcDisassembler ()
 
static DecodeStatus DecodeIntRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeI64RegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeDFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeQFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeCPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeFCCRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeASRRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodePRRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeIntPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeCPPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadInt (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadIntPair (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadDFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadQFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadCP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadCPPair (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreInt (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreIntPair (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreDFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreQFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreCP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreCPPair (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeCall (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeSIMM13 (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeJMPL (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeReturn (MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeSWAP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeTRAP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus readInstruction32 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsLittleEndian)
 Read four bytes from the ArrayRef and return 32 bit word. More...
 
static DecodeStatus DecodeMem (MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder, bool isLoad, DecodeFunc DecodeRD)
 
static bool tryAddingSymbolicOperand (int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, const void *Decoder)
 

Variables

static const unsigned IntRegDecoderTable []
 
static const unsigned FPRegDecoderTable []
 
static const unsigned DFPRegDecoderTable []
 
static const unsigned QFPRegDecoderTable []
 
static const unsigned FCCRegDecoderTable []
 
static const unsigned ASRRegDecoderTable []
 
static const unsigned PRRegDecoderTable []
 
static const uint16_t IntPairDecoderTable []
 
static const unsigned CPRegDecoderTable []
 
static const uint16_t CPPairDecoderTable []
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "sparc-disassembler"

Definition at line 24 of file SparcDisassembler.cpp.

Typedef Documentation

◆ DecodeFunc

typedef DecodeStatus(* DecodeFunc) (MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder)

Definition at line 367 of file SparcDisassembler.cpp.

◆ DecodeStatus

Definition at line 26 of file SparcDisassembler.cpp.

Function Documentation

◆ createSparcDisassembler()

static MCDisassembler* createSparcDisassembler ( const Target T,
const MCSubtargetInfo STI,
MCContext Ctx 
)
static

Definition at line 43 of file SparcDisassembler.cpp.

Referenced by LLVMInitializeSparcDisassembler().

◆ DecodeASRRegsRegisterClass()

static DecodeStatus DecodeASRRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeCall()

static DecodeStatus DecodeCall ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeCPPairRegisterClass()

static DecodeStatus DecodeCPPairRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeCPRegsRegisterClass()

static DecodeStatus DecodeCPRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeDFPRegsRegisterClass()

static DecodeStatus DecodeDFPRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeFCCRegsRegisterClass()

static DecodeStatus DecodeFCCRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeFPRegsRegisterClass()

static DecodeStatus DecodeFPRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeI64RegsRegisterClass()

static DecodeStatus DecodeI64RegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeIntPairRegisterClass()

static DecodeStatus DecodeIntPairRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeIntRegsRegisterClass()

static DecodeStatus DecodeIntRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeJMPL()

static DecodeStatus DecodeJMPL ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeLoadCP()

static DecodeStatus DecodeLoadCP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 447 of file SparcDisassembler.cpp.

References llvm::Address, DecodeCPRegsRegisterClass(), and DecodeMem().

◆ DecodeLoadCPPair()

static DecodeStatus DecodeLoadCPPair ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 453 of file SparcDisassembler.cpp.

References llvm::Address, DecodeCPPairRegisterClass(), and DecodeMem().

◆ DecodeLoadDFP()

static DecodeStatus DecodeLoadDFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 435 of file SparcDisassembler.cpp.

References llvm::Address, DecodeDFPRegsRegisterClass(), and DecodeMem().

◆ DecodeLoadFP()

static DecodeStatus DecodeLoadFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 429 of file SparcDisassembler.cpp.

References llvm::Address, DecodeFPRegsRegisterClass(), and DecodeMem().

◆ DecodeLoadInt()

static DecodeStatus DecodeLoadInt ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 417 of file SparcDisassembler.cpp.

References llvm::Address, DecodeIntRegsRegisterClass(), and DecodeMem().

◆ DecodeLoadIntPair()

static DecodeStatus DecodeLoadIntPair ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 423 of file SparcDisassembler.cpp.

References llvm::Address, DecodeIntPairRegisterClass(), and DecodeMem().

◆ DecodeLoadQFP()

static DecodeStatus DecodeLoadQFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 441 of file SparcDisassembler.cpp.

References llvm::Address, DecodeMem(), and DecodeQFPRegsRegisterClass().

◆ DecodeMem()

static DecodeStatus DecodeMem ( MCInst MI,
unsigned  insn,
uint64_t  Address,
const void *  Decoder,
bool  isLoad,
DecodeFunc  DecodeRD 
)
static

◆ DecodePRRegsRegisterClass()

static DecodeStatus DecodePRRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeQFPRegsRegisterClass()

static DecodeStatus DecodeQFPRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeReturn()

static DecodeStatus DecodeReturn ( MCInst MI,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeSIMM13()

static DecodeStatus DecodeSIMM13 ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeStoreCP()

static DecodeStatus DecodeStoreCP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 489 of file SparcDisassembler.cpp.

References llvm::Address, DecodeCPRegsRegisterClass(), and DecodeMem().

◆ DecodeStoreCPPair()

static DecodeStatus DecodeStoreCPPair ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 495 of file SparcDisassembler.cpp.

References llvm::Address, DecodeCPPairRegisterClass(), and DecodeMem().

◆ DecodeStoreDFP()

static DecodeStatus DecodeStoreDFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 477 of file SparcDisassembler.cpp.

References llvm::Address, DecodeDFPRegsRegisterClass(), and DecodeMem().

◆ DecodeStoreFP()

static DecodeStatus DecodeStoreFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 471 of file SparcDisassembler.cpp.

References llvm::Address, DecodeFPRegsRegisterClass(), and DecodeMem().

◆ DecodeStoreInt()

static DecodeStatus DecodeStoreInt ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 459 of file SparcDisassembler.cpp.

References llvm::Address, DecodeIntRegsRegisterClass(), and DecodeMem().

◆ DecodeStoreIntPair()

static DecodeStatus DecodeStoreIntPair ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 465 of file SparcDisassembler.cpp.

References llvm::Address, DecodeIntPairRegisterClass(), and DecodeMem().

◆ DecodeStoreQFP()

static DecodeStatus DecodeStoreQFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 483 of file SparcDisassembler.cpp.

References llvm::Address, DecodeMem(), and DecodeQFPRegsRegisterClass().

◆ DecodeSWAP()

static DecodeStatus DecodeSWAP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

◆ DecodeTRAP()

static DecodeStatus DecodeTRAP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

◆ LLVMInitializeSparcDisassembler()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcDisassembler ( )

◆ readInstruction32()

static DecodeStatus readInstruction32 ( ArrayRef< uint8_t >  Bytes,
uint64_t  Address,
uint64_t &  Size,
uint32_t Insn,
bool  IsLittleEndian 
)
static

Read four bytes from the ArrayRef and return 32 bit word.

Definition at line 313 of file SparcDisassembler.cpp.

References llvm::MCDisassembler::Fail, llvm::Check::Size, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.

◆ tryAddingSymbolicOperand()

static bool tryAddingSymbolicOperand ( int64_t  Value,
bool  isBranch,
uint64_t  Address,
uint64_t  Offset,
uint64_t  Width,
MCInst MI,
const void *  Decoder 
)
static

Variable Documentation

◆ ASRRegDecoderTable

const unsigned ASRRegDecoderTable[]
static
Initial value:
= {
SP::Y, SP::ASR1, SP::ASR2, SP::ASR3,
SP::ASR4, SP::ASR5, SP::ASR6, SP::ASR7,
SP::ASR8, SP::ASR9, SP::ASR10, SP::ASR11,
SP::ASR12, SP::ASR13, SP::ASR14, SP::ASR15,
SP::ASR16, SP::ASR17, SP::ASR18, SP::ASR19,
SP::ASR20, SP::ASR21, SP::ASR22, SP::ASR23,
SP::ASR24, SP::ASR25, SP::ASR26, SP::ASR27,
SP::ASR28, SP::ASR29, SP::ASR30, SP::ASR31}

Definition at line 103 of file SparcDisassembler.cpp.

Referenced by DecodeASRRegsRegisterClass().

◆ CPPairDecoderTable

const uint16_t CPPairDecoderTable[]
static
Initial value:
= {
SP::C0_C1, SP::C2_C3, SP::C4_C5, SP::C6_C7,
SP::C8_C9, SP::C10_C11, SP::C12_C13, SP::C14_C15,
SP::C16_C17, SP::C18_C19, SP::C20_C21, SP::C22_C23,
SP::C24_C25, SP::C26_C27, SP::C28_C29, SP::C30_C31
}

Definition at line 138 of file SparcDisassembler.cpp.

Referenced by DecodeCPPairRegisterClass().

◆ CPRegDecoderTable

const unsigned CPRegDecoderTable[]
static
Initial value:
= {
SP::C0, SP::C1, SP::C2, SP::C3,
SP::C4, SP::C5, SP::C6, SP::C7,
SP::C8, SP::C9, SP::C10, SP::C11,
SP::C12, SP::C13, SP::C14, SP::C15,
SP::C16, SP::C17, SP::C18, SP::C19,
SP::C20, SP::C21, SP::C22, SP::C23,
SP::C24, SP::C25, SP::C26, SP::C27,
SP::C28, SP::C29, SP::C30, SP::C31
}

Definition at line 126 of file SparcDisassembler.cpp.

Referenced by DecodeCPRegsRegisterClass().

◆ DFPRegDecoderTable

const unsigned DFPRegDecoderTable[]
static
Initial value:
= {
SP::D0, SP::D16, SP::D1, SP::D17,
SP::D2, SP::D18, SP::D3, SP::D19,
SP::D4, SP::D20, SP::D5, SP::D21,
SP::D6, SP::D22, SP::D7, SP::D23,
SP::D8, SP::D24, SP::D9, SP::D25,
SP::D10, SP::D26, SP::D11, SP::D27,
SP::D12, SP::D28, SP::D13, SP::D29,
SP::D14, SP::D30, SP::D15, SP::D31 }

Definition at line 80 of file SparcDisassembler.cpp.

Referenced by DecodeDFPRegsRegisterClass().

◆ FCCRegDecoderTable

const unsigned FCCRegDecoderTable[]
static
Initial value:
= {
SP::FCC0, SP::FCC1, SP::FCC2, SP::FCC3 }

Definition at line 100 of file SparcDisassembler.cpp.

Referenced by DecodeFCCRegsRegisterClass().

◆ FPRegDecoderTable

const unsigned FPRegDecoderTable[]
static
Initial value:
= {
SP::F0, SP::F1, SP::F2, SP::F3,
SP::F4, SP::F5, SP::F6, SP::F7,
SP::F8, SP::F9, SP::F10, SP::F11,
SP::F12, SP::F13, SP::F14, SP::F15,
SP::F16, SP::F17, SP::F18, SP::F19,
SP::F20, SP::F21, SP::F22, SP::F23,
SP::F24, SP::F25, SP::F26, SP::F27,
SP::F28, SP::F29, SP::F30, SP::F31 }

Definition at line 70 of file SparcDisassembler.cpp.

Referenced by DecodeFPRegsRegisterClass().

◆ IntPairDecoderTable

const uint16_t IntPairDecoderTable[]
static
Initial value:
= {
SP::G0_G1, SP::G2_G3, SP::G4_G5, SP::G6_G7,
SP::O0_O1, SP::O2_O3, SP::O4_O5, SP::O6_O7,
SP::L0_L1, SP::L2_L3, SP::L4_L5, SP::L6_L7,
SP::I0_I1, SP::I2_I3, SP::I4_I5, SP::I6_I7,
}

Definition at line 119 of file SparcDisassembler.cpp.

Referenced by DecodeIntPairRegisterClass().

◆ IntRegDecoderTable

const unsigned IntRegDecoderTable[]
static
Initial value:
= {
SP::G0, SP::G1, SP::G2, SP::G3,
SP::G4, SP::G5, SP::G6, SP::G7,
SP::O0, SP::O1, SP::O2, SP::O3,
SP::O4, SP::O5, SP::O6, SP::O7,
SP::L0, SP::L1, SP::L2, SP::L3,
SP::I0, SP::I1, SP::I2, SP::I3,
SP::I4, SP::I5, SP::I6, SP::I7 }

Definition at line 60 of file SparcDisassembler.cpp.

Referenced by DecodeI64RegsRegisterClass(), and DecodeIntRegsRegisterClass().

◆ PRRegDecoderTable

const unsigned PRRegDecoderTable[]
static
Initial value:
= {
SP::TPC, SP::TNPC, SP::TSTATE, SP::TT, SP::TICK, SP::TBA, SP::PSTATE,
SP::TL, SP::PIL, SP::CWP, SP::CANSAVE, SP::CANRESTORE, SP::CLEANWIN,
SP::OTHERWIN, SP::WSTATE, SP::PC
}

Definition at line 113 of file SparcDisassembler.cpp.

Referenced by DecodePRRegsRegisterClass().

◆ QFPRegDecoderTable

const unsigned QFPRegDecoderTable[]
static
Initial value:
= {
SP::Q0, SP::Q8, ~0U, ~0U,
SP::Q1, SP::Q9, ~0U, ~0U,
SP::Q2, SP::Q10, ~0U, ~0U,
SP::Q3, SP::Q11, ~0U, ~0U,
SP::Q4, SP::Q12, ~0U, ~0U,
SP::Q5, SP::Q13, ~0U, ~0U,
SP::Q6, SP::Q14, ~0U, ~0U,
SP::Q7, SP::Q15, ~0U, ~0U }

Definition at line 90 of file SparcDisassembler.cpp.

Referenced by DecodeQFPRegsRegisterClass().

L5
to esp esp setne al movzbw ax esp setg cl movzbw cx cmove cx cl jne LBB1_2 esp which is much esp edx eax decl edx jle L7 L5
Definition: README.txt:656
C1
instcombine should handle this C2 when C1
Definition: README.txt:263
L2
add sub stmia L5 ldr L2
Definition: README.txt:201
L3
AMD64 Optimization Manual has some nice information about optimizing integer multiplication by a constant How much of it applies to Intel s X86 implementation There are definite trade offs to xmm0 cvttss2siq rdx jb L3 subss xmm0 rax cvttss2siq rdx xorq rdx L3
Definition: README-X86-64.txt:22
Y
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
L6
gets compiled into this on rsp movaps rsp movaps rsp movaps rsp movaps rsp movaps rsp movaps rsp movaps rsp movaps rsp movq rsp movq rsp movq rsp movq rsp movq rsp rax movq rsp rax movq rsp rsp rsp eax eax jbe LBB1_3 rcx rax movq rsp eax rsp ret ecx eax rcx movl rsp jmp LBB1_2 gcc rsp rax movq rsp rsp movq rsp rax movq rsp eax eax jb L6 rdx eax rsp ret p2align L6
Definition: README.txt:1168
L4
to esp esp setne al movzbw ax esp setg cl movzbw cx cmove cx cl jne LBB1_2 esp which is much esp edx eax decl edx jle L7 esp ret eax ja L5 L4
Definition: README.txt:662
L7
to esp esp setne al movzbw ax esp setg cl movzbw cx cmove cx cl jne LBB1_2 esp which is much esp edx eax decl edx jle L7 esp ret L7
Definition: README.txt:658