#include "MCTargetDesc/SparcMCTargetDesc.h"
#include "TargetInfo/SparcTargetInfo.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/TargetRegistry.h"
#include "SparcGenDisassemblerTables.inc"

Include dependency graph for SparcDisassembler.cpp:

Macros
#define	DEBUG_TYPE "sparc-disassembler"

Typedefs
typedef MCDisassembler::DecodeStatus	DecodeStatus

Functions
static MCDisassembler *	createSparcDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)

LLVM_EXTERNAL_VISIBILITY void	LLVMInitializeSparcDisassembler ()

static DecodeStatus	DecodeIntRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeI64RegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodePointerLikeRegClass0 (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeDFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeQFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeCoprocRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeFCCRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeASRRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodePRRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeIntPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeCoprocPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeCall (MCInst &Inst, unsigned insn, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	DecodeSIMM13 (MCInst &Inst, unsigned insn, uint64_t Address, const MCDisassembler *Decoder)

static DecodeStatus	readInstruction32 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsLittleEndian)
	Read four bytes from the ArrayRef and return 32 bit word.

static bool	tryAddingSymbolicOperand (int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, const MCDisassembler *Decoder)

Variables
static const unsigned	IntRegDecoderTable []

static const unsigned	FPRegDecoderTable []

static const unsigned	DFPRegDecoderTable []

static const unsigned	QFPRegDecoderTable []

static const unsigned	FCCRegDecoderTable []

static const unsigned	ASRRegDecoderTable []

static const unsigned	PRRegDecoderTable []

static const uint16_t	IntPairDecoderTable []

static const unsigned	CPRegDecoderTable []

static const uint16_t	CPPairDecoderTable []

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "sparc-disassembler"

Definition at line 24 of file SparcDisassembler.cpp.

Typedef Documentation

◆ DecodeStatus

typedef MCDisassembler::DecodeStatus DecodeStatus

Definition at line 26 of file SparcDisassembler.cpp.

Function Documentation

◆ createSparcDisassembler()

static MCDisassembler * createSparcDisassembler	(	const Target &	T,
		const MCSubtargetInfo &	STI,
		MCContext &	Ctx
	)

static

Definition at line 43 of file SparcDisassembler.cpp.

Referenced by LLVMInitializeSparcDisassembler().

◆ DecodeASRRegsRegisterClass()

static DecodeStatus DecodeASRRegsRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 221 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), ASRRegDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.

◆ DecodeCall()

static DecodeStatus DecodeCall	(	MCInst &	Inst,
		unsigned	insn,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 335 of file SparcDisassembler.cpp.

References llvm::MCOperand::createImm(), MI, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().

◆ DecodeCoprocPairRegisterClass()

static DecodeStatus DecodeCoprocPairRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 256 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), CPPairDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.

◆ DecodeCoprocRegsRegisterClass()

static DecodeStatus DecodeCoprocRegsRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 203 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), CPRegDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.

◆ DecodeDFPRegsRegisterClass()

static DecodeStatus DecodeDFPRegsRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 179 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DFPRegDecoderTable, llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.

◆ DecodeFCCRegsRegisterClass()

static DecodeStatus DecodeFCCRegsRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 212 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, FCCRegDecoderTable, and llvm::MCDisassembler::Success.

◆ DecodeFPRegsRegisterClass()

static DecodeStatus DecodeFPRegsRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 169 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, FPRegDecoderTable, and llvm::MCDisassembler::Success.

◆ DecodeI64RegsRegisterClass()

static DecodeStatus DecodeI64RegsRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 155 of file SparcDisassembler.cpp.

References DecodeIntRegsRegisterClass().

◆ DecodeIntPairRegisterClass()

static DecodeStatus DecodeIntPairRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 239 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, IntPairDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.

◆ DecodeIntRegsRegisterClass()

static DecodeStatus DecodeIntRegsRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 145 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, IntRegDecoderTable, and llvm::MCDisassembler::Success.

Referenced by DecodeI64RegsRegisterClass(), and DecodePointerLikeRegClass0().

◆ DecodePointerLikeRegClass0()

static DecodeStatus DecodePointerLikeRegClass0	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 163 of file SparcDisassembler.cpp.

References DecodeIntRegsRegisterClass().

◆ DecodePRRegsRegisterClass()

static DecodeStatus DecodePRRegsRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 230 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, PRRegDecoderTable, and llvm::MCDisassembler::Success.

◆ DecodeQFPRegsRegisterClass()

static DecodeStatus DecodeQFPRegsRegisterClass	(	MCInst &	Inst,
		unsigned	RegNo,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 189 of file SparcDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QFPRegDecoderTable, and llvm::MCDisassembler::Success.

◆ DecodeSIMM13()

static DecodeStatus DecodeSIMM13	(	MCInst &	Inst,
		unsigned	insn,
		uint64_t	Address,
		const MCDisassembler *	Decoder
	)

static

Definition at line 345 of file SparcDisassembler.cpp.

References llvm::MCOperand::createImm(), MI, and llvm::MCDisassembler::Success.

◆ LLVMInitializeSparcDisassembler()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcDisassembler ( )

Definition at line 50 of file SparcDisassembler.cpp.

References createSparcDisassembler(), llvm::getTheSparcelTarget(), llvm::getTheSparcTarget(), llvm::getTheSparcV9Target(), and llvm::TargetRegistry::RegisterMCDisassembler().

◆ readInstruction32()

static DecodeStatus readInstruction32	(	ArrayRef< uint8_t >	Bytes,
		uint64_t	Address,
		uint64_t &	Size,
		uint32_t &	Insn,
		bool	IsLittleEndian
	)

static

Read four bytes from the ArrayRef and return 32 bit word.

Definition at line 274 of file SparcDisassembler.cpp.

References llvm::MCDisassembler::Fail, Insn, llvm::ArrayRef< T >::size(), Size, and llvm::MCDisassembler::Success.

◆ tryAddingSymbolicOperand()

static bool tryAddingSymbolicOperand	(	int64_t	Value,
		bool	isBranch,
		uint64_t	Address,
		uint64_t	Offset,
		uint64_t	Width,
		MCInst &	MI,
		const MCDisassembler *	Decoder
	)

static

Definition at line 327 of file SparcDisassembler.cpp.

References isBranch(), MI, llvm::Offset, and llvm::MCDisassembler::tryAddingSymbolicOperand().

Referenced by DecodeCall().

Variable Documentation

◆ ASRRegDecoderTable

const unsigned ASRRegDecoderTable[]

static

Initial value:

= {
  SP::Y,     SP::ASR1,  SP::ASR2,  SP::ASR3,
  SP::ASR4,  SP::ASR5,  SP::ASR6,  SP::ASR7,
  SP::ASR8,  SP::ASR9,  SP::ASR10, SP::ASR11,
  SP::ASR12, SP::ASR13, SP::ASR14, SP::ASR15,
  SP::ASR16, SP::ASR17, SP::ASR18, SP::ASR19,
  SP::ASR20, SP::ASR21, SP::ASR22, SP::ASR23,
  SP::ASR24, SP::ASR25, SP::ASR26, SP::ASR27,
  SP::ASR28, SP::ASR29, SP::ASR30, SP::ASR31}

Definition at line 103 of file SparcDisassembler.cpp.

Referenced by DecodeASRRegsRegisterClass().

◆ CPPairDecoderTable

const uint16_t CPPairDecoderTable[]

static

Initial value:

= {
  SP::C0_C1,   SP::C2_C3,   SP::C4_C5,   SP::C6_C7,
  SP::C8_C9,   SP::C10_C11, SP::C12_C13, SP::C14_C15,
  SP::C16_C17, SP::C18_C19, SP::C20_C21, SP::C22_C23,
  SP::C24_C25, SP::C26_C27, SP::C28_C29, SP::C30_C31
}

Definition at line 138 of file SparcDisassembler.cpp.

Referenced by DecodeCoprocPairRegisterClass().

◆ CPRegDecoderTable

const unsigned CPRegDecoderTable[]

static

Initial value:

= {
  SP::C0,  SP::C1,  SP::C2,  SP::C3,
  SP::C4,  SP::C5,  SP::C6,  SP::C7,
  SP::C8,  SP::C9,  SP::C10, SP::C11,
  SP::C12, SP::C13, SP::C14, SP::C15,
  SP::C16, SP::C17, SP::C18, SP::C19,
  SP::C20, SP::C21, SP::C22, SP::C23,
  SP::C24, SP::C25, SP::C26, SP::C27,
  SP::C28, SP::C29, SP::C30, SP::C31
}

Definition at line 126 of file SparcDisassembler.cpp.

Referenced by DecodeCoprocRegsRegisterClass().

◆ DFPRegDecoderTable

const unsigned DFPRegDecoderTable[]

static

Initial value:

= {
  SP::D0,   SP::D16,  SP::D1,   SP::D17,
  SP::D2,   SP::D18,  SP::D3,   SP::D19,
  SP::D4,   SP::D20,  SP::D5,   SP::D21,
  SP::D6,   SP::D22,  SP::D7,   SP::D23,
  SP::D8,   SP::D24,  SP::D9,   SP::D25,
  SP::D10,  SP::D26,  SP::D11,  SP::D27,
  SP::D12,  SP::D28,  SP::D13,  SP::D29,
  SP::D14,  SP::D30,  SP::D15,  SP::D31 }

Definition at line 80 of file SparcDisassembler.cpp.

Referenced by DecodeDFPRegsRegisterClass().

◆ FCCRegDecoderTable

const unsigned FCCRegDecoderTable[]

static

Initial value:

= {

SP::FCC0, SP::FCC1, SP::FCC2, SP::FCC3 }

Definition at line 100 of file SparcDisassembler.cpp.

Referenced by DecodeFCCRegsRegisterClass().

◆ FPRegDecoderTable

const unsigned FPRegDecoderTable[]

static

Initial value:

= {
  SP::F0,   SP::F1,   SP::F2,   SP::F3,
  SP::F4,   SP::F5,   SP::F6,   SP::F7,
  SP::F8,   SP::F9,   SP::F10,  SP::F11,
  SP::F12,  SP::F13,  SP::F14,  SP::F15,
  SP::F16,  SP::F17,  SP::F18,  SP::F19,
  SP::F20,  SP::F21,  SP::F22,  SP::F23,
  SP::F24,  SP::F25,  SP::F26,  SP::F27,
  SP::F28,  SP::F29,  SP::F30,  SP::F31 }

Definition at line 70 of file SparcDisassembler.cpp.

Referenced by DecodeFPRegsRegisterClass().

◆ IntPairDecoderTable

const uint16_t IntPairDecoderTable[]

static

Initial value:

= {
  SP::G0_G1, SP::G2_G3, SP::G4_G5, SP::G6_G7,
  SP::O0_O1, SP::O2_O3, SP::O4_O5, SP::O6_O7,
  SP::L0_L1, SP::L2_L3, SP::L4_L5, SP::L6_L7,
  SP::I0_I1, SP::I2_I3, SP::I4_I5, SP::I6_I7,
}

Definition at line 119 of file SparcDisassembler.cpp.

Referenced by DecodeIntPairRegisterClass().

◆ IntRegDecoderTable

const unsigned IntRegDecoderTable[]

static

Initial value:

= {
  SP::G0,  SP::G1,  SP::G2,  SP::G3,
  SP::G4,  SP::G5,  SP::G6,  SP::G7,
  SP::O0,  SP::O1,  SP::O2,  SP::O3,
  SP::O4,  SP::O5,  SP::O6,  SP::O7,
  SP::L0,  SP::L1,  SP::L2,  SP::L3,
  SP::L4,  SP::L5,  SP::L6,  SP::L7,
  SP::I0,  SP::I1,  SP::I2,  SP::I3,
  SP::I4,  SP::I5,  SP::I6,  SP::I7 }

Definition at line 60 of file SparcDisassembler.cpp.

Referenced by DecodeIntRegsRegisterClass().

◆ PRRegDecoderTable

const unsigned PRRegDecoderTable[]

static

Initial value:

= {
  SP::TPC, SP::TNPC, SP::TSTATE, SP::TT, SP::TICK, SP::TBA, SP::PSTATE,
  SP::TL, SP::PIL, SP::CWP, SP::CANSAVE, SP::CANRESTORE, SP::CLEANWIN,
  SP::OTHERWIN, SP::WSTATE, SP::PC
}

Definition at line 113 of file SparcDisassembler.cpp.

Referenced by DecodePRRegsRegisterClass().

◆ QFPRegDecoderTable

const unsigned QFPRegDecoderTable[]

static

Initial value:

= {
  SP::Q0,  SP::Q8,   ~0U,  ~0U,
  SP::Q1,  SP::Q9,   ~0U,  ~0U,
  SP::Q2,  SP::Q10,  ~0U,  ~0U,
  SP::Q3,  SP::Q11,  ~0U,  ~0U,
  SP::Q4,  SP::Q12,  ~0U,  ~0U,
  SP::Q5,  SP::Q13,  ~0U,  ~0U,
  SP::Q6,  SP::Q14,  ~0U,  ~0U,
  SP::Q7,  SP::Q15,  ~0U,  ~0U }

Definition at line 90 of file SparcDisassembler.cpp.

Referenced by DecodeQFPRegsRegisterClass().

Macros

Typedefs

Functions

Variables

Macro Definition Documentation

◆ DEBUG_TYPE

Typedef Documentation

◆ DecodeStatus

Function Documentation

◆ createSparcDisassembler()

◆ DecodeASRRegsRegisterClass()

◆ DecodeCall()

◆ DecodeCoprocPairRegisterClass()

◆ DecodeCoprocRegsRegisterClass()

◆ DecodeDFPRegsRegisterClass()

◆ DecodeFCCRegsRegisterClass()

◆ DecodeFPRegsRegisterClass()

◆ DecodeI64RegsRegisterClass()

◆ DecodeIntPairRegisterClass()

◆ DecodeIntRegsRegisterClass()

◆ DecodePointerLikeRegClass0()

◆ DecodePRRegsRegisterClass()

◆ DecodeQFPRegsRegisterClass()

◆ DecodeSIMM13()

◆ LLVMInitializeSparcDisassembler()

◆ readInstruction32()

◆ tryAddingSymbolicOperand()

Variable Documentation

◆ ASRRegDecoderTable

◆ CPPairDecoderTable

◆ CPRegDecoderTable

◆ DFPRegDecoderTable

◆ FCCRegDecoderTable

◆ FPRegDecoderTable

◆ IntPairDecoderTable

◆ IntRegDecoderTable

◆ PRRegDecoderTable

◆ QFPRegDecoderTable