Enumerations
enum	{ InstFormatPseudo = 0 , InstFormatR = 1 , InstFormatR4 = 2 , InstFormatI = 3 , InstFormatS = 4 , InstFormatB = 5 , InstFormatU = 6 , InstFormatJ = 7 , InstFormatCR = 8 , InstFormatCI = 9 , InstFormatCSS = 10 , InstFormatCIW = 11 , InstFormatCL = 12 , InstFormatCS = 13 , InstFormatCA = 14 , InstFormatCB = 15 , InstFormatCJ = 16 , InstFormatCU = 17 , InstFormatCLB = 18 , InstFormatCLH = 19 , InstFormatCSB = 20 , InstFormatCSH = 21 , InstFormatQC_EAI = 22 , InstFormatQC_EI = 23 , InstFormatQC_EB = 24 , InstFormatQC_EJ = 25 , InstFormatQC_ES = 26 , InstFormatNDS_BRANCH_10 = 27 , InstFormatOther = 31 , InstFormatMask = 31 , InstFormatShift = 0 , RVVConstraintShift = InstFormatShift + 5 , VS2Constraint = 0b001 << RVVConstraintShift , VS1Constraint = 0b010 << RVVConstraintShift , VMConstraint = 0b100 << RVVConstraintShift , RVVConstraintMask = 0b111 << RVVConstraintShift , VLMulShift = RVVConstraintShift + 3 , VLMulMask = 0b111 << VLMulShift , IsTiedPseudoShift = VLMulShift + 3 , IsTiedPseudoMask = 1 << IsTiedPseudoShift , HasSEWOpShift = IsTiedPseudoShift + 1 , HasSEWOpMask = 1 << HasSEWOpShift , HasVLOpShift = HasSEWOpShift + 1 , HasVLOpMask = 1 << HasVLOpShift , HasVecPolicyOpShift = HasVLOpShift + 1 , HasVecPolicyOpMask = 1 << HasVecPolicyOpShift , IsRVVWideningReductionShift = HasVecPolicyOpShift + 1 , IsRVVWideningReductionMask = 1 << IsRVVWideningReductionShift , UsesMaskPolicyShift = IsRVVWideningReductionShift + 1 , UsesMaskPolicyMask = 1 << UsesMaskPolicyShift , IsSignExtendingOpWShift = UsesMaskPolicyShift + 1 , IsSignExtendingOpWMask = 1ULL << IsSignExtendingOpWShift , HasRoundModeOpShift = IsSignExtendingOpWShift + 1 , HasRoundModeOpMask = 1 << HasRoundModeOpShift , UsesVXRMShift = HasRoundModeOpShift + 1 , UsesVXRMMask = 1 << UsesVXRMShift , TargetOverlapConstraintTypeShift = UsesVXRMShift + 1 , TargetOverlapConstraintTypeMask = 3ULL << TargetOverlapConstraintTypeShift , ElementsDependOnVLShift = TargetOverlapConstraintTypeShift + 2 , ElementsDependOnVLMask = 1ULL << ElementsDependOnVLShift , ElementsDependOnMaskShift = ElementsDependOnVLShift + 1 , ElementsDependOnMaskMask = 1ULL << ElementsDependOnMaskShift , DestEEWShift = ElementsDependOnMaskShift + 1 , DestEEWMask = 3ULL << DestEEWShift , ReadsPastVLShift = DestEEWShift + 2 , ReadsPastVLMask = 1ULL << ReadsPastVLShift , AltFmtTypeShift = ReadsPastVLShift + 1 , AltFmtTypeMask = 3ULL << AltFmtTypeShift , HasTWidenOpShift = AltFmtTypeShift + 2 , HasTWidenOpMask = 1ULL << HasTWidenOpShift , HasTMOpShift = HasTWidenOpShift + 1 , HasTMOpMask = 1ULL << HasTMOpShift , HasTKOpShift = HasTMOpShift + 1 , HasTKOpMask = 1ULL << HasTKOpShift }
enum class	AltFmtType { DontCare , NotAltFmt , AltFmt }
enum	{ MO_None = 0 , MO_CALL = 1 , MO_LO = 3 , MO_HI = 4 , MO_PCREL_LO = 5 , MO_PCREL_HI = 6 , MO_GOT_HI = 7 , MO_TPREL_LO = 8 , MO_TPREL_HI = 9 , MO_TPREL_ADD = 10 , MO_TLS_GOT_HI = 11 , MO_TLS_GD_HI = 12 , MO_TLSDESC_HI = 13 , MO_TLSDESC_LOAD_LO = 14 , MO_TLSDESC_ADD_LO = 15 , MO_TLSDESC_CALL = 16 , MO_DIRECT_FLAG_MASK = 31 }

Functions
static unsigned	getFormat (uint64_t TSFlags)
static RISCVVType::VLMUL	getLMul (uint64_t TSFlags)
static bool	isTiedPseudo (uint64_t TSFlags)
static bool	hasSEWOp (uint64_t TSFlags)
static bool	hasVLOp (uint64_t TSFlags)
static bool	hasVecPolicyOp (uint64_t TSFlags)
static bool	isRVVWideningReduction (uint64_t TSFlags)
static bool	usesMaskPolicy (uint64_t TSFlags)
static bool	hasRoundModeOp (uint64_t TSFlags)
static AltFmtType	getAltFmtType (uint64_t TSFlags)
static bool	usesVXRM (uint64_t TSFlags)
static bool	elementsDependOnVL (uint64_t TSFlags)
static bool	elementsDependOnMask (uint64_t TSFlags)
static bool	readsPastVL (uint64_t TSFlags)
static bool	hasTWidenOp (uint64_t TSFlags)
static bool	hasTMOp (uint64_t TSFlags)
static bool	hasTKOp (uint64_t TSFlags)
static unsigned	getTWidenOpNum (const MCInstrDesc &Desc)
static unsigned	getTNOpNum (const MCInstrDesc &Desc)
static unsigned	getTMOpNum (const MCInstrDesc &Desc)
static unsigned	getTKOpNum (const MCInstrDesc &Desc)
static unsigned	getVLOpNum (const MCInstrDesc &Desc)
static MCRegister	getTailExpandUseRegNo (const FeatureBitset &FeatureBits)
static unsigned	getSEWOpNum (const MCInstrDesc &Desc)
static unsigned	getVecPolicyOpNum (const MCInstrDesc &Desc)
static int	getFRMOpNum (const MCInstrDesc &Desc)
static int	getVXRMOpNum (const MCInstrDesc &Desc)
static bool	isFirstDefTiedToFirstUse (const MCInstrDesc &Desc)

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Enumerator
MO_None
MO_CALL
MO_LO
MO_HI
MO_PCREL_LO
MO_PCREL_HI
MO_GOT_HI
MO_TPREL_LO
MO_TPREL_HI
MO_TPREL_ADD
MO_TLS_GOT_HI
MO_TLS_GD_HI
MO_TLSDESC_HI
MO_TLSDESC_LOAD_LO
MO_TLSDESC_ADD_LO
MO_TLSDESC_CALL
MO_DIRECT_FLAG_MASK

Definition at line 459 of file RISCVBaseInfo.h.

◆ anonymous enum

anonymous enum

Enumerator
InstFormatPseudo
InstFormatR
InstFormatR4
InstFormatI
InstFormatS
InstFormatB
InstFormatU
InstFormatJ
InstFormatCR
InstFormatCI
InstFormatCSS
InstFormatCIW
InstFormatCL
InstFormatCS
InstFormatCA
InstFormatCB
InstFormatCJ
InstFormatCU
InstFormatCLB
InstFormatCLH
InstFormatCSB
InstFormatCSH
InstFormatQC_EAI
InstFormatQC_EI
InstFormatQC_EB
InstFormatQC_EJ
InstFormatQC_ES
InstFormatNDS_BRANCH_10
InstFormatOther
InstFormatMask
InstFormatShift
RVVConstraintShift
VS2Constraint
VS1Constraint
VMConstraint
RVVConstraintMask
VLMulShift
VLMulMask
IsTiedPseudoShift
IsTiedPseudoMask
HasSEWOpShift
HasSEWOpMask
HasVLOpShift
HasVLOpMask
HasVecPolicyOpShift
HasVecPolicyOpMask
IsRVVWideningReductionShift
IsRVVWideningReductionMask
UsesMaskPolicyShift
UsesMaskPolicyMask
IsSignExtendingOpWShift
IsSignExtendingOpWMask
HasRoundModeOpShift
HasRoundModeOpMask
UsesVXRMShift
UsesVXRMMask
TargetOverlapConstraintTypeShift
TargetOverlapConstraintTypeMask
ElementsDependOnVLShift
ElementsDependOnVLMask
ElementsDependOnMaskShift
ElementsDependOnMaskMask
DestEEWShift
DestEEWMask
ReadsPastVLShift
ReadsPastVLMask
AltFmtTypeShift
AltFmtTypeMask
HasTWidenOpShift
HasTWidenOpMask
HasTMOpShift
HasTMOpMask
HasTKOpShift
HasTKOpMask

Definition at line 149 of file RISCVBaseInfo.h.

◆ AltFmtType

enum class llvm::RISCVII::AltFmtType

strong

Enumerator
DontCare
NotAltFmt
AltFmt

Definition at line 320 of file RISCVBaseInfo.h.

Function Documentation

◆ elementsDependOnMask()

bool llvm::RISCVII::elementsDependOnMask ( uint64_t TSFlags )

inlinestatic

Returns: true if the elements in the body are affected by the mask, e.g. vredsum.vs/viota.m

Definition at line 336 of file RISCVBaseInfo.h.

References ElementsDependOnMaskMask.

◆ elementsDependOnVL()

bool llvm::RISCVII::elementsDependOnVL ( uint64_t TSFlags )

inlinestatic

Returns: true if the elements in the body are affected by VL, e.g. vslide1down.vx/vredsum.vs/viota.m

Definition at line 330 of file RISCVBaseInfo.h.

References ElementsDependOnVLMask.

◆ getAltFmtType()

AltFmtType llvm::RISCVII::getAltFmtType ( uint64_t TSFlags )

inlinestatic

Definition at line 321 of file RISCVBaseInfo.h.

References AltFmtTypeMask, and AltFmtTypeShift.

Referenced by llvm::RISCV::RISCVVSETVLIInfoAnalysis::computeInfoForInstr(), and llvm::RISCV::getDemanded().

◆ getFormat()

unsigned llvm::RISCVII::getFormat ( uint64_t TSFlags )

inlinestatic

Returns: the format of the instruction.

Definition at line 283 of file RISCVBaseInfo.h.

References InstFormatMask, and InstFormatShift.

Referenced by llvm::RISCVRegisterInfo::getFrameIndexInstrOffset(), and llvm::RISCVRegisterInfo::needsFrameBaseReg().

◆ getFRMOpNum()

int llvm::RISCVII::getFRMOpNum ( const MCInstrDesc & Desc )

inlinestatic

Returns: the index to the rounding mode immediate value if any, otherwise returns -1.

Definition at line 421 of file RISCVBaseInfo.h.

References assert(), hasRoundModeOp(), llvm::RISCVOp::OPERAND_VEC_RM, and usesVXRM().

Referenced by llvm::RISCVTargetLowering::AdjustInstrPostInstrSelection(), INITIALIZE_PASS(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ getLMul()

RISCVVType::VLMUL llvm::RISCVII::getLMul ( uint64_t TSFlags )

inlinestatic

Returns: the LMUL for the instruction.

Definition at line 287 of file RISCVBaseInfo.h.

References VLMulMask, and VLMulShift.

Referenced by llvm::RISCVVectorMaskDAGMutation::apply(), llvm::RISCV::RISCVVSETVLIInfoAnalysis::computeInfoForInstr(), emitVFROUND_NOEXCEPT_MASK(), and getEMULEqualsEEWDivSEWTimesLMUL().

◆ getSEWOpNum()

unsigned llvm::RISCVII::getSEWOpNum ( const MCInstrDesc & Desc )

inlinestatic

Definition at line 405 of file RISCVBaseInfo.h.

References assert(), hasSEWOp(), hasTWidenOp(), hasVecPolicyOp(), and llvm::Offset.

Referenced by llvm::RISCVInstrInfo::copyPhysRegVector(), emitVFROUND_NOEXCEPT_MASK(), getEMULEqualsEEWDivSEWTimesLMUL(), getFoldedOpcode(), getIntegerExtensionOperandEEW(), getOperandLog2EEW(), llvm::RISCV::getSEWOp(), INITIALIZE_PASS(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ getTailExpandUseRegNo()

MCRegister llvm::RISCVII::getTailExpandUseRegNo ( const FeatureBitset & FeatureBits )

inlinestatic

Definition at line 399 of file RISCVBaseInfo.h.

Referenced by llvm::RISCVInstrInfo::analyzeCandidate(), and cannotInsertTailCall().

◆ getTKOpNum()

unsigned llvm::RISCVII::getTKOpNum ( const MCInstrDesc & Desc )

inlinestatic

Definition at line 378 of file RISCVBaseInfo.h.

References assert(), hasTKOp(), and hasTWidenOp().

◆ getTMOpNum()

unsigned llvm::RISCVII::getTMOpNum ( const MCInstrDesc & Desc )

inlinestatic

Definition at line 369 of file RISCVBaseInfo.h.

References assert(), hasTKOp(), hasTMOp(), and hasTWidenOp().

◆ getTNOpNum()

unsigned llvm::RISCVII::getTNOpNum ( const MCInstrDesc & Desc )

inlinestatic

Definition at line 360 of file RISCVBaseInfo.h.

References assert(), hasTKOp(), hasTWidenOp(), hasVLOp(), and llvm::Offset.

Referenced by llvm::RISCV::RISCVVSETVLIInfoAnalysis::computeInfoForInstr(), and getVLOpNum().

◆ getTWidenOpNum()

unsigned llvm::RISCVII::getTWidenOpNum ( const MCInstrDesc & Desc )

inlinestatic

Definition at line 355 of file RISCVBaseInfo.h.

References assert(), and hasTWidenOp().

Referenced by llvm::RISCV::getTWidenOp().

◆ getVecPolicyOpNum()

unsigned llvm::RISCVII::getVecPolicyOpNum ( const MCInstrDesc & Desc )

inlinestatic

Definition at line 414 of file RISCVBaseInfo.h.

References assert(), and hasVecPolicyOp().

Referenced by llvm::RISCVInstrInfo::convertToThreeAddress(), llvm::RISCVInstrInfo::findCommutedOpIndices(), llvm::RISCV::getVecPolicyOp(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ getVLOpNum()

unsigned llvm::RISCVII::getVLOpNum ( const MCInstrDesc & Desc )

inlinestatic

Definition at line 384 of file RISCVBaseInfo.h.

References assert(), getTNOpNum(), hasSEWOp(), hasTWidenOp(), hasVecPolicyOp(), hasVLOp(), and llvm::Offset.

Referenced by llvm::RISCVInstrInfo::copyPhysRegVector(), llvm::RISCV::getVLOp(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ getVXRMOpNum()

int llvm::RISCVII::getVXRMOpNum ( const MCInstrDesc & Desc )

inlinestatic

Returns: the index to the rounding mode immediate value if any, otherwise returns -1.

Definition at line 436 of file RISCVBaseInfo.h.

References assert(), hasRoundModeOp(), llvm::RISCVOp::OPERAND_VEC_RM, and usesVXRM().

Referenced by INITIALIZE_PASS().

◆ hasRoundModeOp()

bool llvm::RISCVII::hasRoundModeOp ( uint64_t TSFlags )

inlinestatic

Returns: true if there is a rounding mode operand for this instruction

Definition at line 316 of file RISCVBaseInfo.h.

References HasRoundModeOpMask.

Referenced by getFRMOpNum(), getVXRMOpNum(), lowerRISCVVMachineInstrToMCInst(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ hasSEWOp()

bool llvm::RISCVII::hasSEWOp ( uint64_t TSFlags )

inlinestatic

Returns: true if there is a SEW operand for the instruction.

Definition at line 295 of file RISCVBaseInfo.h.

References HasSEWOpMask.

Referenced by llvm::RISCV::getDemanded(), getSEWOpNum(), getVLOpNum(), isConvertibleToVMV_V_V(), llvm::RISCV::isMaskRegOp(), lowerRISCVVMachineInstrToMCInst(), vectorPseudoHasAllNBitUsers(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ hasTKOp()

bool llvm::RISCVII::hasTKOp ( uint64_t TSFlags )

inlinestatic

Definition at line 353 of file RISCVBaseInfo.h.

References HasTKOpMask.

Referenced by getTKOpNum(), getTMOpNum(), getTNOpNum(), and lowerRISCVVMachineInstrToMCInst().

◆ hasTMOp()

bool llvm::RISCVII::hasTMOp ( uint64_t TSFlags )

inlinestatic

Definition at line 351 of file RISCVBaseInfo.h.

References HasTMOpMask.

Referenced by getTMOpNum(), and lowerRISCVVMachineInstrToMCInst().

◆ hasTWidenOp()

bool llvm::RISCVII::hasTWidenOp ( uint64_t TSFlags )

inlinestatic

Definition at line 347 of file RISCVBaseInfo.h.

References HasTWidenOpMask.

Referenced by llvm::RISCV::RISCVVSETVLIInfoAnalysis::computeInfoForInstr(), llvm::RISCV::getDemanded(), getSEWOpNum(), getTKOpNum(), getTMOpNum(), getTNOpNum(), getTWidenOpNum(), getVLOpNum(), and lowerRISCVVMachineInstrToMCInst().

◆ hasVecPolicyOp()

bool llvm::RISCVII::hasVecPolicyOp ( uint64_t TSFlags )

inlinestatic

Returns: true if there is a vector policy operand for this instruction.

Definition at line 303 of file RISCVBaseInfo.h.

References HasVecPolicyOpMask.

Referenced by llvm::RISCV::RISCVVSETVLIInfoAnalysis::computeInfoForInstr(), llvm::RISCVInstrInfo::convertToThreeAddress(), llvm::RISCVInstrInfo::findCommutedOpIndices(), getSEWOpNum(), getVecPolicyOpNum(), getVLOpNum(), lowerRISCVVMachineInstrToMCInst(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ hasVLOp()

bool llvm::RISCVII::hasVLOp ( uint64_t TSFlags )

inlinestatic

Returns: true if there is a VL operand for the instruction.

Definition at line 299 of file RISCVBaseInfo.h.

References HasVLOpMask.

Referenced by llvm::RISCV::RISCVVSETVLIInfoAnalysis::computeInfoForInstr(), llvm::RISCV::getDemanded(), getTNOpNum(), getVLOpNum(), isConvertibleToVMV_V_V(), lowerRISCVVMachineInstrToMCInst(), vectorPseudoHasAllNBitUsers(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().

◆ isFirstDefTiedToFirstUse()

bool llvm::RISCVII::isFirstDefTiedToFirstUse ( const MCInstrDesc & Desc )

inlinestatic

Definition at line 453 of file RISCVBaseInfo.h.

References llvm::MCOI::TIED_TO.

Referenced by getOperandLog2EEW().

◆ isRVVWideningReduction()

bool llvm::RISCVII::isRVVWideningReduction ( uint64_t TSFlags )

inlinestatic

Returns: true if it is a vector widening reduction instruction.

Definition at line 307 of file RISCVBaseInfo.h.

References IsRVVWideningReductionMask.

Referenced by isConvertibleToVMV_V_V().

◆ isTiedPseudo()

bool llvm::RISCVII::isTiedPseudo ( uint64_t TSFlags )

inlinestatic

Returns: true if this a _TIED pseudo.

Definition at line 291 of file RISCVBaseInfo.h.

References IsTiedPseudoMask.

Referenced by getOperandLog2EEW(), and lowerRISCVVMachineInstrToMCInst().

◆ readsPastVL()

bool llvm::RISCVII::readsPastVL ( uint64_t TSFlags )

inlinestatic

Returns: true if the instruction may read elements past VL, e.g. vslidedown/vrgather

Definition at line 342 of file RISCVBaseInfo.h.

References ReadsPastVLMask.

◆ usesMaskPolicy()

bool llvm::RISCVII::usesMaskPolicy ( uint64_t TSFlags )

inlinestatic

Returns: true if mask policy is valid for the instruction.

Definition at line 311 of file RISCVBaseInfo.h.

References UsesMaskPolicyMask.

Referenced by llvm::RISCV::RISCVVSETVLIInfoAnalysis::computeInfoForInstr(), and llvm::RISCV::getDemanded().

◆ usesVXRM()

bool llvm::RISCVII::usesVXRM ( uint64_t TSFlags )

inlinestatic

Returns: true if this instruction uses vxrm

Definition at line 326 of file RISCVBaseInfo.h.

References UsesVXRMMask.

Referenced by llvm::RISCVInstrInfo::createMIROperandComment(), getFRMOpNum(), getVXRMOpNum(), and llvm::RISCVInstrInfo::verifyInstruction().

Enumerations

Functions

Enumeration Type Documentation

◆ anonymous enum

◆ anonymous enum

◆ AltFmtType

Function Documentation

◆ elementsDependOnMask()

◆ elementsDependOnVL()

◆ getAltFmtType()

◆ getFormat()

◆ getFRMOpNum()

◆ getLMul()

◆ getSEWOpNum()

◆ getTailExpandUseRegNo()

◆ getTKOpNum()

◆ getTMOpNum()

◆ getTNOpNum()

◆ getTWidenOpNum()

◆ getVecPolicyOpNum()

◆ getVLOpNum()

◆ getVXRMOpNum()

◆ hasRoundModeOp()

◆ hasSEWOp()

◆ hasTKOp()

◆ hasTMOp()

◆ hasTWidenOp()

◆ hasVecPolicyOp()

◆ hasVLOp()

◆ isFirstDefTiedToFirstUse()

◆ isRVVWideningReduction()

◆ isTiedPseudo()

◆ readsPastVL()

◆ usesMaskPolicy()

◆ usesVXRM()