LLVM 18.0.0git
RISCVInsertReadWriteCSR.cpp
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1//===-- RISCVInsertReadWriteCSR.cpp - Insert Read/Write of RISC-V CSR -----===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8// This file implements the machine function pass to insert read/write of CSR-s
9// of the RISC-V instructions.
10//
11// Currently the pass implements:
12// -Writing and saving frm before an RVV floating-point instruction with a
13// static rounding mode and restores the value after.
14//
15//===----------------------------------------------------------------------===//
16
18#include "RISCV.h"
19#include "RISCVSubtarget.h"
21using namespace llvm;
22
23#define DEBUG_TYPE "riscv-insert-read-write-csr"
24#define RISCV_INSERT_READ_WRITE_CSR_NAME "RISC-V Insert Read/Write CSR Pass"
25
26namespace {
27
28class RISCVInsertReadWriteCSR : public MachineFunctionPass {
29 const TargetInstrInfo *TII;
30
31public:
32 static char ID;
33
34 RISCVInsertReadWriteCSR() : MachineFunctionPass(ID) {
36 }
37
38 bool runOnMachineFunction(MachineFunction &MF) override;
39
40 void getAnalysisUsage(AnalysisUsage &AU) const override {
41 AU.setPreservesCFG();
43 }
44
45 StringRef getPassName() const override {
47 }
48
49private:
50 bool emitWriteRoundingMode(MachineBasicBlock &MBB);
51};
52
53} // end anonymous namespace
54
55char RISCVInsertReadWriteCSR::ID = 0;
56
57INITIALIZE_PASS(RISCVInsertReadWriteCSR, DEBUG_TYPE,
59
60// This function also swaps frm and restores it when encountering an RVV
61// floating point instruction with a static rounding mode.
62bool RISCVInsertReadWriteCSR::emitWriteRoundingMode(MachineBasicBlock &MBB) {
63 bool Changed = false;
64 for (MachineInstr &MI : MBB) {
65 int FRMIdx = RISCVII::getFRMOpNum(MI.getDesc());
66 if (FRMIdx < 0)
67 continue;
68
69 unsigned FRMImm = MI.getOperand(FRMIdx).getImm();
70
71 // The value is a hint to this pass to not alter the frm value.
72 if (FRMImm == RISCVFPRndMode::DYN)
73 continue;
74
75 Changed = true;
76
77 // Save
79 Register SavedFRM = MRI->createVirtualRegister(&RISCV::GPRRegClass);
80 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(RISCV::SwapFRMImm),
81 SavedFRM)
82 .addImm(FRMImm);
83 MI.addOperand(MachineOperand::CreateReg(RISCV::FRM, /*IsDef*/ false,
84 /*IsImp*/ true));
85 // Restore
87 BuildMI(*MBB.getParent(), {}, TII->get(RISCV::WriteFRM))
88 .addReg(SavedFRM);
89 MBB.insertAfter(MI, MIB);
90 }
91 return Changed;
92}
93
94bool RISCVInsertReadWriteCSR::runOnMachineFunction(MachineFunction &MF) {
95 // Skip if the vector extension is not enabled.
97 if (!ST.hasVInstructions())
98 return false;
99
100 TII = ST.getInstrInfo();
101
102 bool Changed = false;
103
104 for (MachineBasicBlock &MBB : MF)
105 Changed |= emitWriteRoundingMode(MBB);
106
107 return Changed;
108}
109
111 return new RISCVInsertReadWriteCSR();
112}
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock & MBB
const HexagonInstrInfo * TII
IRTranslator LLVM IR MI
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:38
#define RISCV_INSERT_READ_WRITE_CSR_NAME
#define DEBUG_TYPE
Represent the analysis usage information of a pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:269
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
iterator insertAfter(iterator I, MachineInstr *MI)
Insert MI into the instruction list after I.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
Representation of each machine instruction.
Definition: MachineInstr.h:68
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
TargetInstrInfo - Interface to description of machine instruction set.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
static int getFRMOpNum(const MCInstrDesc &Desc)
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
FunctionPass * createRISCVInsertReadWriteCSRPass()
void initializeRISCVInsertReadWriteCSRPass(PassRegistry &)