LLVM  14.0.0git
Functions | Variables
ARMCallingConv.cpp File Reference
#include "ARM.h"
#include "ARMCallingConv.h"
#include "ARMSubtarget.h"
#include "ARMRegisterInfo.h"
#include "ARMGenCallingConv.inc"
Include dependency graph for ARMCallingConv.cpp:

Go to the source code of this file.

Functions

static bool f64AssignAPCS (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, CCState &State, bool CanFail)
 
static bool CC_ARM_APCS_Custom_f64 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
 
static bool f64AssignAAPCS (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, CCState &State, bool CanFail)
 
static bool CC_ARM_AAPCS_Custom_f64 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
 
static bool f64RetAssign (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, CCState &State)
 
static bool RetCC_ARM_APCS_Custom_f64 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
 
static bool RetCC_ARM_AAPCS_Custom_f64 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
 
static bool CC_ARM_AAPCS_Custom_Aggregate (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
 
static bool CustomAssignInRegList (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, CCState &State, ArrayRef< MCPhysReg > RegList)
 
static bool CC_ARM_AAPCS_Custom_f16 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
 
static bool CC_ARM_AAPCS_VFP_Custom_f16 (unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
 

Variables

static const MCPhysReg RRegList [] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }
 
static const MCPhysReg SRegList []
 
static const MCPhysReg DRegList []
 
static const MCPhysReg QRegList [] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3 }
 

Function Documentation

◆ CC_ARM_AAPCS_Custom_Aggregate()

static bool CC_ARM_AAPCS_Custom_Aggregate ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState &  State 
)
static

Definition at line 169 of file ARMCallingConv.cpp.

References llvm::CCState::addLoc(), Align, llvm::alignTo(), llvm::CCState::AllocateReg(), llvm::CCState::AllocateRegBlock(), llvm::CCState::AllocateStack(), assert(), llvm::MVT::bf16, llvm::SmallVectorImpl< T >::clear(), DL, DRegList, llvm::MVT::f16, llvm::MVT::f32, llvm::MVT::f64, llvm::MachineFunction::getDataLayout(), llvm::CCState::getFirstUnallocated(), llvm::CCState::getMachineFunction(), llvm::CCState::getNextStackOffset(), llvm::ISD::ArgFlagsTy::getNonZeroMemAlign(), llvm::ISD::ArgFlagsTy::getNonZeroOrigAlign(), llvm::CCValAssign::getPending(), llvm::CCState::getPendingLocs(), llvm::MVT::getSizeInBits(), llvm::MachineFunction::getSubtarget(), llvm::MVT::i32, llvm::ISD::ArgFlagsTy::isInConsecutiveRegsLast(), llvm::ARMSubtarget::isTargetAEABI(), llvm_unreachable, llvm::min(), QRegList, Reg, RRegList, llvm::MVT::SimpleTy, llvm::Check::Size, llvm::ArrayRef< T >::size(), SRegList, llvm::MVT::v2f64, llvm::MVT::v4bf16, llvm::MVT::v4f16, llvm::MVT::v8bf16, llvm::MVT::v8f16, and llvm::Align::value().

◆ CC_ARM_AAPCS_Custom_f16()

static bool CC_ARM_AAPCS_Custom_f16 ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState &  State 
)
static

Definition at line 299 of file ARMCallingConv.cpp.

References CustomAssignInRegList(), llvm::MVT::i32, and RRegList.

◆ CC_ARM_AAPCS_Custom_f64()

static bool CC_ARM_AAPCS_Custom_f64 ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState &  State 
)
static

Definition at line 102 of file ARMCallingConv.cpp.

References f64AssignAAPCS(), and llvm::MVT::v2f64.

◆ CC_ARM_AAPCS_VFP_Custom_f16()

static bool CC_ARM_AAPCS_VFP_Custom_f16 ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState &  State 
)
static

Definition at line 307 of file ARMCallingConv.cpp.

References CustomAssignInRegList(), llvm::MVT::f32, and SRegList.

◆ CC_ARM_APCS_Custom_f64()

static bool CC_ARM_APCS_Custom_f64 ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState &  State 
)
static

Definition at line 49 of file ARMCallingConv.cpp.

References f64AssignAPCS(), and llvm::MVT::v2f64.

◆ CustomAssignInRegList()

static bool CustomAssignInRegList ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
CCState &  State,
ArrayRef< MCPhysReg >  RegList 
)
static

Definition at line 288 of file ARMCallingConv.cpp.

References llvm::CCState::addLoc(), llvm::CCState::AllocateReg(), llvm::CCValAssign::getCustomReg(), and Reg.

Referenced by CC_ARM_AAPCS_Custom_f16(), and CC_ARM_AAPCS_VFP_Custom_f16().

◆ f64AssignAAPCS()

static bool f64AssignAAPCS ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
CCState &  State,
bool  CanFail 
)
static

Definition at line 62 of file ARMCallingConv.cpp.

References llvm::CCState::addLoc(), llvm::CCState::AllocateReg(), llvm::CCState::AllocateStack(), assert(), llvm::CCValAssign::getCustomMem(), llvm::CCValAssign::getCustomReg(), GPRArgRegs, i, R2, Reg, and T.

Referenced by CC_ARM_AAPCS_Custom_f64().

◆ f64AssignAPCS()

static bool f64AssignAPCS ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
CCState &  State,
bool  CanFail 
)
static

Definition at line 21 of file ARMCallingConv.cpp.

References llvm::CCState::addLoc(), llvm::CCState::AllocateReg(), llvm::CCState::AllocateStack(), llvm::CCValAssign::getCustomMem(), llvm::CCValAssign::getCustomReg(), R2, and Reg.

Referenced by CC_ARM_APCS_Custom_f64().

◆ f64RetAssign()

static bool f64RetAssign ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
CCState &  State 
)
static

Definition at line 114 of file ARMCallingConv.cpp.

References llvm::CCState::addLoc(), llvm::CCState::AllocateReg(), llvm::CCValAssign::getCustomReg(), i, R2, and Reg.

Referenced by RetCC_ARM_APCS_Custom_f64().

◆ RetCC_ARM_AAPCS_Custom_f64()

static bool RetCC_ARM_AAPCS_Custom_f64 ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState &  State 
)
static

Definition at line 145 of file ARMCallingConv.cpp.

References RetCC_ARM_APCS_Custom_f64().

◆ RetCC_ARM_APCS_Custom_f64()

static bool RetCC_ARM_APCS_Custom_f64 ( unsigned  ValNo,
MVT  ValVT,
MVT  LocVT,
CCValAssign::LocInfo  LocInfo,
ISD::ArgFlagsTy  ArgFlags,
CCState &  State 
)
static

Definition at line 134 of file ARMCallingConv.cpp.

References f64RetAssign(), and llvm::MVT::v2f64.

Referenced by RetCC_ARM_AAPCS_Custom_f64().

Variable Documentation

◆ DRegList

const MCPhysReg DRegList[]
static
Initial value:
= { ARM::D0, ARM::D1, ARM::D2, ARM::D3,
ARM::D4, ARM::D5, ARM::D6, ARM::D7 }

Definition at line 159 of file ARMCallingConv.cpp.

Referenced by CC_ARM_AAPCS_Custom_Aggregate().

◆ QRegList

const MCPhysReg QRegList[] = { ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3 }
static

Definition at line 161 of file ARMCallingConv.cpp.

Referenced by CC_ARM_AAPCS_Custom_Aggregate().

◆ RRegList

const MCPhysReg RRegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }
static

Definition at line 153 of file ARMCallingConv.cpp.

Referenced by CC_ARM_AAPCS_Custom_Aggregate(), and CC_ARM_AAPCS_Custom_f16().

◆ SRegList

const MCPhysReg SRegList[]
static
Initial value:
= { ARM::S0, ARM::S1, ARM::S2, ARM::S3,
ARM::S4, ARM::S5, ARM::S6, ARM::S7,
ARM::S8, ARM::S9, ARM::S10, ARM::S11,
ARM::S12, ARM::S13, ARM::S14, ARM::S15 }

Definition at line 155 of file ARMCallingConv.cpp.

Referenced by CC_ARM_AAPCS_Custom_Aggregate(), and CC_ARM_AAPCS_VFP_Custom_f16().

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