LLVM 17.0.0git
CallingConvLower.h
Go to the documentation of this file.
1//===- llvm/CallingConvLower.h - Calling Conventions ------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the CCState and CCValAssign classes, used for lowering
10// and implementing calling conventions.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
15#define LLVM_CODEGEN_CALLINGCONVLOWER_H
16
20#include "llvm/IR/CallingConv.h"
22
23namespace llvm {
24
25class CCState;
26class MachineFunction;
27class MVT;
28class TargetRegisterInfo;
29
30/// CCValAssign - Represent assignment of one arg/retval to a location.
32public:
33 enum LocInfo {
34 Full, // The value fills the full location.
35 SExt, // The value is sign extended in the location.
36 ZExt, // The value is zero extended in the location.
37 AExt, // The value is extended with undefined upper bits.
38 SExtUpper, // The value is in the upper bits of the location and should be
39 // sign extended when retrieved.
40 ZExtUpper, // The value is in the upper bits of the location and should be
41 // zero extended when retrieved.
42 AExtUpper, // The value is in the upper bits of the location and should be
43 // extended with undefined upper bits when retrieved.
44 BCvt, // The value is bit-converted in the location.
45 Trunc, // The value is truncated in the location.
46 VExt, // The value is vector-widened in the location.
47 // FIXME: Not implemented yet. Code that uses AExt to mean
48 // vector-widen should be fixed to use VExt instead.
49 FPExt, // The floating-point value is fp-extended in the location.
50 Indirect // The location contains pointer to the value.
51 // TODO: a subset of the value is in the location.
52 };
53
54private:
55 // Holds one of:
56 // - the register that the value is assigned to;
57 // - the memory offset at which the value resides;
58 // - additional information about pending location; the exact interpretation
59 // of the data is target-dependent.
60 std::variant<Register, int64_t, unsigned> Data;
61
62 /// ValNo - This is the value number being assigned (e.g. an argument number).
63 unsigned ValNo;
64
65 /// isCustom - True if this arg/retval requires special handling.
66 unsigned isCustom : 1;
67
68 /// Information about how the value is assigned.
69 LocInfo HTP : 6;
70
71 /// ValVT - The type of the value being assigned.
72 MVT ValVT;
73
74 /// LocVT - The type of the location being assigned to.
75 MVT LocVT;
76
77 CCValAssign(LocInfo HTP, unsigned ValNo, MVT ValVT, MVT LocVT, bool IsCustom)
78 : ValNo(ValNo), isCustom(IsCustom), HTP(HTP), ValVT(ValVT), LocVT(LocVT) {
79 }
80
81public:
82 static CCValAssign getReg(unsigned ValNo, MVT ValVT, unsigned RegNo,
83 MVT LocVT, LocInfo HTP, bool IsCustom = false) {
84 CCValAssign Ret(HTP, ValNo, ValVT, LocVT, IsCustom);
85 Ret.Data = Register(RegNo);
86 return Ret;
87 }
88
89 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, unsigned RegNo,
90 MVT LocVT, LocInfo HTP) {
91 return getReg(ValNo, ValVT, RegNo, LocVT, HTP, /*IsCustom=*/true);
92 }
93
94 static CCValAssign getMem(unsigned ValNo, MVT ValVT, int64_t Offset,
95 MVT LocVT, LocInfo HTP, bool IsCustom = false) {
96 CCValAssign Ret(HTP, ValNo, ValVT, LocVT, IsCustom);
97 Ret.Data = Offset;
98 return Ret;
99 }
100
101 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, int64_t Offset,
102 MVT LocVT, LocInfo HTP) {
103 return getMem(ValNo, ValVT, Offset, LocVT, HTP, /*IsCustom=*/true);
104 }
105
106 static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
107 LocInfo HTP, unsigned ExtraInfo = 0) {
108 CCValAssign Ret(HTP, ValNo, ValVT, LocVT, false);
109 Ret.Data = ExtraInfo;
110 return Ret;
111 }
112
113 void convertToReg(unsigned RegNo) { Data = Register(RegNo); }
114
115 void convertToMem(int64_t Offset) { Data = Offset; }
116
117 unsigned getValNo() const { return ValNo; }
118 MVT getValVT() const { return ValVT; }
119
120 bool isRegLoc() const { return std::holds_alternative<Register>(Data); }
121 bool isMemLoc() const { return std::holds_alternative<int64_t>(Data); }
122 bool isPendingLoc() const { return std::holds_alternative<unsigned>(Data); }
123
124 bool needsCustom() const { return isCustom; }
125
126 Register getLocReg() const { return std::get<Register>(Data); }
127 int64_t getLocMemOffset() const { return std::get<int64_t>(Data); }
128 unsigned getExtraInfo() const { return std::get<unsigned>(Data); }
129
130 MVT getLocVT() const { return LocVT; }
131
132 LocInfo getLocInfo() const { return HTP; }
133 bool isExtInLoc() const {
134 return (HTP == AExt || HTP == SExt || HTP == ZExt);
135 }
136
137 bool isUpperBitsInLoc() const {
138 return HTP == AExtUpper || HTP == SExtUpper || HTP == ZExtUpper;
139 }
140};
141
142/// Describes a register that needs to be forwarded from the prologue to a
143/// musttail call.
146 : VReg(VReg), PReg(PReg), VT(VT) {}
150};
151
152/// CCAssignFn - This function assigns a location for Val, updating State to
153/// reflect the change. It returns 'true' if it failed to handle Val.
154typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
155 MVT LocVT, CCValAssign::LocInfo LocInfo,
156 ISD::ArgFlagsTy ArgFlags, CCState &State);
157
158/// CCCustomFn - This function assigns a location for Val, possibly updating
159/// all args to reflect changes and indicates if it handled it. It must set
160/// isCustom if it handles the arg and returns true.
161typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
162 MVT &LocVT, CCValAssign::LocInfo &LocInfo,
163 ISD::ArgFlagsTy &ArgFlags, CCState &State);
164
165/// CCState - This class holds information needed while lowering arguments and
166/// return values. It captures which registers are already assigned and which
167/// stack slots are used. It provides accessors to allocate these values.
168class CCState {
169private:
170 CallingConv::ID CallingConv;
171 bool IsVarArg;
172 bool AnalyzingMustTailForwardedRegs = false;
173 MachineFunction &MF;
174 const TargetRegisterInfo &TRI;
176 LLVMContext &Context;
177 // True if arguments should be allocated at negative offsets.
178 bool NegativeOffsets;
179
180 uint64_t StackSize;
181 Align MaxStackArgAlign;
183 SmallVector<CCValAssign, 4> PendingLocs;
184 SmallVector<ISD::ArgFlagsTy, 4> PendingArgFlags;
185
186 // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
187 //
188 // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
189 // tracking.
190 // Or, in another words it tracks byval parameters that are stored in
191 // general purpose registers.
192 //
193 // For 4 byte stack alignment,
194 // instance index means byval parameter number in formal
195 // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
196 // then, for function "foo":
197 //
198 // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
199 //
200 // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
201 // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
202 //
203 // In case of 8 bytes stack alignment,
204 // In function shown above, r3 would be wasted according to AAPCS rules.
205 // ByValRegs vector size still would be 2,
206 // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
207 //
208 // Supposed use-case for this collection:
209 // 1. Initially ByValRegs is empty, InRegsParamsProcessed is 0.
210 // 2. HandleByVal fills up ByValRegs.
211 // 3. Argument analysis (LowerFormatArguments, for example). After
212 // some byval argument was analyzed, InRegsParamsProcessed is increased.
213 struct ByValInfo {
214 ByValInfo(unsigned B, unsigned E) : Begin(B), End(E) {}
215
216 // First register allocated for current parameter.
217 unsigned Begin;
218
219 // First after last register allocated for current parameter.
220 unsigned End;
221 };
223
224 // InRegsParamsProcessed - shows how many instances of ByValRegs was proceed
225 // during argument analysis.
226 unsigned InRegsParamsProcessed;
227
228public:
229 CCState(CallingConv::ID CC, bool IsVarArg, MachineFunction &MF,
231 bool NegativeOffsets = false);
232
233 void addLoc(const CCValAssign &V) {
234 Locs.push_back(V);
235 }
236
237 LLVMContext &getContext() const { return Context; }
238 MachineFunction &getMachineFunction() const { return MF; }
239 CallingConv::ID getCallingConv() const { return CallingConv; }
240 bool isVarArg() const { return IsVarArg; }
241
242 /// Returns the size of the currently allocated portion of the stack.
243 uint64_t getStackSize() const { return StackSize; }
244
245 /// getAlignedCallFrameSize - Return the size of the call frame needed to
246 /// be able to store all arguments and such that the alignment requirement
247 /// of each of the arguments is satisfied.
249 return alignTo(StackSize, MaxStackArgAlign);
250 }
251
252 /// isAllocated - Return true if the specified register (or an alias) is
253 /// allocated.
255 return UsedRegs[Reg / 32] & (1 << (Reg & 31));
256 }
257
258 /// AnalyzeFormalArguments - Analyze an array of argument values,
259 /// incorporating info about the formals into this state.
261 CCAssignFn Fn);
262
263 /// The function will invoke AnalyzeFormalArguments.
265 CCAssignFn Fn) {
266 AnalyzeFormalArguments(Ins, Fn);
267 }
268
269 /// AnalyzeReturn - Analyze the returned values of a return,
270 /// incorporating info about the result values into this state.
272 CCAssignFn Fn);
273
274 /// CheckReturn - Analyze the return values of a function, returning
275 /// true if the return can be performed without sret-demotion, and
276 /// false otherwise.
278 CCAssignFn Fn);
279
280 /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
281 /// incorporating info about the passed values into this state.
283 CCAssignFn Fn);
284
285 /// AnalyzeCallOperands - Same as above except it takes vectors of types
286 /// and argument flags.
289 CCAssignFn Fn);
290
291 /// The function will invoke AnalyzeCallOperands.
293 CCAssignFn Fn) {
294 AnalyzeCallOperands(Outs, Fn);
295 }
296
297 /// AnalyzeCallResult - Analyze the return values of a call,
298 /// incorporating info about the passed values into this state.
300 CCAssignFn Fn);
301
302 /// A shadow allocated register is a register that was allocated
303 /// but wasn't added to the location list (Locs).
304 /// \returns true if the register was allocated as shadow or false otherwise.
306
307 /// AnalyzeCallResult - Same as above except it's specialized for calls which
308 /// produce a single value.
309 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
310
311 /// getFirstUnallocated - Return the index of the first unallocated register
312 /// in the set, or Regs.size() if they are all allocated.
314 for (unsigned i = 0; i < Regs.size(); ++i)
315 if (!isAllocated(Regs[i]))
316 return i;
317 return Regs.size();
318 }
319
321 assert(isAllocated(Reg) && "Trying to deallocate an unallocated register");
322 MarkUnallocated(Reg);
323 }
324
325 /// AllocateReg - Attempt to allocate one register. If it is not available,
326 /// return zero. Otherwise, return the register, marking it and any aliases
327 /// as allocated.
329 if (isAllocated(Reg))
330 return MCRegister();
331 MarkAllocated(Reg);
332 return Reg;
333 }
334
335 /// Version of AllocateReg with extra register to be shadowed.
337 if (isAllocated(Reg))
338 return MCRegister();
339 MarkAllocated(Reg);
340 MarkAllocated(ShadowReg);
341 return Reg;
342 }
343
344 /// AllocateReg - Attempt to allocate one of the specified registers. If none
345 /// are available, return zero. Otherwise, return the first one available,
346 /// marking it and any aliases as allocated.
348 unsigned FirstUnalloc = getFirstUnallocated(Regs);
349 if (FirstUnalloc == Regs.size())
350 return MCRegister(); // Didn't find the reg.
351
352 // Mark the register and any aliases as allocated.
353 MCPhysReg Reg = Regs[FirstUnalloc];
354 MarkAllocated(Reg);
355 return Reg;
356 }
357
358 /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
359 /// registers. If this is not possible, return zero. Otherwise, return the first
360 /// register of the block that were allocated, marking the entire block as allocated.
361 MCPhysReg AllocateRegBlock(ArrayRef<MCPhysReg> Regs, unsigned RegsRequired) {
362 if (RegsRequired > Regs.size())
363 return 0;
364
365 for (unsigned StartIdx = 0; StartIdx <= Regs.size() - RegsRequired;
366 ++StartIdx) {
367 bool BlockAvailable = true;
368 // Check for already-allocated regs in this block
369 for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
370 if (isAllocated(Regs[StartIdx + BlockIdx])) {
371 BlockAvailable = false;
372 break;
373 }
374 }
375 if (BlockAvailable) {
376 // Mark the entire block as allocated
377 for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
378 MarkAllocated(Regs[StartIdx + BlockIdx]);
379 }
380 return Regs[StartIdx];
381 }
382 }
383 // No block was available
384 return 0;
385 }
386
387 /// Version of AllocateReg with list of registers to be shadowed.
389 unsigned FirstUnalloc = getFirstUnallocated(Regs);
390 if (FirstUnalloc == Regs.size())
391 return MCRegister(); // Didn't find the reg.
392
393 // Mark the register and any aliases as allocated.
394 MCRegister Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
395 MarkAllocated(Reg);
396 MarkAllocated(ShadowReg);
397 return Reg;
398 }
399
400 /// AllocateStack - Allocate a chunk of stack space with the specified size
401 /// and alignment.
402 int64_t AllocateStack(unsigned Size, Align Alignment) {
403 int64_t Offset;
404 if (NegativeOffsets) {
405 StackSize = alignTo(StackSize + Size, Alignment);
406 Offset = -StackSize;
407 } else {
408 Offset = alignTo(StackSize, Alignment);
409 StackSize = Offset + Size;
410 }
411 MaxStackArgAlign = std::max(Alignment, MaxStackArgAlign);
412 ensureMaxAlignment(Alignment);
413 return Offset;
414 }
415
416 void ensureMaxAlignment(Align Alignment);
417
418 /// Version of AllocateStack with list of extra registers to be shadowed.
419 /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
420 int64_t AllocateStack(unsigned Size, Align Alignment,
421 ArrayRef<MCPhysReg> ShadowRegs) {
422 for (MCPhysReg Reg : ShadowRegs)
423 MarkAllocated(Reg);
424 return AllocateStack(Size, Alignment);
425 }
426
427 // HandleByVal - Allocate a stack slot large enough to pass an argument by
428 // value. The size and alignment information of the argument is encoded in its
429 // parameter attribute.
430 void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
431 CCValAssign::LocInfo LocInfo, int MinSize, Align MinAlign,
432 ISD::ArgFlagsTy ArgFlags);
433
434 // Returns count of byval arguments that are to be stored (even partly)
435 // in registers.
436 unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
437
438 // Returns count of byval in-regs arguments processed.
439 unsigned getInRegsParamsProcessed() const { return InRegsParamsProcessed; }
440
441 // Get information about N-th byval parameter that is stored in registers.
442 // Here "ByValParamIndex" is N.
443 void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
444 unsigned& BeginReg, unsigned& EndReg) const {
445 assert(InRegsParamRecordIndex < ByValRegs.size() &&
446 "Wrong ByVal parameter index");
447
448 const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
449 BeginReg = info.Begin;
450 EndReg = info.End;
451 }
452
453 // Add information about parameter that is kept in registers.
454 void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
455 ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
456 }
457
458 // Goes either to next byval parameter (excluding "waste" record), or
459 // to the end of collection.
460 // Returns false, if end is reached.
462 unsigned e = ByValRegs.size();
463 if (InRegsParamsProcessed < e)
464 ++InRegsParamsProcessed;
465 return InRegsParamsProcessed < e;
466 }
467
468 // Clear byval registers tracking info.
470 InRegsParamsProcessed = 0;
471 ByValRegs.clear();
472 }
473
474 // Rewind byval registers tracking info.
476 InRegsParamsProcessed = 0;
477 }
478
479 // Get list of pending assignments
481 return PendingLocs;
482 }
483
484 // Get a list of argflags for pending assignments.
486 return PendingArgFlags;
487 }
488
489 /// Compute the remaining unused register parameters that would be used for
490 /// the given value type. This is useful when varargs are passed in the
491 /// registers that normal prototyped parameters would be passed in, or for
492 /// implementing perfect forwarding.
494 CCAssignFn Fn);
495
496 /// Compute the set of registers that need to be preserved and forwarded to
497 /// any musttail calls.
500 CCAssignFn Fn);
501
502 /// Returns true if the results of the two calling conventions are compatible.
503 /// This is usually part of the check for tailcall eligibility.
504 static bool resultsCompatible(CallingConv::ID CalleeCC,
505 CallingConv::ID CallerCC, MachineFunction &MF,
506 LLVMContext &C,
508 CCAssignFn CalleeFn, CCAssignFn CallerFn);
509
510 /// The function runs an additional analysis pass over function arguments.
511 /// It will mark each argument with the attribute flag SecArgPass.
512 /// After running, it will sort the locs list.
513 template <class T>
515 CCAssignFn Fn) {
516 unsigned NumFirstPassLocs = Locs.size();
517
518 /// Creates similar argument list to \p Args in which each argument is
519 /// marked using SecArgPass flag.
520 SmallVector<T, 16> SecPassArg;
521 // SmallVector<ISD::InputArg, 16> SecPassArg;
522 for (auto Arg : Args) {
523 Arg.Flags.setSecArgPass();
524 SecPassArg.push_back(Arg);
525 }
526
527 // Run the second argument pass
528 AnalyzeArguments(SecPassArg, Fn);
529
530 // Sort the locations of the arguments according to their original position.
532 TmpArgLocs.swap(Locs);
533 auto B = TmpArgLocs.begin(), E = TmpArgLocs.end();
534 std::merge(B, B + NumFirstPassLocs, B + NumFirstPassLocs, E,
535 std::back_inserter(Locs),
536 [](const CCValAssign &A, const CCValAssign &B) -> bool {
537 return A.getValNo() < B.getValNo();
538 });
539 }
540
541private:
542 /// MarkAllocated - Mark a register and all of its aliases as allocated.
543 void MarkAllocated(MCPhysReg Reg);
544
545 void MarkUnallocated(MCPhysReg Reg);
546};
547
548} // end namespace llvm
549
550#endif // LLVM_CODEGEN_CALLINGCONVLOWER_H
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
uint64_t Size
bool End
Definition: ELF_riscv.cpp:464
lazy value info
unsigned Reg
LLVMContext & Context
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
@ Flags
Definition: TextStubV5.cpp:93
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:163
CCState - This class holds information needed while lowering arguments and return values.
void getInRegsParamInfo(unsigned InRegsParamRecordIndex, unsigned &BeginReg, unsigned &EndReg) const
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, Align MinAlign, ISD::ArgFlagsTy ArgFlags)
Allocate space on the stack large enough to pass an argument by value.
MachineFunction & getMachineFunction() const
unsigned getFirstUnallocated(ArrayRef< MCPhysReg > Regs) const
getFirstUnallocated - Return the index of the first unallocated register in the set,...
void AnalyzeArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
The function will invoke AnalyzeFormalArguments.
void analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)
Compute the set of registers that need to be preserved and forwarded to any musttail calls.
int64_t AllocateStack(unsigned Size, Align Alignment, ArrayRef< MCPhysReg > ShadowRegs)
Version of AllocateStack with list of extra registers to be shadowed.
void AnalyzeArgumentsSecondPass(const SmallVectorImpl< T > &Args, CCAssignFn Fn)
The function runs an additional analysis pass over function arguments.
static bool resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)
Returns true if the results of the two calling conventions are compatible.
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
bool IsShadowAllocatedReg(MCRegister Reg) const
A shadow allocated register is a register that was allocated but wasn't added to the location list (L...
void AnalyzeArguments(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
The function will invoke AnalyzeCallOperands.
CallingConv::ID getCallingConv() const
SmallVectorImpl< ISD::ArgFlagsTy > & getPendingArgFlags()
MCRegister AllocateReg(MCPhysReg Reg)
AllocateReg - Attempt to allocate one register.
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
CheckReturn - Analyze the return values of a function, returning true if the return can be performed ...
MCPhysReg AllocateRegBlock(ArrayRef< MCPhysReg > Regs, unsigned RegsRequired)
AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive registers.
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
LLVMContext & getContext() const
int64_t AllocateStack(unsigned Size, Align Alignment)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
void rewindByValRegsInfo()
void getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)
Compute the remaining unused register parameters that would be used for the given value type.
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeCallOperands - Analyze the outgoing arguments to a call, incorporating info about the passed v...
unsigned getInRegsParamsProcessed() const
void ensureMaxAlignment(Align Alignment)
void DeallocateReg(MCPhysReg Reg)
MCPhysReg AllocateReg(ArrayRef< MCPhysReg > Regs)
AllocateReg - Attempt to allocate one of the specified registers.
uint64_t getStackSize() const
Returns the size of the currently allocated portion of the stack.
MCRegister AllocateReg(ArrayRef< MCPhysReg > Regs, const MCPhysReg *ShadowRegs)
Version of AllocateReg with list of registers to be shadowed.
SmallVectorImpl< CCValAssign > & getPendingLocs()
bool isVarArg() const
uint64_t getAlignedCallFrameSize() const
getAlignedCallFrameSize - Return the size of the call frame needed to be able to store all arguments ...
bool isAllocated(MCRegister Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd)
MCRegister AllocateReg(MCPhysReg Reg, MCPhysReg ShadowReg)
Version of AllocateReg with extra register to be shadowed.
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
void addLoc(const CCValAssign &V)
unsigned getInRegsParamsCount() const
void clearByValRegsInfo()
CCValAssign - Represent assignment of one arg/retval to a location.
bool isRegLoc() const
static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT, LocInfo HTP, unsigned ExtraInfo=0)
Register getLocReg() const
bool isPendingLoc() const
LocInfo getLocInfo() const
bool isUpperBitsInLoc() const
static CCValAssign getMem(unsigned ValNo, MVT ValVT, int64_t Offset, MVT LocVT, LocInfo HTP, bool IsCustom=false)
static CCValAssign getReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP, bool IsCustom=false)
bool needsCustom() const
bool isMemLoc() const
static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP)
void convertToReg(unsigned RegNo)
unsigned getExtraInfo() const
bool isExtInLoc() const
int64_t getLocMemOffset() const
unsigned getValNo() const
static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, int64_t Offset, MVT LocVT, LocInfo HTP)
void convertToMem(int64_t Offset)
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24
Machine Value Type.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
size_t size() const
Definition: SmallVector.h:91
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
void swap(SmallVectorImpl &RHS)
Definition: SmallVector.h:972
void push_back(const T &Elt)
Definition: SmallVector.h:416
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1200
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:440
bool CCCustomFn(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State)
CCCustomFn - This function assigns a location for Val, possibly updating all args to reflect changes ...
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change.
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:155
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
A and B are either alignments or offsets.
Definition: MathExtras.h:407
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
Describes a register that needs to be forwarded from the prologue to a musttail call.
ForwardedRegister(Register VReg, MCPhysReg PReg, MVT VT)