LLVM
15.0.0git
lib
Target
ARM
ARMInstrInfo.h
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//===-- ARMInstrInfo.h - ARM Instruction Information ------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the ARM implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H
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#define LLVM_LIB_TARGET_ARM_ARMINSTRINFO_H
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#include "
ARMBaseInstrInfo.h
"
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#include "
ARMRegisterInfo.h
"
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namespace
llvm
{
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class
ARMSubtarget;
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class
ARMInstrInfo
:
public
ARMBaseInstrInfo
{
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ARMRegisterInfo
RI;
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public
:
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explicit
ARMInstrInfo
(
const
ARMSubtarget
&STI);
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/// Return the noop instruction to use for a noop.
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MCInst
getNop
()
const override
;
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// Return the non-pre/post incrementing version of 'Opc'. Return 0
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// if there is not such an opcode.
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unsigned
getUnindexedOpcode
(
unsigned
Opc)
const override
;
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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const
ARMRegisterInfo
&
getRegisterInfo
()
const override
{
return
RI; }
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private
:
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void
expandLoadStackGuard(
MachineBasicBlock::iterator
MI
)
const override
;
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};
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}
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#endif
MI
IRTranslator LLVM IR MI
Definition:
IRTranslator.cpp:104
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:
AddressRanges.h:17
llvm::ARMSubtarget
Definition:
ARMSubtarget.h:47
llvm::MCInst
Instances of this class represent a single low-level machine instruction.
Definition:
MCInst.h:184
llvm::ARMInstrInfo::getUnindexedOpcode
unsigned getUnindexedOpcode(unsigned Opc) const override
Definition:
ARMInstrInfo.cpp:52
llvm::ARMInstrInfo::getNop
MCInst getNop() const override
Return the noop instruction to use for a noop.
Definition:
ARMInstrInfo.cpp:34
llvm::ARMInstrInfo::ARMInstrInfo
ARMInstrInfo(const ARMSubtarget &STI)
Definition:
ARMInstrInfo.cpp:31
llvm::ARMBaseInstrInfo
Definition:
ARMBaseInstrInfo.h:37
ARMBaseInstrInfo.h
llvm::ARMRegisterInfo
Definition:
ARMRegisterInfo.h:20
ARMRegisterInfo.h
llvm::ARMInstrInfo::getRegisterInfo
const ARMRegisterInfo & getRegisterInfo() const override
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
Definition:
ARMInstrInfo.h:38
llvm::ARMInstrInfo
Definition:
ARMInstrInfo.h:22
llvm::MachineInstrBundleIterator< MachineInstr >
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