Go to the documentation of this file.
13 #ifndef LLVM_LIB_TARGET_ARM_ARMREGISTERBANKINFO_H
14 #define LLVM_LIB_TARGET_ARM_ARMREGISTERBANKINFO_H
18 #define GET_REGBANK_DECLARATIONS
19 #include "ARMGenRegisterBank.inc"
23 class TargetRegisterInfo;
26 #define GET_TARGET_REGBANK_CLASS
27 #include "ARMGenRegisterBank.inc"
This is an optimization pass for GlobalISel generic memory operations.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
unsigned const TargetRegisterInfo * TRI
This class implements the register bank concept.
Holds all the information related to register banks.
Representation of each machine instruction.
Helper class that represents how the value of an instruction may be mapped and what is the related co...
This class provides the information for the target register banks.
const InstructionMapping & getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.
ARMRegisterBankInfo(const TargetRegisterInfo &TRI)
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC, LLT) const override
Get a register bank that covers RC.