29#define DEBUG_TYPE "mccodeemitter"
40 :
MRI(mri), IsLittleEndian(IsLittleEndian) { }
41 BPFMCCodeEmitter(
const BPFMCCodeEmitter &) =
delete;
42 void operator=(
const BPFMCCodeEmitter &) =
delete;
43 ~BPFMCCodeEmitter()
override =
default;
78unsigned BPFMCCodeEmitter::getMachineOpValue(
const MCInst &
MI,
85 return static_cast<unsigned>(MO.
getImm());
93 if (
MI.getOpcode() == BPF::JAL)
96 else if (
MI.getOpcode() == BPF::LD_imm64)
107 return (Val & 0x0F) << 4 | (Val & 0xF0) >> 4;
113 unsigned Opcode =
MI.getOpcode();
117 if (Opcode == BPF::LD_imm64 || Opcode == BPF::LD_pseudo) {
129 OSE.write<uint8_t>(0);
130 OSE.write<uint8_t>(0);
152 int MemOpStartIndex = 1, Opcode =
MI.getOpcode();
153 if (Opcode == BPF::CMPXCHGW32 || Opcode == BPF::CMPXCHGD)
157 const MCOperand Op1 =
MI.getOperand(MemOpStartIndex);
158 assert(Op1.
isReg() &&
"First operand is not register.");
159 Encoding =
MRI.getEncodingValue(Op1.
getReg());
161 MCOperand Op2 =
MI.getOperand(MemOpStartIndex + 1);
162 assert(Op2.
isImm() &&
"Second operand is not immediate.");
163 Encoding |= Op2.
getImm() & 0xffff;
167#include "BPFGenMCCodeEmitter.inc"
unsigned const MachineRegisterInfo * MRI
static uint8_t SwapBits(uint8_t Val)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallVector class.
MCCodeEmitter - Generic instruction encoding interface.
MCCodeEmitter & operator=(const MCCodeEmitter &)=delete
virtual void encodeInstruction(const MCInst &Inst, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
Context object for machine code objects.
const MCRegisterInfo * getRegisterInfo() const
Base class for the full range of assembler expressions which are needed for parsing.
@ SymbolRef
References to labels and assigned expressions.
static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, SMLoc Loc=SMLoc())
Instances of this class represent a single low-level machine instruction.
Interface to description of machine instruction set.
Instances of this class represent operands of the MCInst class.
unsigned getReg() const
Returns the register number.
const MCExpr * getExpr() const
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Generic base class for all target subtargets.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
LLVM Value Representation.
This class implements an extremely fast bulk output stream that can only output to a stream.
This is an optimization pass for GlobalISel generic memory operations.
@ FK_PCRel_4
A four-byte pc relative fixup.
@ FK_PCRel_2
A two-byte pc relative fixup.
@ FK_SecRel_8
A eight-byte section relative fixup.
MCCodeEmitter * createBPFbeMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
MCCodeEmitter * createBPFMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
Adapter to write values to a stream in a particular byte order.