LLVM 17.0.0git
MSP430InstrInfo.h
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1//===-- MSP430InstrInfo.h - MSP430 Instruction Information ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the MSP430 implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H
14#define LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H
15
16#include "MSP430RegisterInfo.h"
18
19#define GET_INSTRINFO_HEADER
20#include "MSP430GenInstrInfo.inc"
21
22namespace llvm {
23
24class MSP430Subtarget;
25
27 const MSP430RegisterInfo RI;
28 virtual void anchor();
29public:
30 explicit MSP430InstrInfo(MSP430Subtarget &STI);
31
32 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
33 /// such, whenever a client has an instance of instruction info, it should
34 /// always be able to get register info as well (through this method).
35 ///
36 const MSP430RegisterInfo &getRegisterInfo() const { return RI; }
37
39 const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg,
40 bool KillSrc) const override;
41
44 bool isKill, int FrameIndex,
45 const TargetRegisterClass *RC,
47 Register VReg) const override;
50 int FrameIdx, const TargetRegisterClass *RC,
52 Register VReg) const override;
53
54 unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
55
56 // Branch folding goodness
57 bool
62 bool AllowModify) const override;
63
65 int *BytesRemoved = nullptr) const override;
68 const DebugLoc &DL,
69 int *BytesAdded = nullptr) const override;
70
71 int64_t getFramePoppedByCallee(const MachineInstr &I) const {
72 assert(isFrameInstr(I) && "Not a frame instruction");
73 assert(I.getOperand(1).getImm() >= 0 && "Size must not be negative");
74 return I.getOperand(1).getImm();
75 }
76};
77
78}
79
80#endif
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
SmallVector< MachineOperand, 4 > Cond
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned const TargetRegisterInfo * TRI
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
A debug info location.
Definition: DebugLoc.h:33
Wrapper class representing physical registers. Should be passed by value.
Definition: MCRegister.h:24
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
unsigned getInstSizeInBytes(const MachineInstr &MI) const override
GetInstSize - Return the number of bytes of code the specified instruction may be.
const MSP430RegisterInfo & getRegisterInfo() const
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
int64_t getFramePoppedByCallee(const MachineInstr &I) const
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
Representation of each machine instruction.
Definition: MachineInstr.h:68
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:577
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18