LLVM 19.0.0git
MachineSSAContext.h
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1//===- MachineSSAContext.h --------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9///
10/// This file declares a specialization of the GenericSSAContext<X>
11/// template class for Machine IR.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_CODEGEN_MACHINESSACONTEXT_H
16#define LLVM_CODEGEN_MACHINESSACONTEXT_H
17
21
22namespace llvm {
23class MachineInstr;
24class MachineFunction;
25class Register;
26
27inline unsigned succ_size(const MachineBasicBlock *BB) {
28 return BB->succ_size();
29}
30inline unsigned pred_size(const MachineBasicBlock *BB) {
31 return BB->pred_size();
32}
33inline auto instrs(const MachineBasicBlock &BB) { return BB.instrs(); }
34
35template <> struct GenericSSATraits<MachineFunction> {
42};
43
45} // namespace llvm
46
47#endif // LLVM_CODEGEN_MACHINESSACONTEXT_H
This file defines the little GenericSSAContext<X> template class that can be used to implement IR ana...
Promote Memory to Register
Definition: Mem2Reg.cpp:114
unsigned pred_size() const
unsigned succ_size() const
Representation of each machine instruction.
Definition: MachineInstr.h:68
MachineOperand class - Representation of each machine instruction operand.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
auto instrs(const MachineBasicBlock &BB)
unsigned succ_size(const MachineBasicBlock *BB)
unsigned pred_size(const MachineBasicBlock *BB)