LLVM
17.0.0git
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MachineOperand class - Representation of each machine instruction operand. More...
#include "llvm/CodeGen/MachineOperand.h"
Public Types | |
enum | MachineOperandType : unsigned char { MO_Register, MO_Immediate, MO_CImmediate, MO_FPImmediate, MO_MachineBasicBlock, MO_FrameIndex, MO_ConstantPoolIndex, MO_TargetIndex, MO_JumpTableIndex, MO_ExternalSymbol, MO_GlobalAddress, MO_BlockAddress, MO_RegisterMask, MO_RegisterLiveOut, MO_Metadata, MO_MCSymbol, MO_CFIIndex, MO_IntrinsicID, MO_Predicate, MO_ShuffleMask, MO_DbgInstrRef, MO_Last = MO_DbgInstrRef } |
Public Member Functions | |
MachineOperandType | getType () const |
getType - Returns the MachineOperandType for this operand. More... | |
unsigned | getTargetFlags () const |
void | setTargetFlags (unsigned F) |
void | addTargetFlag (unsigned F) |
MachineInstr * | getParent () |
getParent - Return the instruction that this operand belongs to. More... | |
const MachineInstr * | getParent () const |
void | clearParent () |
clearParent - Reset the parent pointer. More... | |
void | print (raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const |
Print the MachineOperand to os . More... | |
void | print (raw_ostream &os, ModuleSlotTracker &MST, LLT TypeToPrint, std::optional< unsigned > OpIdx, bool PrintDef, bool IsStandalone, bool ShouldPrintRegisterTies, unsigned TiedOperandIdx, const TargetRegisterInfo *TRI, const TargetIntrinsicInfo *IntrinsicInfo) const |
More complex way of printing a MachineOperand. More... | |
void | print (raw_ostream &os, LLT TypeToPrint, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const |
Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level type to be printed the same way the full version of print(...) does it. More... | |
void | dump () const |
bool | isReg () const |
isReg - Tests if this is a MO_Register operand. More... | |
bool | isImm () const |
isImm - Tests if this is a MO_Immediate operand. More... | |
bool | isCImm () const |
isCImm - Test if this is a MO_CImmediate operand. More... | |
bool | isFPImm () const |
isFPImm - Tests if this is a MO_FPImmediate operand. More... | |
bool | isMBB () const |
isMBB - Tests if this is a MO_MachineBasicBlock operand. More... | |
bool | isFI () const |
isFI - Tests if this is a MO_FrameIndex operand. More... | |
bool | isCPI () const |
isCPI - Tests if this is a MO_ConstantPoolIndex operand. More... | |
bool | isTargetIndex () const |
isTargetIndex - Tests if this is a MO_TargetIndex operand. More... | |
bool | isJTI () const |
isJTI - Tests if this is a MO_JumpTableIndex operand. More... | |
bool | isGlobal () const |
isGlobal - Tests if this is a MO_GlobalAddress operand. More... | |
bool | isSymbol () const |
isSymbol - Tests if this is a MO_ExternalSymbol operand. More... | |
bool | isBlockAddress () const |
isBlockAddress - Tests if this is a MO_BlockAddress operand. More... | |
bool | isRegMask () const |
isRegMask - Tests if this is a MO_RegisterMask operand. More... | |
bool | isRegLiveOut () const |
isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand. More... | |
bool | isMetadata () const |
isMetadata - Tests if this is a MO_Metadata operand. More... | |
bool | isMCSymbol () const |
bool | isDbgInstrRef () const |
bool | isCFIIndex () const |
bool | isIntrinsicID () const |
bool | isPredicate () const |
bool | isShuffleMask () const |
Register | getReg () const |
getReg - Returns the register number. More... | |
unsigned | getSubReg () const |
bool | isUse () const |
bool | isDef () const |
bool | isImplicit () const |
bool | isDead () const |
bool | isKill () const |
bool | isUndef () const |
bool | isRenamable () const |
isRenamable - Returns true if this register may be renamed, i.e. More... | |
bool | isInternalRead () const |
bool | isEarlyClobber () const |
bool | isTied () const |
bool | isDebug () const |
bool | readsReg () const |
readsReg - Returns true if this operand reads the previous value of its register. More... | |
bool | isValidExcessOperand () const |
Return true if this operand can validly be appended to an arbitrary operand list. More... | |
void | setReg (Register Reg) |
Change the register this operand corresponds to. More... | |
void | setSubReg (unsigned subReg) |
void | substVirtReg (Register Reg, unsigned SubIdx, const TargetRegisterInfo &) |
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg. More... | |
void | substPhysReg (MCRegister Reg, const TargetRegisterInfo &) |
substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account. More... | |
void | setIsUse (bool Val=true) |
void | setIsDef (bool Val=true) |
Change a def to a use, or a use to a def. More... | |
void | setImplicit (bool Val=true) |
void | setIsKill (bool Val=true) |
void | setIsDead (bool Val=true) |
void | setIsUndef (bool Val=true) |
void | setIsRenamable (bool Val=true) |
void | setIsInternalRead (bool Val=true) |
void | setIsEarlyClobber (bool Val=true) |
void | setIsDebug (bool Val=true) |
int64_t | getImm () const |
const ConstantInt * | getCImm () const |
const ConstantFP * | getFPImm () const |
MachineBasicBlock * | getMBB () const |
int | getIndex () const |
const GlobalValue * | getGlobal () const |
const BlockAddress * | getBlockAddress () const |
MCSymbol * | getMCSymbol () const |
unsigned | getInstrRefInstrIndex () const |
unsigned | getInstrRefOpIndex () const |
unsigned | getCFIIndex () const |
Intrinsic::ID | getIntrinsicID () const |
unsigned | getPredicate () const |
ArrayRef< int > | getShuffleMask () const |
int64_t | getOffset () const |
Return the offset from the symbol in this operand. More... | |
const char * | getSymbolName () const |
bool | clobbersPhysReg (MCRegister PhysReg) const |
clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg. More... | |
const uint32_t * | getRegMask () const |
getRegMask - Returns a bit mask of registers preserved by this RegMask operand. More... | |
const uint32_t * | getRegLiveOut () const |
getRegLiveOut - Returns a bit mask of live-out registers. More... | |
const MDNode * | getMetadata () const |
void | setImm (int64_t immVal) |
void | setCImm (const ConstantInt *CI) |
void | setFPImm (const ConstantFP *CFP) |
void | setOffset (int64_t Offset) |
void | setIndex (int Idx) |
void | setMetadata (const MDNode *MD) |
void | setInstrRefInstrIndex (unsigned InstrIdx) |
void | setInstrRefOpIndex (unsigned OpIdx) |
void | setMBB (MachineBasicBlock *MBB) |
void | setRegMask (const uint32_t *RegMaskPtr) |
Sets value of register mask operand referencing Mask. More... | |
void | setIntrinsicID (Intrinsic::ID IID) |
void | setPredicate (unsigned Predicate) |
bool | isIdenticalTo (const MachineOperand &Other) const |
Returns true if this operand is identical to the specified operand except for liveness related flags (isKill, isUndef and isDead). More... | |
void | ChangeToImmediate (int64_t ImmVal, unsigned TargetFlags=0) |
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value. More... | |
void | ChangeToFPImmediate (const ConstantFP *FPImm, unsigned TargetFlags=0) |
ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value. More... | |
void | ChangeToES (const char *SymName, unsigned TargetFlags=0) |
ChangeToES - Replace this operand with a new external symbol operand. More... | |
void | ChangeToGA (const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0) |
ChangeToGA - Replace this operand with a new global address operand. More... | |
void | ChangeToMCSymbol (MCSymbol *Sym, unsigned TargetFlags=0) |
ChangeToMCSymbol - Replace this operand with a new MC symbol operand. More... | |
void | ChangeToFrameIndex (int Idx, unsigned TargetFlags=0) |
Replace this operand with a frame index. More... | |
void | ChangeToTargetIndex (unsigned Idx, int64_t Offset, unsigned TargetFlags=0) |
Replace this operand with a target index. More... | |
void | ChangeToDbgInstrRef (unsigned InstrIdx, unsigned OpIdx, unsigned TargetFlags=0) |
Replace this operand with an Instruction Reference. More... | |
void | ChangeToRegister (Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false) |
ChangeToRegister - Replace this operand with a new register operand of the specified value. More... | |
const char * | getTargetIndexName () const |
getTargetIndexName - If this MachineOperand is a TargetIndex that has a name, attempt to get the name. More... | |
Static Public Member Functions | |
static void | printSubRegIdx (raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI) |
Print a subreg index operand. More... | |
static void | printTargetFlags (raw_ostream &OS, const MachineOperand &Op) |
Print operand target flags. More... | |
static void | printSymbol (raw_ostream &OS, MCSymbol &Sym) |
Print a MCSymbol as an operand. More... | |
static void | printStackObjectReference (raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name) |
Print a stack object reference. More... | |
static void | printOperandOffset (raw_ostream &OS, int64_t Offset) |
Print the offset with explicit +/- signs. More... | |
static void | printIRSlotNumber (raw_ostream &OS, int Slot) |
Print an IRSlotNumber. More... | |
static bool | clobbersPhysReg (const uint32_t *RegMask, MCRegister PhysReg) |
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg. More... | |
static unsigned | getRegMaskSize (unsigned NumRegs) |
Returns number of elements needed for a regmask array. More... | |
static MachineOperand | CreateImm (int64_t Val) |
static MachineOperand | CreateCImm (const ConstantInt *CI) |
static MachineOperand | CreateFPImm (const ConstantFP *CFP) |
static MachineOperand | CreateReg (Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false) |
static MachineOperand | CreateMBB (MachineBasicBlock *MBB, unsigned TargetFlags=0) |
static MachineOperand | CreateFI (int Idx) |
static MachineOperand | CreateCPI (unsigned Idx, int Offset, unsigned TargetFlags=0) |
static MachineOperand | CreateTargetIndex (unsigned Idx, int64_t Offset, unsigned TargetFlags=0) |
static MachineOperand | CreateJTI (unsigned Idx, unsigned TargetFlags=0) |
static MachineOperand | CreateGA (const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0) |
static MachineOperand | CreateES (const char *SymName, unsigned TargetFlags=0) |
static MachineOperand | CreateBA (const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0) |
static MachineOperand | CreateRegMask (const uint32_t *Mask) |
CreateRegMask - Creates a register mask operand referencing Mask. More... | |
static MachineOperand | CreateRegLiveOut (const uint32_t *Mask) |
static MachineOperand | CreateMetadata (const MDNode *Meta) |
static MachineOperand | CreateMCSymbol (MCSymbol *Sym, unsigned TargetFlags=0) |
static MachineOperand | CreateDbgInstrRef (unsigned InstrIdx, unsigned OpIdx) |
static MachineOperand | CreateCFIIndex (unsigned CFIIndex) |
static MachineOperand | CreateIntrinsicID (Intrinsic::ID ID) |
static MachineOperand | CreatePredicate (unsigned Pred) |
static MachineOperand | CreateShuffleMask (ArrayRef< int > Mask) |
Friends | |
class | MachineInstr |
class | MachineRegisterInfo |
struct | DenseMapInfo< MachineOperand > |
hash_code | hash_value (const MachineOperand &MO) |
MachineOperand hash_value overload. More... | |
MachineOperand class - Representation of each machine instruction operand.
This class isn't a POD type because it has a private constructor, but its destructor must be trivial. Functions like MachineInstr::addOperand(), MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on not having to call the MachineOperand destructor.
Definition at line 48 of file MachineOperand.h.
enum llvm::MachineOperand::MachineOperandType : unsigned char |
Enumerator | |
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MO_Register | Register operand. |
MO_Immediate | Immediate operand. |
MO_CImmediate | Immediate >64bit operand. |
MO_FPImmediate | Floating-point immediate operand. |
MO_MachineBasicBlock | MachineBasicBlock reference. |
MO_FrameIndex | Abstract Stack Frame Index. |
MO_ConstantPoolIndex | |
MO_TargetIndex | Target-dependent index+offset operand. |
MO_JumpTableIndex | Address of indexed Jump Table for switch. |
MO_ExternalSymbol | Name of external global symbol. |
MO_GlobalAddress | Address of a global value. |
MO_BlockAddress | Address of a basic block. |
MO_RegisterMask | Mask of preserved registers. |
MO_RegisterLiveOut | Mask of live-out registers. |
MO_Metadata | Metadata reference (for debug info) |
MO_MCSymbol | MCSymbol reference (for debug/eh info) |
MO_CFIIndex | MCCFIInstruction index. |
MO_IntrinsicID | Intrinsic ID for ISel. |
MO_Predicate | Generic predicate for ISel. |
MO_ShuffleMask | Other IR Constant for ISel (shuffle masks) |
MO_DbgInstrRef | Integer indices referring to an instruction+operand. |
MO_Last |
Definition at line 50 of file MachineOperand.h.
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Definition at line 234 of file MachineOperand.h.
References assert(), F, and isReg().
Referenced by llvm::HexagonInstrInfo::immediateExtend().
void MachineOperand::ChangeToDbgInstrRef | ( | unsigned | InstrIdx, |
unsigned | OpIdx, | ||
unsigned | TargetFlags = 0 |
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Replace this operand with an Instruction Reference.
Definition at line 239 of file MachineOperand.cpp.
References assert(), isReg(), isTied(), MO_DbgInstrRef, setInstrRefInstrIndex(), setInstrRefOpIndex(), and setTargetFlags().
void MachineOperand::ChangeToES | ( | const char * | SymName, |
unsigned | TargetFlags = 0 |
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ChangeToES - Replace this operand with a new external symbol operand.
Definition at line 178 of file MachineOperand.cpp.
References assert(), isReg(), isTied(), MO_ExternalSymbol, setOffset(), and setTargetFlags().
void MachineOperand::ChangeToFPImmediate | ( | const ConstantFP * | FPImm, |
unsigned | TargetFlags = 0 |
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ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value.
If an operand is known to be an FP immediate already, the setFPImm method should be used.
Definition at line 167 of file MachineOperand.cpp.
References assert(), isReg(), isTied(), MO_FPImmediate, and setTargetFlags().
void MachineOperand::ChangeToFrameIndex | ( | int | Idx, |
unsigned | TargetFlags = 0 |
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Replace this operand with a frame index.
Definition at line 215 of file MachineOperand.cpp.
References assert(), isReg(), isTied(), MO_FrameIndex, setIndex(), and setTargetFlags().
Referenced by swapRegAndNonRegOperand().
void MachineOperand::ChangeToGA | ( | const GlobalValue * | GV, |
int64_t | Offset, | ||
unsigned | TargetFlags = 0 |
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ChangeToGA - Replace this operand with a new global address operand.
Definition at line 191 of file MachineOperand.cpp.
References assert(), isReg(), isTied(), MO_GlobalAddress, llvm::Offset, setOffset(), and setTargetFlags().
Referenced by swapRegAndNonRegOperand().
void MachineOperand::ChangeToImmediate | ( | int64_t | ImmVal, |
unsigned | TargetFlags = 0 |
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ChangeToImmediate - Replace this operand with a new immediate operand of the specified value.
If an operand is known to be an immediate already, the setImm method should be used.
Definition at line 157 of file MachineOperand.cpp.
References assert(), isReg(), isTied(), MO_Immediate, and setTargetFlags().
Referenced by llvm::M68kRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::X86RegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIInstrInfo::FoldImmediate(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::rewriteARMFrameIndex(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), swapRegAndNonRegOperand(), and llvm::updateDbgValueForSpill().
void MachineOperand::ChangeToMCSymbol | ( | MCSymbol * | Sym, |
unsigned | TargetFlags = 0 |
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ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
Definition at line 204 of file MachineOperand.cpp.
References assert(), isReg(), isTied(), MO_MCSymbol, and setTargetFlags().
void MachineOperand::ChangeToRegister | ( | Register | Reg, |
bool | isDef, | ||
bool | isImp = false , |
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bool | isKill = false , |
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bool | isDead = false , |
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bool | isUndef = false , |
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bool | isDebug = false |
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ChangeToRegister - Replace this operand with a new register operand of the specified value.
If an operand is known to be an register already, the setReg method should be used.
Definition at line 255 of file MachineOperand.cpp.
References llvm::MachineRegisterInfo::addRegOperandToUseList(), assert(), getMFIfAvailable(), getParent(), isDead(), isDebug(), isDef(), isKill(), isReg(), isUndef(), MI, MO_Register, and llvm::MachineRegisterInfo::removeRegOperandFromUseList().
Referenced by llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::SIRegisterInfo::resolveFrameIndex(), swapRegAndNonRegOperand(), and llvm::X86InstrInfo::unfoldMemoryOperand().
void MachineOperand::ChangeToTargetIndex | ( | unsigned | Idx, |
int64_t | Offset, | ||
unsigned | TargetFlags = 0 |
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Replace this operand with a target index.
Definition at line 226 of file MachineOperand.cpp.
References assert(), isReg(), isTied(), MO_TargetIndex, llvm::Offset, setIndex(), setOffset(), and setTargetFlags().
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clearParent - Reset the parent pointer.
The MachineOperand copy constructor also copies ParentMI, expecting the original to be deleted. If a MachineOperand is ever stored outside a MachineInstr, the parent pointer must be cleared.
Never call clearParent() on an operand in a MachineInstr.
Definition at line 254 of file MachineOperand.h.
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clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
It is sometimes necessary to detach the register mask pointer from its machine operand. This static method can be used for such detached bit mask pointers.
Definition at line 643 of file MachineOperand.h.
References assert().
Referenced by llvm::LiveRegUnits::addRegsInMask(), llvm::AnalyzePhysRegInBundle(), canClobberPhysRegDefs(), canClobberReachingPhysRegUse(), CheckForLiveRegDefMasked(), clobbersAllYmmAndZmmRegs(), clobbersPhysReg(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::M68kRegisterInfo::getReservedRegs(), llvm::X86RegisterInfo::getReservedRegs(), handleRegMaskClobber(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::CallLowering::parametersInCSRMatch(), llvm::TargetLowering::parametersInCSRMatch(), llvm::PhysicalRegisterUsageInfo::print(), removeMapRegEntry(), llvm::LivePhysRegs::removeRegsInMask(), llvm::LiveRegUnits::removeRegsNotPreserved(), llvm::LivePhysRegs::stepForward(), and LiveDebugValues::MLocTracker::writeRegMask().
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clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
Definition at line 650 of file MachineOperand.h.
References clobbersPhysReg(), and getRegMask().
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Definition at line 905 of file MachineOperand.h.
References MO_BlockAddress, and llvm::Offset.
Referenced by llvm::MachineInstrBuilder::addBlockAddress().
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Definition at line 959 of file MachineOperand.h.
References MO_CFIIndex.
Referenced by llvm::MachineInstrBuilder::addCFIIndex().
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Definition at line 818 of file MachineOperand.h.
References MO_CImmediate.
Referenced by llvm::MachineInstrBuilder::addCImm(), llvm::CSEMIRBuilder::buildConstant(), GetMOForConstDbgOp(), and processSwitches().
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Definition at line 867 of file MachineOperand.h.
References MO_ConstantPoolIndex, and llvm::Offset.
Referenced by llvm::MachineInstrBuilder::addConstantPoolIndex(), and llvm::X86InstrInfo::foldMemoryOperandImpl().
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Definition at line 952 of file MachineOperand.h.
References MO_DbgInstrRef.
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Definition at line 897 of file MachineOperand.h.
References MO_ExternalSymbol.
Referenced by llvm::MachineInstrBuilder::addExternalSymbol(), llvm::createLibcall(), and llvm::createMemLibcall().
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Definition at line 862 of file MachineOperand.h.
References MO_FrameIndex.
Referenced by llvm::MachineInstrBuilder::addFrameIndex(), llvm::X86InstrInfo::foldMemoryOperandImpl(), and llvm::X86AddressMode::getFullAddress().
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Definition at line 824 of file MachineOperand.h.
References MO_FPImmediate.
Referenced by llvm::MachineInstrBuilder::addFPImm(), llvm::CSEMIRBuilder::buildFConstant(), convertImplicitDefToConstZero(), and GetMOForConstDbgOp().
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Definition at line 889 of file MachineOperand.h.
References MO_GlobalAddress, and llvm::Offset.
Referenced by llvm::MachineInstrBuilder::addGlobalAddress(), llvm::X86AddressMode::getFullAddress(), llvm::CallLowering::lowerCall(), and llvm::FastISel::selectPatchpoint().
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Definition at line 812 of file MachineOperand.h.
References MO_Immediate.
Referenced by llvm::MachineInstrBuilder::addImm(), llvm::XCoreInstrInfo::analyzeBranch(), llvm::WebAssemblyInstrInfo::analyzeBranch(), llvm::MSP430InstrInfo::analyzeBranch(), llvm::LanaiInstrInfo::analyzeBranch(), llvm::AVRInstrInfo::analyzeBranch(), llvm::HexagonInstrInfo::analyzeBranch(), llvm::ARMBaseInstrInfo::analyzeBranch(), llvm::SystemZInstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::M68kInstrInfo::AnalyzeBranchImpl(), llvm::SIInstrInfo::analyzeBranchImpl(), llvm::AArch64InstrInfo::analyzeBranchPredicate(), llvm::X86InstrInfo::analyzeBranchPredicate(), llvm::SIInstrInfo::buildExtractSubRegOrImm(), llvm::X86InstrInfo::commuteInstructionImpl(), convertImplicitDefToConstZero(), llvm::AArch64InstrInfo::describeLoadedValue(), llvm::X86InstrInfo::describeLoadedValue(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), foldConstantsIntoIntrinsics(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::X86AddressMode::getFullAddress(), GetMOForConstDbgOp(), llvm::AMDGPULegalizerInfo::legalizeImageIntrinsic(), llvm::InlineAsmLowering::lowerAsmOperandForConstraint(), parseCondBranch(), llvm::predOps(), llvm::WebAssemblyInstrInfo::reverseBranchCondition(), llvm::FastISel::selectPatchpoint(), llvm::FastISel::selectStackmap(), and llvm::HexagonInstrInfo::setBundleNoShuf().
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Definition at line 965 of file MachineOperand.h.
References MO_IntrinsicID.
Referenced by llvm::MachineInstrBuilder::addIntrinsicID().
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Definition at line 883 of file MachineOperand.h.
References MO_JumpTableIndex.
Referenced by llvm::MachineInstrBuilder::addJumpTableIndex().
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Definition at line 855 of file MachineOperand.h.
References MBB, and MO_MachineBasicBlock.
Referenced by llvm::MachineInstrBuilder::addMBB(), llvm::PeelingModuloScheduleExpander::peelPrologAndEpilogs(), processSwitches(), and splitEdge().
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Definition at line 943 of file MachineOperand.h.
References MO_MCSymbol.
Referenced by llvm::MachineInstrBuilder::addSym().
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Definition at line 937 of file MachineOperand.h.
References MO_Metadata.
Referenced by llvm::MachineInstrBuilder::addMetadata().
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Definition at line 971 of file MachineOperand.h.
References MO_Predicate.
Referenced by llvm::MachineInstrBuilder::addPredicate().
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Definition at line 830 of file MachineOperand.h.
References assert(), isDead(), isDebug(), isDef(), isEarlyClobber(), isInternalRead(), isKill(), isRenamable(), isUndef(), MO_Register, and SubReg.
Referenced by llvm::SITargetLowering::AddIMGInit(), llvm::MachineInstr::addImplicitDefUseOperands(), llvm::GISelInstProfileBuilder::addNodeIDRegType(), llvm::MachineInstrBuilder::addReg(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), llvm::R600InstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::SIInstrInfo::buildExtractSubRegOrImm(), llvm::condCodeOp(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::MipsInstrInfo::describeLoadedValue(), llvm::TargetInstrInfo::describeLoadedValue(), describeMOVrrLoadedValue(), describeORRLoadedValue(), llvm::InstrEmitter::EmitDbgInstrRef(), llvm::AArch64TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::HexagonFrameLowering::emitPrologue(), llvm::SIInstrInfo::enforceOperandRCAlignment(), expandSGPRCopy(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::X86AddressMode::getFullAddress(), GetMOForConstDbgOp(), imposeStackOrdering(), INITIALIZE_PASS(), llvm::CallLowering::lowerCall(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::PeelingModuloScheduleExpander::peelPrologAndEpilogs(), llvm::predOps(), TransferTracker::recoverAsEntryValue(), llvm::rewriteT2FrameIndex(), llvm::FastISel::selectIntrinsicCall(), llvm::FastISel::selectPatchpoint(), llvm::FastISel::selectStackmap(), llvm::FastISel::selectXRayCustomEvent(), llvm::FastISel::selectXRayTypedEvent(), llvm::t1CondCodeOp(), and llvm::tryFoldSPUpdateIntoPushPop().
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Definition at line 931 of file MachineOperand.h.
References assert(), llvm::BitmaskEnumDetail::Mask(), and MO_RegisterLiveOut.
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CreateRegMask - Creates a register mask operand referencing Mask.
The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand.
A RegMask operand represents a set of non-clobbered physical registers on an instruction that clobbers many registers, typically a call. The bit mask has a bit set for each physreg that is preserved by this instruction, as described in the documentation for TargetRegisterInfo::getCallPreservedMask().
Any physreg with a 0 bit in the mask is clobbered by the instruction.
Definition at line 925 of file MachineOperand.h.
References assert(), llvm::BitmaskEnumDetail::Mask(), and MO_RegisterMask.
Referenced by llvm::MachineInstrBuilder::addRegMask(), and llvm::FastISel::selectPatchpoint().
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Definition at line 977 of file MachineOperand.h.
References llvm::BitmaskEnumDetail::Mask(), and MO_ShuffleMask.
Referenced by llvm::MachineInstrBuilder::addShuffleMask().
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Definition at line 875 of file MachineOperand.h.
References MO_TargetIndex, and llvm::Offset.
Referenced by llvm::MachineInstrBuilder::addTargetIndex().
LLVM_DUMP_METHOD void MachineOperand::dump | ( | ) | const |
Definition at line 1010 of file MachineOperand.cpp.
References llvm::dbgs().
Referenced by rescheduleCanonically().
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Definition at line 584 of file MachineOperand.h.
References assert(), and isBlockAddress().
Referenced by llvm::MachineInstrBuilder::addDisp(), llvm::LanaiMCInstLower::GetBlockAddressSymbol(), llvm::MSP430MCInstLower::GetBlockAddressSymbol(), llvm::SystemZMCInstLower::getExpr(), getMCSymbolForTOCPseudoMO(), llvm::hash_value(), isIdenticalTo(), isSimilarDispOp(), llvm::lowerLoongArchMachineOperandToMCOperand(), llvm::CSKYMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::M68kMCInstLower::LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), LowerSymbolOperand(), print(), llvm::CSKYAsmPrinter::PrintAsmOperand(), and llvm::MipsAsmPrinter::printOperand().
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Definition at line 604 of file MachineOperand.h.
References assert(), and isCFIIndex().
Referenced by llvm::hash_value(), isIdenticalTo(), print(), and llvm::stableHashValue().
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Definition at line 558 of file MachineOperand.h.
References assert(), and isCImm().
Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::InstructionSelector::executeMatchTable(), foldConstantsIntoIntrinsics(), foldImm(), generateAssignInstrs(), llvm::generateSpecConstantInst(), llvm::getConstFromIntrinsic(), getImmedFromMO(), llvm::hash_value(), isIdenticalTo(), llvm::CombinerHelper::matchCombineUnmergeConstant(), llvm::matchUnaryPredicate(), print(), processSwitches(), llvm::stableHashValue(), and llvm::LegalizerHelper::widenScalar().
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Definition at line 563 of file MachineOperand.h.
References assert(), and isFPImm().
Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), generateAssignInstrs(), llvm::generateSpecConstantInst(), llvm::hash_value(), isIdenticalTo(), llvm::SPIRVMCInstLower::lower(), llvm::WebAssemblyMCInstLower::lower(), llvm::ARMAsmPrinter::lowerOperand(), llvm::CombinerHelper::matchCombineUnmergeConstant(), AMDGPURegBankCombinerHelper::matchFPMed3ToClamp(), print(), llvm::stableHashValue(), and llvm::LegalizerHelper::widenScalar().
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Definition at line 579 of file MachineOperand.h.
References assert(), and isGlobal().
Referenced by llvm::MachineInstrBuilder::addDisp(), llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::BTFDebug::beginInstruction(), llvm::buildEnqueueKernel(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::getAddressFromInstr(), llvm::SystemZMCInstLower::getExpr(), llvm::BPFMCInstLower::GetGlobalAddressSymbol(), llvm::LanaiMCInstLower::GetGlobalAddressSymbol(), llvm::MSP430MCInstLower::GetGlobalAddressSymbol(), llvm::AArch64MCInstLower::GetGlobalAddressSymbol(), getMCSymbolForTOCPseudoMO(), GetSymbolFromOperand(), llvm::M68kMCInstLower::GetSymbolFromOperand(), llvm::hash_value(), INITIALIZE_PASS(), llvm::BTFDebug::InstLower(), IsCallReturnTwice(), isIdenticalTo(), isSignExtendedW(), llvm::PPCInstrInfo::isSignOrZeroExtended(), isSimilarDispOp(), llvm::SPIRVMCInstLower::lower(), llvm::lowerLoongArchMachineOperandToMCOperand(), llvm::CSKYMCInstLower::lowerOperand(), AMDGPUMCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), LowerSymbolOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::WebAssembly::mayThrow(), print(), llvm::AVRAsmPrinter::printOperand(), llvm::ARMAsmPrinter::PrintSymbolOperand(), llvm::AsmPrinter::PrintSymbolOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), queryCallee(), llvm::DetectRoundChange::runOnMachineFunction(), smallData(), and swapRegAndNonRegOperand().
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Definition at line 553 of file MachineOperand.h.
References assert(), and isImm().
Referenced by addConstantComments(), llvm::MachineInstrBuilder::addDisp(), llvm::R600InstrInfo::addFlag(), llvm::SITargetLowering::AddIMGInit(), llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::buildAtomicCompareExchangeInst(), llvm::buildBoolRegister(), llvm::buildEnqueueKernel(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canCompareBeNewValueJump(), canFoldIntoCSel(), canMutatePriorConfig(), llvm::R600InstrInfo::clearFlag(), llvm::PPCInstrInfo::combineRLWINM(), compareMachineOp(), llvm::SIInstrInfo::convertToThreeAddress(), createPHIsForSelects(), llvm::XCoreFrameLowering::eliminateCallFramePseudoInstr(), llvm::ARCFrameLowering::eliminateCallFramePseudoInstr(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::M68kRegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::AArch64FrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitEpilogue(), EmitLoweredCascadedSelect(), llvm::InstructionSelector::executeMatchTable(), llvm::M68kInstrInfo::ExpandMOVEM(), ExpandMOVImmSExti8(), llvm::HexagonInstrInfo::expandPostRAPseudo(), expandSHXDROT(), llvm::RISCVInstrInfo::finalizeInsInstrs(), findCondCodeUsedByInstr(), llvm::MachineInstr::findInlineAsmFlagIdx(), findRedundantFlagInstr(), llvm::MachineInstr::findTiedOperandIdx(), fixupCalleeSaveRestoreStackOffset(), fixupSEHOpcode(), llvm::SIInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::generateImageMiscQueryInst(), llvm::generateImageSizeQueryInst(), genIndexedMultiply(), llvm::getAddressFromInstr(), llvm::X86InstrInfo::getAddrModeFromMemoryOp(), getArgumentStackToRestore(), llvm::HexagonInstrInfo::getBaseAndOffset(), llvm::HexagonInstrInfo::getBundleNoShuf(), llvm::PatchPointOpers::getCallingConv(), llvm::HexagonInstrInfo::getCompoundOpcode(), GetCondCode(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), llvm::StatepointOpers::getGCPointerMap(), getHWReg(), llvm::PatchPointOpers::getID(), getImmedFromMO(), llvm::HexagonInstrInfo::getIncrementValue(), llvm::MachineInstr::getInlineAsmDialect(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), getLoadStoreOffsetSizeInBits(), llvm::SIInstrInfo::getMemOperandsWithOffsetWidth(), llvm::X86InstrInfo::getMemOperandsWithOffsetWidth(), llvm::LanaiInstrInfo::getMemOperandWithOffsetWidth(), llvm::RISCVInstrInfo::getMemOperandWithOffsetWidth(), llvm::AArch64InstrInfo::getMemOperandWithOffsetWidth(), llvm::PPCInstrInfo::getMemOperandWithOffsetWidth(), llvm::PatchPointOpers::getNumPatchBytes(), llvm::getNumSizeComponents(), llvm::SPIRVGlobalRegistry::getOrCreateConsIntVector(), llvm::MachineInstr::getRegClassConstraint(), getRegImmPairPreventingCompression(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::R600InstrInfo::getSrcs(), getStoreOffset(), llvm::RISCVInstrInfo::hasAllNBitUsers(), llvm::RISCV::hasEqualFRM(), llvm::hash_value(), llvm::SIInstrInfo::hasModifiersSet(), llvm::MachineInstr::hasUnmodeledSideEffects(), if(), INITIALIZE_PASS(), llvm::SystemZELFFrameLowering::inlineStackProbe(), llvm::isAArch64FrameOffsetLegal(), llvm::PPCInstrInfo::isADDIInstrEligibleForFolding(), llvm::MipsInstrInfo::isAddImmediate(), isAddressLdStPair(), llvm::HexagonInstrInfo::isConstExtended(), llvm::MachineInstr::isConvergent(), isConvertibleLEA(), isIdenticalTo(), isIdentityValue(), llvm::PPCInstrInfo::isImmInstrEligibleForFolding(), llvm::SIInstrInfo::isInlineConstant(), isLdOffsetInRangeOfSt(), isLiteralsPair(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), isLoadStoreThatCanHandleDisplacement(), isNonZeroAVL(), isRedundantFlagInstr(), isRelevantAddressingMode(), isSafeToFoldImmIntoCopy(), llvm::isScale(), llvm::MachineInstr::isStackAligningInlineAsm(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SPIRVMCInstLower::lower(), llvm::WebAssemblyMCInstLower::lower(), llvm::lowerLoongArchMachineOperandToMCOperand(), llvm::CSKYMCInstLower::lowerOperand(), llvm::XCoreMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::ARCMCInstLower::LowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), AMDGPUMCInstLower::lowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::M68kMCInstLower::LowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), lowerRISCVVMachineInstrToMCInst(), llvm::MachineInstr::mayLoad(), mayOverlapWrite(), llvm::MachineInstr::mayStore(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::SIInstrInfo::moveToVALU(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::SIInstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), parseCondBranch(), llvm::SystemZInstrInfo::prepareCompareSwapOperands(), print(), llvm::MachineInstr::print(), llvm::LoongArchAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), llvm::LoongArchAsmPrinter::PrintAsmOperand(), llvm::CSKYAsmPrinter::PrintAsmOperand(), llvm::WebAssemblyAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::AMDGPUAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), llvm::AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::printFCCOperand(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), llvm::SIRegisterInfo::resolveFrameIndex(), llvm::R600InstrInfo::reverseBranchCondition(), llvm::ARMBlockPlacement::revertWhileToDoLoop(), llvm::rewriteT2FrameIndex(), llvm::SPIRV::SampledImageTypeDescriptor::SampledImageTypeDescriptor(), llvm::HexagonInstrInfo::setBundleNoShuf(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::stableHashValue(), swapRegAndNonRegOperand(), llvm::SIInstrInfo::swapSourceModifiers(), tryToSimplifyUADDO(), llvm::X86InstrInfo::unfoldMemoryOperand(), updateOperandIfDifferent(), updateOperands(), verifyInsExtInstruction(), llvm::RISCVInstrInfo::verifyInstruction(), and llvm::SIInstrInfo::verifyInstruction().
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Definition at line 573 of file MachineOperand.h.
References assert(), isCPI(), isFI(), isJTI(), and isTargetIndex().
Referenced by llvm::MachineInstrBuilder::addDisp(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::ARCRegisterInfo::eliminateFrameIndex(), llvm::ARMAsmPrinter::emitJumpTableAddrs(), llvm::ARMAsmPrinter::emitJumpTableInsts(), llvm::ARMAsmPrinter::emitJumpTableTBInst(), llvm::TargetLoweringBase::emitPatchPoint(), llvm::getAddressFromInstr(), llvm::MSP430MCInstLower::GetConstantPoolIndexSymbol(), llvm::LanaiMCInstLower::GetConstantPoolIndexSymbol(), llvm::SystemZMCInstLower::getExpr(), llvm::MSP430MCInstLower::GetJumpTableSymbol(), llvm::LanaiMCInstLower::GetJumpTableSymbol(), getMCSymbolForTOCPseudoMO(), getStartOrEndSlot(), getTargetIndexName(), llvm::hash_value(), hasSameBaseOpValue(), INITIALIZE_PASS(), isIdenticalTo(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), isSimilarDispOp(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::lowerLoongArchMachineOperandToMCOperand(), llvm::CSKYMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::M68kMCInstLower::LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), LowerSymbolOperand(), llvm::SystemZELFFrameLowering::orderFrameObjects(), llvm::AArch64FrameLowering::orderFrameObjects(), print(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), llvm::ARMBaseInstrInfo::reMaterialize(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::PPCInstrInfo::shouldClusterMemOps(), smallData(), llvm::stableHashValue(), and swapRegAndNonRegOperand().
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Definition at line 594 of file MachineOperand.h.
References assert(), and isDbgInstrRef().
Referenced by llvm::hash_value(), isIdenticalTo(), print(), and llvm::stableHashValue().
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Definition at line 599 of file MachineOperand.h.
References assert(), and isDbgInstrRef().
Referenced by llvm::hash_value(), isIdenticalTo(), print(), and llvm::stableHashValue().
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Definition at line 609 of file MachineOperand.h.
References assert(), and isIntrinsicID().
Referenced by llvm::InstructionSelector::executeMatchTable(), llvm::MachineInstr::getIntrinsicID(), llvm::hash_value(), isIdenticalTo(), print(), and llvm::stableHashValue().
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Definition at line 568 of file MachineOperand.h.
References assert(), and isMBB().
Referenced by addIncomingValuesToPHIs(), llvm::XCoreInstrInfo::analyzeBranch(), llvm::NVPTXInstrInfo::analyzeBranch(), llvm::VEInstrInfo::analyzeBranch(), llvm::SparcInstrInfo::analyzeBranch(), llvm::MipsInstrInfo::analyzeBranch(), llvm::HexagonInstrInfo::analyzeBranch(), llvm::R600InstrInfo::analyzeBranch(), llvm::AArch64InstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::AArch64InstrInfo::analyzeBranchPredicate(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), bbIsJumpedOver(), BBIsJumpedOver(), llvm::HexagonEvaluator::evaluate(), findLoopComponents(), llvm::HexagonInstrInfo::getDotNewPredJumpOp(), llvm::SystemZMCInstLower::getExpr(), getInitPhiReg(), getLoopPhiReg(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), getPhiRegs(), llvm::M68kMCInstLower::GetSymbolFromOperand(), getTargetMBB(), llvm::hash_value(), INITIALIZE_PASS(), insertPHI(), isIdenticalTo(), isSimilarDispOp(), llvm::SPIRVMCInstLower::lower(), llvm::lowerLoongArchMachineOperandToMCOperand(), llvm::CSKYMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), AMDGPUMCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), LowerSymbolOperand(), llvm::CombinerHelper::matchOptBrCondByInvertingCond(), parseCondBranch(), print(), llvm::WebAssemblyAsmPrinter::PrintAsmOperand(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), processSwitches(), llvm::MachineBasicBlock::replacePhiUsesWith(), llvm::ARMBlockPlacement::revertWhileToDoLoop(), splitBlock(), splitEdge(), splitMBB(), tryToSimplifyUADDO(), updatePHIs(), and verifyCFIntrinsic().
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Definition at line 589 of file MachineOperand.h.
References assert(), and isMCSymbol().
Referenced by emitDirectiveRelocJalr(), llvm::MipsInstrInfo::genInstrWithNewOpc(), llvm::hash_value(), isIdenticalTo(), isSimilarDispOp(), llvm::WebAssemblyMCInstLower::lower(), llvm::CSKYMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), AMDGPUMCInstLower::lowerOperand(), llvm::M68kMCInstLower::LowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), print(), and llvm::stableHashValue().
Definition at line 672 of file MachineOperand.h.
References assert(), and isMetadata().
Referenced by llvm::getMachineInstrType(), llvm::hash_value(), isIdenticalTo(), print(), and llvm::MachineInstr::print().
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Return the offset from the symbol in this operand.
This always returns 0 for ExternalSymbol operands.
Definition at line 626 of file MachineOperand.h.
References assert(), isBlockAddress(), isCPI(), isGlobal(), isMCSymbol(), isSymbol(), and isTargetIndex().
Referenced by llvm::MachineInstrBuilder::addDisp(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::SystemZMCInstLower::getExpr(), GetSymbolRef(), llvm::hash_value(), INITIALIZE_PASS(), isIdenticalTo(), AMDGPUMCInstLower::lowerOperand(), lowerSymbolOperand(), LowerSymbolOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::BPFMCInstLower::LowerSymbolOperand(), llvm::LanaiMCInstLower::LowerSymbolOperand(), llvm::MSP430MCInstLower::LowerSymbolOperand(), llvm::M68kMCInstLower::LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandCOFF(), llvm::AArch64MCInstLower::lowerSymbolOperandDarwin(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), print(), llvm::WebAssemblyAsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::printOperand(), llvm::ARMAsmPrinter::PrintSymbolOperand(), llvm::AsmPrinter::PrintSymbolOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), llvm::stableHashValue(), and swapRegAndNonRegOperand().
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getParent - Return the instruction that this operand belongs to.
Definition at line 243 of file MachineOperand.h.
Referenced by llvm::AnalyzeVirtRegInBundle(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::MachineInstr::changeDebugValuesDefReg(), ChangeToRegister(), llvm::constrainOperandRegClass(), createDeadDef(), findOnlyInterestingUse(), findSingleRegUse(), findUseBetween(), getFoldableImm(), getImmedFromMO(), getLoadStoreOffsetSizeInBits(), getMFIfAvailable(), GetSymbolRef(), getUsedRegMask(), llvm::SIInstrInfo::isIgnorableUse(), llvm::SIInstrInfo::isInlineConstant(), isKilled(), llvm::SIInstrInfo::isLegalRegOperand(), isNoReturnDef(), llvm::M68kInstrInfo::isPCRelRegisterOperandLegal(), isRenamable(), oneUseDominatesOtherUses(), print(), printAsmMRegister(), printAsmVRegister(), processSwitches(), llvm::CombinerHelper::replaceRegOpWith(), llvm::MachineSSAUpdater::RewriteUse(), llvm::MachineFunction::salvageCopySSAImpl(), scavengeVReg(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::SIInstrInfo::shouldClusterMemOps(), llvm::PPCInstrInfo::shouldClusterMemOps(), llvm::stableHashValue(), llvm::RegBankSelect::tryAvoidingSplit(), llvm::FastISel::tryToFoldLoad(), tryToSimplifyUADDO(), and llvm::MachineRegisterInfo::verifyUseList().
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Definition at line 244 of file MachineOperand.h.
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Definition at line 614 of file MachineOperand.h.
References assert(), and isPredicate().
Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::CombinerHelper::applyNotCmp(), llvm::InstructionSelector::executeMatchTable(), llvm::GAnyCmp::getCond(), llvm::hash_value(), isIdenticalTo(), llvm::MIPatternMatch::CompareOp_match< Pred_P, LHS_P, RHS_P, Opcode, Commutable >::match(), print(), processSwitches(), and llvm::stableHashValue().
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getReg - Returns the register number.
Definition at line 366 of file MachineOperand.h.
References assert(), and isReg().
Referenced by addLiveInRegs(), llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::SrcOp::addSrcToMIB(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::ScheduleDAGInstrs::addVRegUseDeps(), llvm::HexagonSubtarget::adjustSchedDependency(), allPhiOperandsUndefined(), llvm::AnalyzePhysRegInBundle(), llvm::AnalyzeVirtRegInBundle(), llvm::HexagonSubtarget::BankConflictMutation::apply(), llvm::CombinerHelper::applyCombineDivRem(), llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::CombinerHelper::applyCombineTruncOfShift(), llvm::CombinerHelper::applyCombineUnmergeZExtToZExt(), llvm::RegisterBankInfo::applyDefaultMapping(), llvm::CombinerHelper::applyExtendThroughPhis(), AMDGPUCombinerHelper::applyFoldableFneg(), llvm::RegBankSelect::applyMapping(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::CombinerHelper::applyShiftOfShiftedLogic(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), attemptDebugCopyProp(), llvm::ARMBaseInstrInfo::breakPartialRegDependency(), llvm::buildEnqueueKernel(), llvm::SIInstrInfo::buildExtractSubReg(), llvm::SPIRVGlobalRegistry::buildGlobalVariable(), llvm::BuildMI(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canCombine(), canCombineFPFusedMultiply(), canEmitConjunction(), llvm::HexagonInstrInfo::canExecuteInBundle(), canFoldAsPredicatedOp(), canFoldCopy(), canFoldIntoCSel(), canMutatePriorConfig(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), canRenameUpToDef(), llvm::SIInstrInfo::canShrink(), llvm::MachineInstr::changeDebugValuesDefReg(), llvm::checkVOPDRegConstraints(), clearKillFlags(), llvm::MachineInstr::clearRegisterDeads(), llvm::MachineInstr::clearRegisterKills(), collectRegDefs(), CombineCVTAToLocal(), combineFPFusedMultiply(), llvm::PPCInstrInfo::combineRLWINM(), compareMachineOp(), llvm::RegBankSelect::computeMapping(), llvm::TargetSchedModel::computeOutputLatency(), ConsecutiveInstr(), llvm::constrainOperandRegClass(), llvm::constrainSelectedInstRegOperands(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::SIInstrInfo::convertToThreeAddress(), createNewIdReg(), llvm::ScheduleDAGInstrs::deadDefHasNoUse(), llvm::ShapeT::deduceImm(), llvm::X86InstrInfo::describeLoadedValue(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), emitIndirectDst(), emitIndirectSrc(), llvm::HexagonHazardRecognizer::EmitInstruction(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), emitLoadM0FromVGPRLoop(), emitLoadSRsrcFromVGPRLoop(), EmitLoweredCascadedSelect(), eraseGPOpnd(), llvm::InstructionSelector::executeMatchTable(), Expand2AddrUndef(), llvm::M68kInstrInfo::ExpandMOVEM(), llvm::M68kInstrInfo::ExpandMOVSZX_RM(), llvm::M68kInstrInfo::ExpandMOVSZX_RR(), llvm::M68kInstrInfo::ExpandMOVX_RR(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::M68kInstrInfo::ExpandPUSH_POP(), llvm::finalizeBundle(), llvm::PPCInstrInfo::finalizeInsInstrs(), findDeadCallerSavedReg(), llvm::X86RegisterInfo::findDeadCallerSavedReg(), findLoopComponents(), findNextInsertLocation(), findOnlyInterestingUse(), findRedundantFlagInstr(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), findStartOfTree(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), foldConstantsIntoIntrinsics(), llvm::PPCInstrInfo::foldFrameOffset(), foldImm(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::SIInstrInfo::FoldImmediate(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), foldVGPRCopyIntoRegSequence(), llvm::RISCVInstrInfo::genAlternativeCodeSequence(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), llvm::generateEnqueueInst(), genFusedMultiply(), genIndexedMultiply(), genMaddR(), genSubAdd2SubSub(), llvm::getAddressFromInstr(), llvm::X86InstrInfo::getAddrModeFromMemoryOp(), getBaseAddressRegister(), llvm::getBlockStructInstr(), getCallTargetRegOpnd(), llvm::HexagonInstrInfo::getCompoundOpcode(), llvm::SIRegisterInfo::getConstrainedRegClassForOperand(), getDataDeps(), llvm::getDefInstrMaybeConstant(), getDefRegMask(), llvm::getDefSrcRegIgnoringCopies(), llvm::GAnyLoad::getDstReg(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), llvm::PPCInstrInfo::getFMAPatterns(), getFMULPatterns(), getFoldableImm(), getFPReg(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::ARMBankConflictHazardRecognizer::getHazardType(), getImmedFromMO(), getIndirectSGPRIdx(), getInitPhiReg(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::ARMRegisterBankInfo::getInstrMapping(), llvm::RegisterBankInfo::getInstrMappingImpl(), llvm::SIInstrInfo::getInstructionUniformity(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), llvm::SrcOp::getLLTTy(), getLoopPhiReg(), llvm::getMachineInstrType(), llvm::ReachingDefAnalysis::getMIOperand(), getMopState(), getNewSource(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::PPCInstrInfo::getOperandLatency(), llvm::SPIRVGlobalRegistry::getOrCreateConsIntArray(), llvm::SPIRVGlobalRegistry::getOrCreateOpTypeSampledImage(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::X86InstrInfo::getPartialRegUpdateClearance(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), getPhiRegs(), llvm::GLoadStore::getPointerReg(), getRC32(), llvm::GenericMachineInstr::getReg(), llvm::SrcOp::getReg(), llvm::PPCRegisterInfo::getRegAllocationHints(), llvm::SystemZRegisterInfo::getRegAllocationHints(), llvm::SIRegisterInfo::getRegClassForOperandReg(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), llvm::getRegState(), llvm::RegBankSelect::getRepairCost(), getSalvageOpsForTrunc(), getShuffleComment(), llvm::GUnmerge::getSourceReg(), llvm::R600InstrInfo::getSrcs(), llvm::X86InstrInfo::getUndefRegClearance(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetUndefVal(), getUsedRegMask(), llvm::MachineSSAUpdater::GetValueInMiddleOfBlock(), llvm::GStore::getValueReg(), llvm::getVRegSubRegDef(), handleADRP(), llvm::LiveIntervals::handleMoveIntoNewBundle(), llvm::hash_value(), hasLiveThroughUse(), hasMoreUses(), hasRAWHazard(), llvm::TargetInstrInfo::hasReassociableOperands(), llvm::RISCVInstrInfo::hasReassociableSibling(), llvm::TargetInstrInfo::hasReassociableSibling(), hasRegisterDependency(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), hasSameBaseOpValue(), if(), indirectCopyToAGPR(), INITIALIZE_PASS(), llvm::HexagonInstrInfo::insertBranch(), insertDivByZeroTrap(), insertSEH(), llvm::MipsInstrInfo::isAddImmediate(), llvm::AArch64InstrInfo::isAddImmediate(), llvm::ARMBaseInstrInfo::isAddImmediate(), isArithmeticBccPair(), llvm::InstructionSelector::isBaseWithConstantOffset(), isCandidate(), llvm::WebAssembly::isChild(), llvm::AArch64GISelUtils::isCMN(), llvm::MachineInstr::isConstantValuePHI(), isConvertibleLEA(), isCrossCopy(), llvm::AArch64InstrInfo::isExtendLikelyToBeFolded(), isExtractHiElt(), isIdenticalOp(), isIdenticalTo(), llvm::MachineInstr::isIdenticalTo(), llvm::MachineInstr::isIdentityCopy(), llvm::SIInstrInfo::isIgnorableUse(), isImm(), llvm::PPCInstrInfo::isImmInstrEligibleForFolding(), isInvariantStore(), llvm::isKnownNeverNaN(), isLdStSafeToCluster(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), isLogicalOpOnExec(), llvm::SMSchedule::isLoopCarriedDefOfUse(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), isLUIADDI(), isMMSourceRegister(), isMMThreeBitGPRegister(), isNonFoldablePartialRegisterLoad(), isNonZeroAVL(), llvm::InstructionSelector::isOperandImmEqual(), isOperandKill(), llvm::SIInstrInfo::isOperandLegal(), isPromotableZeroStoreInst(), isRedundantFlagInstr(), isRegInClass(), isRelevantAddressingMode(), isRenamable(), IsSafeAndProfitableToMove(), llvm::SIInstrInfo::isSGPRStackAccess(), llvm::SIInstrInfo::isStackAccess(), isSubRegOf(), isTileDef(), isTileRegDef(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), isTwoAddrUse(), isValidRegDefOf(), isValidRegUseOf(), llvm::PPCInstrInfo::isValidToBeChangedReg(), isVirtualRegisterOperand(), isWaitInstr(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsFLAT(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::Mips16InstrInfo::loadImmediate(), llvm::SPIRVMCInstLower::lower(), llvm::WebAssemblyMCInstLower::lower(), LowerCallResults(), llvm::lowerLoongArchMachineOperandToMCOperand(), llvm::CSKYMCInstLower::lowerOperand(), llvm::XCoreMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), llvm::ARCMCInstLower::LowerOperand(), llvm::MipsMCInstLower::LowerOperand(), AMDGPUMCInstLower::lowerOperand(), llvm::M68kMCInstLower::LowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), lowerRISCVVMachineInstrToMCInst(), llvm::MIPatternMatch::BinaryOp_match< LHS_P, RHS_P, Opcode, Commutable >::match(), llvm::MIPatternMatch::BinaryOpc_match< LHS_P, RHS_P, Commutable >::match(), llvm::MIPatternMatch::UnaryOp_match< SrcTy, Opcode >::match(), llvm::MIPatternMatch::CompareOp_match< Pred_P, LHS_P, RHS_P, Opcode, Commutable >::match(), llvm::MIPatternMatch::TernaryOp_match< Src0Ty, Src1Ty, Src2Ty, Opcode >::match(), llvm::CombinerHelper::matchCombineExtOfExt(), llvm::CombinerHelper::matchCombineFAddFMAFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFAddFpExtFMulToFMadOrFMAAggressive(), llvm::CombinerHelper::matchCombineFSubFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineFSubFpExtFNegFMulToFMadOrFMA(), llvm::CombinerHelper::matchCombineInsertVecElts(), llvm::CombinerHelper::matchCombineTruncOfExt(), llvm::CombinerHelper::matchCombineTruncOfShift(), llvm::CombinerHelper::matchConstantOp(), llvm::CombinerHelper::matchEqualDefs(), llvm::CombinerHelper::matchExtractVecEltBuildVec(), AMDGPUCombinerHelper::matchFoldableFneg(), AMDGPURegBankCombinerHelper::matchFPMed3ToClamp(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::CombinerHelper::matchNarrowBinopFeedingAnd(), llvm::CombinerHelper::matchOperandIsKnownToBeAPowerOfTwo(), llvm::CombinerHelper::matchOperandIsUndef(), llvm::CombinerHelper::matchPtrAddImmedChain(), AMDGPUPostLegalizerCombinerHelper::matchRcpSqrtToRsq(), llvm::CombinerHelper::matchShiftImmedChain(), llvm::CombinerHelper::matchShiftOfShiftedLogic(), MIIsInTerminatorSequence(), llvm::LegalizerHelper::moreElementsVectorDst(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::SIInstrInfo::moveToVALU(), MoveVPNOTBeforeFirstUser(), oneUseDominatesOtherUses(), llvm::ShapeT::operator==(), llvm::PPCInstrInfo::optimizeCmpPostRA(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::RISCVInstrInfo::optimizeSelect(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::CallLowering::parametersInCSRMatch(), llvm::PeelSingleBlockLoop(), print(), llvm::LoongArchAsmPrinter::PrintAsmMemoryOperand(), llvm::CSKYAsmPrinter::PrintAsmMemoryOperand(), llvm::ARMAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), printAsmMRegister(), llvm::LoongArchAsmPrinter::PrintAsmOperand(), llvm::AVRAsmPrinter::PrintAsmOperand(), llvm::SystemZAsmPrinter::PrintAsmOperand(), llvm::CSKYAsmPrinter::PrintAsmOperand(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::AMDGPUAsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), printAsmVRegister(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), processSwitches(), llvm::ARMBaseInstrInfo::produceSameValue(), producesFalseLanesZero(), llvm::MachineInstr::readsWritesVirtualRegister(), llvm::TargetInstrInfo::reassociateOps(), TransferTracker::redefVar(), reduceDbgValsForwardScan(), llvm::WebAssemblyAsmPrinter::regToString(), reinsertVectorIndexAdd(), llvm::ARMBaseInstrInfo::reMaterialize(), llvm::X86InstrInfo::reMaterialize(), removeCopies(), RemoveDeadAddBetweenLEAAndJT(), removeMapRegEntry(), llvm::MachineRegisterInfo::removeRegOperandFromUseList(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), llvm::RegBankSelect::repairReg(), llvm::PPCFrameLowering::replaceFPWithRealFP(), rescheduleCanonically(), llvm::R600InstrInfo::reverseBranchCondition(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::MachineFunction::salvageCopySSAImpl(), llvm::R600SchedStrategy::schedNode(), setIsRenamable(), setM0ToIndexFromSGPR(), llvm::MachineInstr::setPhysRegsDeadExcept(), setReg(), llvm::MachineInstr::setRegisterDefReadUndef(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::PPCInstrInfo::shouldClusterMemOps(), SinkingPreventsImplicitNullCheck(), llvm::MachineBasicBlock::SplitCriticalEdge(), splitMBB(), llvm::stableHashValue(), llvm::MachineInstr::substituteRegister(), swapRegAndNonRegOperand(), llvm::RegBankSelect::tryAvoidingSplit(), llvm::LegalizationArtifactCombiner::tryCombineExtract(), llvm::LegalizationArtifactCombiner::tryCombineUnmergeValues(), llvm::tryFoldSPUpdateIntoPushPop(), llvm::LegalizationArtifactCombiner::tryFoldUnmergeCast(), llvm::X86InstrInfo::unfoldMemoryOperand(), UpdateCPSRDef(), UpdateCPSRUse(), llvm::HexagonPacketizerList::updateOffset(), UpdateOperandRegClass(), updateOperandRegConstraints(), updatePhysDepsDownwards(), updatePhysDepsUpwards(), UseReg(), llvm::SIInstrInfo::usesConstantBus(), llvm::RegisterBankInfo::InstructionMapping::verify(), verifyCFIntrinsic(), llvm::SIInstrInfo::verifyInstruction(), VerifyLowRegs(), llvm::MachineRegisterInfo::verifyUseList(), and llvm::WebAssemblyDebugValueManager::WebAssemblyDebugValueManager().
getRegLiveOut - Returns a bit mask of live-out registers.
Definition at line 667 of file MachineOperand.h.
References assert(), and isRegLiveOut().
Referenced by print().
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
Definition at line 656 of file MachineOperand.h.
References assert(), and isRegMask().
Referenced by clobbersPhysReg(), llvm::hash_value(), isIdenticalTo(), print(), llvm::MIRParserImpl::setupRegisterInfo(), and llvm::stableHashValue().
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Returns number of elements needed for a regmask array.
Definition at line 662 of file MachineOperand.h.
Referenced by llvm::MachineFunction::allocateRegMask(), llvm::hash_value(), isIdenticalTo(), llvm::stableHashValue(), and llvm::AArch64RegisterInfo::UpdateCustomCallPreservedMask().
Definition at line 619 of file MachineOperand.h.
References assert(), and isShuffleMask().
Referenced by llvm::hash_value(), isExtractHiElt(), isIdenticalTo(), print(), and llvm::stableHashValue().
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Definition at line 371 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterDefined(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), attemptDebugCopyProp(), llvm::SIInstrInfo::buildExtractSubReg(), canFoldCopy(), emitLoadM0FromVGPRLoop(), llvm::HexagonInstrInfo::expandPostRAPseudo(), findUseBetween(), llvm::SIInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), foldVGPRCopyIntoRegSequence(), llvm::HexagonInstrInfo::getBaseAndOffset(), getDefRegMask(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), getNewSource(), llvm::SIInstrInfo::getOpSize(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), getRC32(), llvm::RISCVRegisterInfo::getRegAllocationHints(), llvm::PPCRegisterInfo::getRegAllocationHints(), llvm::SystemZRegisterInfo::getRegAllocationHints(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::SIRegisterInfo::getRegClassForOperandReg(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), getUsedRegMask(), llvm::hash_value(), isCrossCopy(), llvm::MachineInstr::isFullCopy(), isIdenticalTo(), llvm::MachineInstr::isIdentityCopy(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::SIInstrInfo::isOperandLegal(), isSSA(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), print(), llvm::ARMAsmPrinter::printOperand(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), llvm::MachineInstr::setRegisterDefReadUndef(), llvm::TailDuplicator::shouldTailDuplicate(), llvm::stableHashValue(), substPhysReg(), substVirtReg(), swapRegAndNonRegOperand(), and llvm::SIInstrInfo::verifyInstruction().
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Definition at line 634 of file MachineOperand.h.
References assert(), and isSymbol().
Referenced by llvm::SystemZMCInstLower::getExpr(), llvm::BPFMCInstLower::GetExternalSymbolSymbol(), llvm::MSP430MCInstLower::GetExternalSymbolSymbol(), llvm::LanaiMCInstLower::GetExternalSymbolSymbol(), llvm::AArch64MCInstLower::GetExternalSymbolSymbol(), GetSymbolFromOperand(), llvm::M68kMCInstLower::GetSymbolFromOperand(), llvm::hash_value(), isIdenticalTo(), isSimilarDispOp(), llvm::lowerLoongArchMachineOperandToMCOperand(), llvm::CSKYMCInstLower::lowerOperand(), AMDGPUMCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::WebAssembly::mayThrow(), optimizeCall(), print(), llvm::WebAssemblyAsmPrinter::PrintAsmOperand(), llvm::AVRAsmPrinter::printOperand(), and llvm::stableHashValue().
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Definition at line 226 of file MachineOperand.h.
References isReg().
Referenced by llvm::MachineInstrBuilder::addDisp(), emitDirectiveRelocJalr(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::MipsInstrInfo::genInstrWithNewOpc(), llvm::MSP430MCInstLower::GetBlockAddressSymbol(), llvm::MSP430MCInstLower::GetConstantPoolIndexSymbol(), llvm::MSP430MCInstLower::GetExternalSymbolSymbol(), llvm::MSP430MCInstLower::GetGlobalAddressSymbol(), llvm::AArch64MCInstLower::GetGlobalAddressSymbol(), llvm::MSP430MCInstLower::GetJumpTableSymbol(), GetSymbolRef(), llvm::hash_value(), INITIALIZE_PASS(), llvm::HexagonInstrInfo::isConstExtended(), isIdenticalTo(), llvm::WebAssemblyMCInstLower::lower(), llvm::SystemZMCInstLower::lowerOperand(), AMDGPUMCInstLower::lowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), lowerSymbolOperand(), LowerSymbolOperand(), llvm::CSKYMCInstLower::lowerSymbolOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::LanaiMCInstLower::LowerSymbolOperand(), llvm::MSP430MCInstLower::LowerSymbolOperand(), llvm::M68kMCInstLower::LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandCOFF(), llvm::AArch64MCInstLower::lowerSymbolOperandDarwin(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), llvm::ARMAsmPrinter::PrintSymbolOperand(), llvm::stableHashValue(), and swapRegAndNonRegOperand().
const char * MachineOperand::getTargetIndexName | ( | ) | const |
getTargetIndexName - If this MachineOperand is a TargetIndex that has a name, attempt to get the name.
Returns nullptr if the TargetIndex does not have a name. Asserts if MO is not a TargetIndex.
Definition at line 458 of file MachineOperand.cpp.
References getIndex(), and getMFIfAvailable().
Referenced by print(), and llvm::stableHashValue().
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getType - Returns the MachineOperandType for this operand.
Definition at line 224 of file MachineOperand.h.
Referenced by llvm::MachineInstrBuilder::addDisp(), compareMachineOp(), llvm::SystemZMCInstLower::getExpr(), getMCSymbolForTOCPseudoMO(), llvm::hash_value(), INITIALIZE_PASS(), IsAnAddressOperand(), isIdenticalTo(), llvm::SPIRVMCInstLower::lower(), llvm::WebAssemblyMCInstLower::lower(), llvm::lowerLoongArchMachineOperandToMCOperand(), llvm::CSKYMCInstLower::lowerOperand(), llvm::XCoreMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::ARCMCInstLower::LowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), AMDGPUMCInstLower::lowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::M68kMCInstLower::LowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), lowerRISCVVMachineInstrToMCInst(), LowerSymbolOperand(), print(), llvm::LoongArchAsmPrinter::PrintAsmOperand(), llvm::CSKYAsmPrinter::PrintAsmOperand(), llvm::WebAssemblyAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), llvm::AArch64InstrInfo::shouldClusterMemOps(), and llvm::stableHashValue().
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isBlockAddress - Tests if this is a MO_BlockAddress operand.
Definition at line 348 of file MachineOperand.h.
References MO_BlockAddress.
Referenced by getBlockAddress(), getOffset(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), and setOffset().
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Definition at line 357 of file MachineOperand.h.
References MO_CFIIndex.
Referenced by getCFIIndex().
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isCImm - Test if this is a MO_CImmediate operand.
Definition at line 330 of file MachineOperand.h.
References MO_CImmediate.
Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::InstructionSelector::executeMatchTable(), llvm::generateSpecConstantInst(), getCImm(), llvm::getConstFromIntrinsic(), getImmedFromMO(), isCandidate(), setCImm(), and llvm::stableHashValue().
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isCPI - Tests if this is a MO_ConstantPoolIndex operand.
Definition at line 338 of file MachineOperand.h.
References MO_ConstantPoolIndex.
Referenced by canFoldAsPredicatedOp(), getIndex(), getOffset(), INITIALIZE_PASS(), isAnImmediateOperand(), isCandidate(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), setIndex(), setOffset(), and smallData().
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Definition at line 356 of file MachineOperand.h.
References MO_DbgInstrRef.
Referenced by getInstrRefInstrIndex(), getInstrRefOpIndex(), setInstrRefInstrIndex(), and setInstrRefOpIndex().
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Definition at line 391 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::MachineInstr::allDefsAreDead(), llvm::AnalyzePhysRegInBundle(), ChangeToRegister(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), CreateReg(), llvm::finalizeBundle(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), llvm::ARMBaseInstrInfo::FoldImmediate(), getMopState(), llvm::getRegState(), llvm::X86InstrInfo::hasReassociableOperands(), isCandidate(), llvm::MachineInstr::isIdenticalTo(), moveAndTeeForMultiUse(), print(), llvm::X86InstrInfo::setSpecialOperandAttr(), swapRegAndNonRegOperand(), UpdateCPSRDef(), and updatePhysDepsDownwards().
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Definition at line 452 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterKilled(), canRenameUpToDef(), ChangeToRegister(), CreateReg(), llvm::getRegState(), setIsDef(), setIsKill(), and swapRegAndNonRegOperand().
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Definition at line 381 of file MachineOperand.h.
References assert(), and isReg().
Referenced by addLiveInRegs(), llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::AnalyzePhysRegInBundle(), llvm::AnalyzeVirtRegInBundle(), llvm::ScheduleDAGInstrs::buildSchedGraph(), canFoldAsPredicatedOp(), canRenameUpToDef(), ChangeToRegister(), llvm::MachineInstr::clearRegisterDeads(), collectRegDefs(), llvm::constrainOperandRegClass(), CreateReg(), llvm::HexagonHazardRecognizer::EmitInstruction(), llvm::finalizeBundle(), findDeadCallerSavedReg(), llvm::X86RegisterInfo::findDeadCallerSavedReg(), findDefIdx(), llvm::MachineInstr::findRegisterDefOperandIdx(), findUseIdx(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::X86InstrInfo::foldMemoryOperandImpl(), getDefRegMask(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::PPCInstrInfo::getInstrLatency(), llvm::PatchPointOpers::getNextScratchIdx(), llvm::MachineInstr::getNumExplicitDefs(), llvm::getRegState(), llvm::RegBankSelect::getRepairCost(), llvm::hash_value(), hasRegisterDependency(), isCandidate(), llvm::WebAssembly::isChild(), isIdenticalTo(), llvm::MachineInstr::isIdenticalTo(), llvm::SMSchedule::isLoopCarriedDefOfUse(), llvm::MachineInstr::isRegTiedToUseOperand(), isRenamable(), IsSafeAndProfitableToMove(), isValidRegDef(), llvm::Mips16InstrInfo::loadImmediate(), MIIsInTerminatorSequence(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), print(), llvm::MachineInstr::print(), printImplicitRegisterFlag(), RemoveDeadAddBetweenLEAAndJT(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), llvm::RegBankSelect::repairReg(), rescheduleCanonically(), llvm::MachineInstr::setPhysRegsDeadExcept(), llvm::MachineInstr::setRegisterDefReadUndef(), llvm::stableHashValue(), substPhysReg(), llvm::MachineInstr::tieOperands(), llvm::RegBankSelect::tryAvoidingSplit(), UpdateCPSRUse(), updatePhysDepsDownwards(), and updatePhysDepsUpwards().
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Definition at line 442 of file MachineOperand.h.
References assert(), and isReg().
Referenced by canRenameUpToDef(), createDeadDef(), CreateReg(), dumpMachineInstrRangeWithSlotIndex(), getMopState(), llvm::PatchPointOpers::getNextScratchIdx(), and print().
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isFI - Tests if this is a MO_FrameIndex operand.
Definition at line 336 of file MachineOperand.h.
References MO_FrameIndex.
Referenced by canFoldAsPredicatedOp(), llvm::X86InstrInfo::describeLoadedValue(), llvm::TargetLoweringBase::emitPatchPoint(), getIndex(), llvm::SIInstrInfo::getMemOperandsWithOffsetWidth(), llvm::AArch64InstrInfo::getMemOperandWithOffsetWidth(), llvm::PPCInstrInfo::getMemOperandWithOffsetWidth(), llvm::SIInstrInfo::isImmOperandLegal(), isLdStSafeToCluster(), llvm::SIInstrInfo::isLegalVSrcOperand(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SIInstrInfo::isOperandLegal(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::SystemZELFFrameLowering::orderFrameObjects(), llvm::AArch64FrameLowering::orderFrameObjects(), llvm::SIRegisterInfo::resolveFrameIndex(), setIndex(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::PPCInstrInfo::shouldClusterMemOps(), swapRegAndNonRegOperand(), and UpdateOperandRegClass().
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isFPImm - Tests if this is a MO_FPImmediate operand.
Definition at line 332 of file MachineOperand.h.
References MO_FPImmediate.
Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), getFPImm(), isCandidate(), llvm::HexagonInstrInfo::isConstExtended(), setFPImm(), and llvm::SIInstrInfo::verifyInstruction().
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isGlobal - Tests if this is a MO_GlobalAddress operand.
Definition at line 344 of file MachineOperand.h.
References MO_GlobalAddress.
Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::BTFDebug::beginInstruction(), llvm::getAddressFromInstr(), getGlobal(), getOffset(), llvm::R600InstrInfo::getSrcs(), GetSymbolFromOperand(), llvm::M68kMCInstLower::GetSymbolFromOperand(), INITIALIZE_PASS(), llvm::BTFDebug::InstLower(), isAnImmediateOperand(), IsCallReturnTwice(), isCandidate(), llvm::HexagonInstrInfo::isConstExtended(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::SIInstrInfo::isLegalVSrcOperand(), llvm::SIInstrInfo::isOperandLegal(), isSignExtendedW(), llvm::PPCInstrInfo::isSignOrZeroExtended(), isSimilarDispOp(), isValidDispOp(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::WebAssembly::mayThrow(), llvm::AsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintSymbolOperand(), llvm::AsmPrinter::PrintSymbolOperand(), queryCallee(), llvm::DetectRoundChange::runOnMachineFunction(), setOffset(), smallData(), and swapRegAndNonRegOperand().
bool MachineOperand::isIdenticalTo | ( | const MachineOperand & | Other | ) | const |
Returns true if this operand is identical to the specified operand except for liveness related flags (isKill, isUndef and isDead).
isIdenticalTo - Return true if this operand is identical to the specified operand.
Note that this should stay in sync with the hash_value overload below.
Definition at line 301 of file MachineOperand.cpp.
References llvm::lltok::equal, getBlockAddress(), getCFIIndex(), getCImm(), getFPImm(), getGlobal(), getImm(), getIndex(), getInstrRefInstrIndex(), getInstrRefOpIndex(), getIntrinsicID(), getMBB(), getMCSymbol(), getMetadata(), getMFIfAvailable(), llvm::MCRegisterInfo::getNumRegs(), getOffset(), getPredicate(), getReg(), getRegMask(), getRegMaskSize(), getShuffleMask(), getSubReg(), getSymbolName(), getTargetFlags(), getType(), isDef(), llvm_unreachable, MO_BlockAddress, MO_CFIIndex, MO_CImmediate, MO_ConstantPoolIndex, MO_DbgInstrRef, MO_ExternalSymbol, MO_FPImmediate, MO_FrameIndex, MO_GlobalAddress, MO_Immediate, MO_IntrinsicID, MO_JumpTableIndex, MO_MachineBasicBlock, MO_MCSymbol, MO_Metadata, MO_Predicate, MO_Register, MO_RegisterLiveOut, MO_RegisterMask, MO_ShuffleMask, MO_TargetIndex, Other, and TRI.
Referenced by llvm::X86InstrInfo::analyzeBranchPredicate(), llvm::LanaiInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::AArch64InstrInfo::areMemAccessesTriviallyDisjoint(), llvm::RISCVInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::PPCInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::MachineInstr::isEquivalentDbgInstr(), isIdenticalOp(), llvm::MachineInstr::isIdenticalTo(), isImplicitOperandIn(), IsVPNOTEquivalent(), mayOverlapWrite(), memOpsHaveSameBasePtr(), llvm::ARMBaseInstrInfo::produceSameValue(), llvm::AArch64InstrInfo::shouldClusterMemOps(), and llvm::SIInstrInfo::verifyInstruction().
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isImm - Tests if this is a MO_Immediate operand.
Definition at line 328 of file MachineOperand.h.
References MO_Immediate.
Referenced by addConstantComments(), llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::HexagonInstrInfo::analyzeCompare(), areCombinableOperations(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canCompareBeNewValueJump(), canFoldIntoCSel(), canMutatePriorConfig(), llvm::PPCInstrInfo::combineRLWINM(), llvm::SIInstrInfo::convertToThreeAddress(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::PPCFrameLowering::emitEpilogue(), llvm::InstructionSelector::executeMatchTable(), llvm::MachineInstr::findInlineAsmFlagIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::SIInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::X86InstrInfo::getAddrModeFromMemoryOp(), llvm::HexagonInstrInfo::getBaseAndOffset(), llvm::HexagonInstrInfo::getBundleNoShuf(), llvm::HexagonInstrInfo::getCompoundOpcode(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::R600InstrInfo::getFlagOp(), getImm(), getImmedFromMO(), llvm::HexagonInstrInfo::getIncrementValue(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsOffsetOperand(), llvm::X86InstrInfo::getMemOperandsWithOffsetWidth(), llvm::LanaiInstrInfo::getMemOperandWithOffsetWidth(), llvm::RISCVInstrInfo::getMemOperandWithOffsetWidth(), llvm::AArch64InstrInfo::getMemOperandWithOffsetWidth(), llvm::PPCInstrInfo::getMemOperandWithOffsetWidth(), getRegImmPairPreventingCompression(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::R600InstrInfo::getSrcs(), getStoreOffset(), if(), llvm::HexagonInstrInfo::immediateExtend(), indirectCopyToAGPR(), INITIALIZE_PASS(), llvm::PPCInstrInfo::isADDIInstrEligibleForFolding(), llvm::MipsInstrInfo::isAddImmediate(), isAnImmediateOperand(), isCandidate(), llvm::HexagonInstrInfo::isConstExtended(), isConvertibleLEA(), llvm::MachineInstr::isDebugOffsetImm(), isIdentityValue(), llvm::PPCInstrInfo::isImmInstrEligibleForFolding(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::SIInstrInfo::isInlineConstant(), isInvariantStore(), llvm::SIInstrInfo::isLegalVSrcOperand(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), isLoadStoreThatCanHandleDisplacement(), isNonZeroAVL(), llvm::SIInstrInfo::isOperandLegal(), isRelevantAddressingMode(), isSafeToFoldImmIntoCopy(), llvm::isScale(), isSimilarDispOp(), llvm::HexagonInstrInfo::isStoreToStackSlot(), isValidDispOp(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::SIInstrInfo::moveToVALU(), needReorderStoreMI(), llvm::SIInstrInfo::optimizeCompareInstr(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::MachineInstr::print(), llvm::LoongArchAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), llvm::LoongArchAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::AMDGPUAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), llvm::AsmPrinter::PrintAsmOperand(), llvm::recomputeVPTBlockMask(), llvm::SIRegisterInfo::resolveFrameIndex(), llvm::HexagonInstrInfo::setBundleNoShuf(), setImm(), swapRegAndNonRegOperand(), llvm::X86InstrInfo::unfoldMemoryOperand(), verifyInsExtInstruction(), llvm::RISCVInstrInfo::verifyInstruction(), and llvm::SIInstrInfo::verifyInstruction().
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Definition at line 386 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), canRenameUpToDef(), llvm::TargetSchedModel::computeOperandLatency(), llvm::MachineInstr::copyImplicitOps(), llvm::HexagonHazardRecognizer::EmitInstruction(), llvm::PPCInstrInfo::getInstrLatency(), getMopState(), llvm::PatchPointOpers::getNextScratchIdx(), llvm::MachineInstr::getNumExplicitDefs(), llvm::MachineInstr::getNumExplicitOperands(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::getRegState(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), insertSEH(), isCandidate(), llvm::WebAssembly::isChild(), llvm::SIInstrInfo::isIgnorableUse(), isValidExcessOperand(), llvm::WebAssemblyMCInstLower::lower(), llvm::lowerLoongArchMachineOperandToMCOperand(), llvm::CSKYMCInstLower::lowerOperand(), llvm::XCoreMCInstLower::LowerOperand(), llvm::ARCMCInstLower::LowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::M68kMCInstLower::LowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineOperandToMCOperand(), llvm::lowerRISCVMachineOperandToMCOperand(), print(), llvm::MachineInstr::print(), printImplicitRegisterFlag(), llvm::PPCInstrInfo::replaceInstrOperandWithImm(), llvm::tryFoldSPUpdateIntoPushPop(), llvm::SIInstrInfo::usesConstantBus(), llvm::SIInstrInfo::verifyInstruction(), and VerifyLowRegs().
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Definition at line 437 of file MachineOperand.h.
References assert(), and isReg().
Referenced by CreateReg(), llvm::getRegState(), INITIALIZE_PASS(), print(), and readsReg().
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Definition at line 358 of file MachineOperand.h.
References MO_IntrinsicID.
Referenced by llvm::InstructionSelector::executeMatchTable(), getIntrinsicID(), and setIntrinsicID().
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isJTI - Tests if this is a MO_JumpTableIndex operand.
Definition at line 342 of file MachineOperand.h.
References MO_JumpTableIndex.
Referenced by canFoldAsPredicatedOp(), getIndex(), GetSymbolRef(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), lowerSymbolOperand(), LowerSymbolOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::BPFMCInstLower::LowerSymbolOperand(), llvm::LanaiMCInstLower::LowerSymbolOperand(), llvm::MSP430MCInstLower::LowerSymbolOperand(), llvm::M68kMCInstLower::LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandCOFF(), llvm::AArch64MCInstLower::lowerSymbolOperandDarwin(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), setIndex(), and smallData().
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Definition at line 396 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterKilled(), llvm::AnalyzePhysRegInBundle(), ChangeToRegister(), llvm::MachineInstr::clearRegisterKills(), combineFPFusedMultiply(), llvm::PPCInstrInfo::combineRLWINM(), copyFlagsToImplicitVCC(), CreateReg(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::finalizeBundle(), llvm::MachineInstr::findRegisterUseOperandIdx(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), llvm::SIInstrInfo::FoldImmediate(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), genFusedMultiply(), genSubAdd2SubSub(), getMopState(), llvm::getRegState(), insertDivByZeroTrap(), llvm::MachineInstr::isIdenticalTo(), llvm::PPCInstrInfo::isImmInstrEligibleForFolding(), isOperandKill(), llvm::PPCInstrInfo::isValidToBeChangedReg(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::PPCInstrInfo::optimizeCmpPostRA(), preserveCondRegFlags(), print(), llvm::TargetInstrInfo::reassociateOps(), llvm::LiveVariables::removeVirtualRegistersKilled(), swapRegAndNonRegOperand(), UpdateCPSRUse(), updateKillStatus(), and updatePhysDepsDownwards().
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isMBB - Tests if this is a MO_MachineBasicBlock operand.
Definition at line 334 of file MachineOperand.h.
References MO_MachineBasicBlock.
Referenced by llvm::HexagonInstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::HexagonInstrInfo::getDotNewPredJumpOp(), getMBB(), llvm::M68kMCInstLower::GetSymbolFromOperand(), getTargetMBB(), llvm::HexagonInstrInfo::immediateExtend(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), lowerSymbolOperand(), LowerSymbolOperand(), llvm::M68kMCInstLower::LowerSymbolOperand(), llvm::TargetInstrInfo::PredicateInstruction(), processSwitches(), setMBB(), and splitEdge().
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Definition at line 355 of file MachineOperand.h.
References MO_MCSymbol.
Referenced by emitDirectiveRelocJalr(), llvm::MipsInstrInfo::genInstrWithNewOpc(), getMCSymbol(), getOffset(), isSimilarDispOp(), isValidDispOp(), isValidExcessOperand(), and setOffset().
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isMetadata - Tests if this is a MO_Metadata operand.
Definition at line 354 of file MachineOperand.h.
References MO_Metadata.
Referenced by getMetadata(), isValidExcessOperand(), llvm::MachineInstr::print(), and setMetadata().
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Definition at line 359 of file MachineOperand.h.
References MO_Predicate.
Referenced by llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::InstructionSelector::executeMatchTable(), getPredicate(), and setPredicate().
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isReg - Tests if this is a MO_Register operand.
Definition at line 326 of file MachineOperand.h.
References MO_Register.
Referenced by addLiveInRegs(), llvm::GISelInstProfileBuilder::addNodeIDMachineOperand(), llvm::MachineInstr::addOperand(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), addTargetFlag(), llvm::HexagonSubtarget::adjustSchedDependency(), llvm::MachineInstr::allDefsAreDead(), llvm::AnalyzePhysRegInBundle(), llvm::AnalyzeVirtRegInBundle(), llvm::HexagonSubtarget::BankConflictMutation::apply(), llvm::RegisterBankInfo::applyDefaultMapping(), llvm::buildAtomicCompareExchangeInst(), llvm::buildEnqueueKernel(), llvm::BuildMI(), llvm::ScheduleDAGInstrs::buildSchedGraph(), canCombine(), canCombineFPFusedMultiply(), llvm::HexagonInstrInfo::canExecuteInBundle(), canFoldAsPredicatedOp(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), canRenameUpToDef(), llvm::SIInstrInfo::canShrink(), ChangeToDbgInstrRef(), ChangeToES(), ChangeToFPImmediate(), ChangeToFrameIndex(), ChangeToGA(), ChangeToImmediate(), ChangeToMCSymbol(), ChangeToRegister(), ChangeToTargetIndex(), checkRegOnlyPHIInputs(), llvm::checkVOPDRegConstraints(), llvm::MachineInstr::clearKillInfo(), llvm::MachineInstr::clearRegisterDeads(), llvm::MachineInstr::clearRegisterKills(), collectRegDefs(), llvm::SIInstrInfo::commuteInstructionImpl(), llvm::RegBankSelect::computeMapping(), llvm::constrainSelectedInstRegOperands(), llvm::SIInstrInfo::convertToThreeAddress(), llvm::MachineInstr::copyImplicitOps(), copyRegOperand(), llvm::X86InstrInfo::describeLoadedValue(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), emitIndirectDst(), llvm::HexagonHazardRecognizer::EmitInstruction(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::TargetLoweringBase::emitPatchPoint(), eraseGPOpnd(), llvm::InstructionSelector::executeMatchTable(), llvm::finalizeBundle(), findDeadCallerSavedReg(), llvm::X86RegisterInfo::findDeadCallerSavedReg(), findDefIdx(), findNextInsertLocation(), findOnlyInterestingUse(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), llvm::MachineInstr::findTiedOperandIdx(), findUseIdx(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), llvm::SIInstrInfo::FoldImmediate(), FuseInst(), llvm::generateEnqueueInst(), llvm::getAddressFromInstr(), getBaseAddressRegister(), llvm::getBlockStructInstr(), getCallTargetRegOpnd(), getDataDeps(), getDefRegMask(), getFMAPatterns(), getFMULPatterns(), getFoldableImm(), getFPReg(), llvm::MachineInstrExpressionTrait::getHashValue(), getImmedFromMO(), llvm::PPCInstrInfo::getInstrLatency(), llvm::ARMRegisterBankInfo::getInstrMapping(), llvm::RegisterBankInfo::getInstrMappingImpl(), llvm::SIInstrInfo::getInstructionUniformity(), getMaddPatterns(), llvm::SIInstrInfo::getMemOperandsWithOffsetWidth(), llvm::HexagonInstrInfo::getMemOperandsWithOffsetWidth(), llvm::X86InstrInfo::getMemOperandsWithOffsetWidth(), llvm::LanaiInstrInfo::getMemOperandWithOffsetWidth(), llvm::RISCVInstrInfo::getMemOperandWithOffsetWidth(), llvm::AArch64InstrInfo::getMemOperandWithOffsetWidth(), llvm::PPCInstrInfo::getMemOperandWithOffsetWidth(), llvm::ReachingDefAnalysis::getMIOperand(), llvm::PatchPointOpers::getNextScratchIdx(), llvm::MachineInstr::getNumExplicitDefs(), llvm::MachineInstr::getNumExplicitOperands(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpSize(), getPostIncrementOperand(), getReg(), llvm::MachineInstr::getRegClassConstraintEffect(), getRegOrUndef(), llvm::getRegState(), llvm::RegBankSelect::getRepairCost(), getShuffleComment(), getSubReg(), getTargetFlags(), getUsedRegMask(), llvm::getVRegSubRegDef(), llvm::LiveIntervals::handleMoveIntoNewBundle(), hasLiveThroughUse(), llvm::TargetInstrInfo::hasReassociableOperands(), hasRegisterDependency(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), hasSameBaseOpValue(), indirectCopyToAGPR(), INITIALIZE_PASS(), insertSEH(), llvm::MipsInstrInfo::isAddImmediate(), llvm::AArch64InstrInfo::isAddImmediate(), llvm::ARMBaseInstrInfo::isAddImmediate(), isArithmeticBccPair(), llvm::InstructionSelector::isBaseWithConstantOffset(), isCandidate(), llvm::WebAssembly::isChild(), isDead(), isDebug(), isDef(), isEarlyClobber(), isIdenticalOp(), llvm::MachineInstr::isIdenticalTo(), isImm(), llvm::PPCInstrInfo::isImmInstrEligibleForFolding(), isImplicit(), llvm::MachineInstr::isIndirectDebugValue(), llvm::SIInstrInfo::isInlineConstant(), isInternalRead(), isInvariantStore(), isKill(), isLdStSafeToCluster(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), llvm::SIInstrInfo::isLegalVSrcOperand(), isLogicalOpOnExec(), llvm::SMSchedule::isLoopCarriedDefOfUse(), isLUIADDI(), isMMSourceRegister(), isMMThreeBitGPRegister(), isNonZeroAVL(), llvm::InstructionSelector::isOperandImmEqual(), llvm::SIInstrInfo::isOperandLegal(), llvm::M68kInstrInfo::isPCRelRegisterOperandLegal(), isRedundantFlagInstr(), isRegInClass(), llvm::MachineInstr::isRegTiedToDefOperand(), llvm::MachineInstr::isRegTiedToUseOperand(), isRelevantAddressingMode(), isRenamable(), IsSafeAndProfitableToMove(), isTied(), isTileDef(), isTileRegDef(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), isTwoAddrUse(), isUndef(), isUse(), isValidExcessOperand(), isVirtualRegisterOperand(), isWaitInstr(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::Mips16InstrInfo::loadImmediate(), llvm::WebAssemblyMCInstLower::lower(), LowerCallResults(), llvm::MIPatternMatch::operand_type_match::match(), llvm::CombinerHelper::matchConstantOp(), llvm::CombinerHelper::matchEqualDefs(), llvm::CombinerHelper::matchHoistLogicOpWithSameOpcodeHands(), llvm::CombinerHelper::matchOperandIsUndef(), mergeOperations(), MIIsInTerminatorSequence(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), oneUseDominatesOtherUses(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::MachineInstr::print(), llvm::LoongArchAsmPrinter::PrintAsmMemoryOperand(), llvm::AVRAsmPrinter::PrintAsmMemoryOperand(), llvm::CSKYAsmPrinter::PrintAsmMemoryOperand(), llvm::ARMAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), llvm::AVRAsmPrinter::PrintAsmOperand(), llvm::SystemZAsmPrinter::PrintAsmOperand(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::AMDGPUAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), llvm::AsmPrinter::PrintAsmOperand(), processSwitches(), producesFalseLanesZero(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), TransferTracker::redefVar(), reduceDbgValsBackwardScan(), reduceDbgValsForwardScan(), RemoveDeadAddBetweenLEAAndJT(), removeMapRegEntry(), removeRegisterOperands(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), llvm::PPCFrameLowering::replaceFPWithRealFP(), rescheduleCanonically(), llvm::R600SchedStrategy::schedNode(), setImplicit(), setIsDead(), setIsDebug(), setIsDef(), setIsEarlyClobber(), setIsInternalRead(), setIsKill(), setIsRenamable(), setIsUndef(), llvm::MachineInstr::setPhysRegsDeadExcept(), llvm::MachineInstr::setRegisterDefReadUndef(), setSubReg(), setTargetFlags(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::PPCInstrInfo::shouldClusterMemOps(), SinkingPreventsImplicitNullCheck(), llvm::MachineInstr::substituteRegister(), llvm::tryFoldSPUpdateIntoPushPop(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::MachineInstr::untieRegOperand(), UpdateCPSRDef(), UpdateCPSRUse(), updateKillStatus(), UpdateOperandRegClass(), updateOperandRegConstraints(), updatePhysDepsDownwards(), updatePhysDepsUpwards(), UseReg(), llvm::SIInstrInfo::usesConstantBus(), llvm::RegisterBankInfo::InstructionMapping::verify(), llvm::SIInstrInfo::verifyInstruction(), VerifyLowRegs(), llvm::MachineRegisterInfo::verifyUseList(), and llvm::WebAssemblyDebugValueManager::WebAssemblyDebugValueManager().
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isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
Definition at line 352 of file MachineOperand.h.
References MO_RegisterLiveOut.
Referenced by getRegLiveOut().
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isRegMask - Tests if this is a MO_RegisterMask operand.
Definition at line 350 of file MachineOperand.h.
References MO_RegisterMask.
Referenced by llvm::AnalyzePhysRegInBundle(), llvm::MachineInstr::copyImplicitOps(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::ScheduleDAGInstrs::fixupKills(), getRegMask(), isValidExcessOperand(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), removeMapRegEntry(), llvm::MachineInstr::setPhysRegsDeadExcept(), setRegMask(), and llvm::MIRParserImpl::setupRegisterInfo().
bool MachineOperand::isRenamable | ( | ) | const |
isRenamable - Returns true if this register may be renamed, i.e.
it does not generate a value that is somehow read in a way that is not represented by the Machine IR (e.g. to meet an ABI or ISA requirement). This is only valid on physical register operands. Virtual registers are assumed to always be renamable regardless of the value of this field.
Operands that are renamable can freely be changed to any other register that is a member of the register class returned by MI->getRegClassConstraint().
isRenamable can return false for several different reasons:
Definition at line 119 of file MachineOperand.cpp.
References assert(), getParent(), getReg(), llvm::MachineInstr::IgnoreBundle, isDef(), isReg(), isUse(), and MI.
Referenced by canRenameUpToDef(), CreateReg(), getMopState(), llvm::getRegState(), and print().
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Definition at line 360 of file MachineOperand.h.
References MO_ShuffleMask.
Referenced by getShuffleMask().
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isSymbol - Tests if this is a MO_ExternalSymbol operand.
Definition at line 346 of file MachineOperand.h.
References MO_ExternalSymbol.
Referenced by getOffset(), GetSymbolFromOperand(), llvm::M68kMCInstLower::GetSymbolFromOperand(), getSymbolName(), isCandidate(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::WebAssembly::mayThrow(), optimizeCall(), and setOffset().
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isTargetIndex - Tests if this is a MO_TargetIndex operand.
Definition at line 340 of file MachineOperand.h.
References MO_TargetIndex.
Referenced by getIndex(), getOffset(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::SIInstrInfo::isLegalVSrcOperand(), llvm::SIInstrInfo::isOperandLegal(), setIndex(), and setOffset().
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Definition at line 447 of file MachineOperand.h.
References assert(), and isReg().
Referenced by canFoldAsPredicatedOp(), canRenameUpToDef(), ChangeToDbgInstrRef(), ChangeToES(), ChangeToFPImmediate(), ChangeToFrameIndex(), ChangeToGA(), ChangeToImmediate(), ChangeToMCSymbol(), ChangeToTargetIndex(), llvm::TargetLoweringBase::emitPatchPoint(), llvm::MachineInstr::findTiedOperandIdx(), llvm::MachineInstr::isRegTiedToDefOperand(), llvm::MachineInstr::isRegTiedToUseOperand(), print(), llvm::MachineInstr::print(), llvm::MachineInstr::tieOperands(), and llvm::MachineInstr::untieRegOperand().
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Definition at line 401 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterKilled(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), allPhiOperandsUndefined(), ChangeToRegister(), copyFlagsToImplicitVCC(), CreateReg(), emitLoadM0FromVGPRLoop(), emitLoadSRsrcFromVGPRLoop(), llvm::HexagonInstrInfo::expandPostRAPseudo(), expandSHXDROT(), llvm::finalizeBundle(), findUseBetween(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), getMopState(), getRegOrUndef(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), llvm::getRegState(), llvm::getVRegSubRegDef(), llvm::LiveIntervals::handleMoveIntoNewBundle(), llvm::HexagonInstrInfo::insertBranch(), mergeOperations(), preserveCondRegFlags(), print(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), llvm::MachineBasicBlock::SplitCriticalEdge(), swapRegAndNonRegOperand(), UpdateCPSRDef(), and UpdateCPSRUse().
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Definition at line 376 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addOperand(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterKilled(), llvm::HexagonSubtarget::adjustSchedDependency(), llvm::MachineInstr::allDefsAreDead(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::MachineInstr::clearKillInfo(), llvm::MachineInstr::clearRegisterKills(), llvm::constrainOperandRegClass(), llvm::constrainSelectedInstRegOperands(), copyRegOperand(), findOnlyInterestingUse(), llvm::MachineInstr::findRegisterUseOperandIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), getCallTargetRegOpnd(), getUsedRegMask(), hasRegisterDependency(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), llvm::MachineInstr::isRegTiedToDefOperand(), isRenamable(), isTwoAddrUse(), isValidRegUse(), producesFalseLanesZero(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), RemoveDeadAddBetweenLEAAndJT(), llvm::MachineInstr::tieOperands(), UpdateCPSRDef(), llvm::SIInstrInfo::usesConstantBus(), and llvm::SIInstrInfo::verifyInstruction().
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Return true if this operand can validly be appended to an arbitrary operand list.
i.e. this behaves like an implicit operand.
Definition at line 471 of file MachineOperand.h.
References isImplicit(), isMCSymbol(), isMetadata(), isReg(), and isRegMask().
void MachineOperand::print | ( | raw_ostream & | os, |
const TargetRegisterInfo * | TRI = nullptr , |
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const TargetIntrinsicInfo * | IntrinsicInfo = nullptr |
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) | const |
Print the MachineOperand to os
.
Providing a valid TRI
and IntrinsicInfo
results in a more target-specific printing. If TRI
and IntrinsicInfo
are null, the function will try to pick it up from the parent.
Definition at line 761 of file MachineOperand.cpp.
References TRI.
Referenced by llvm::operator<<(), print(), and llvm::MachineInstr::print().
void MachineOperand::print | ( | raw_ostream & | os, |
LLT | TypeToPrint, | ||
const TargetRegisterInfo * | TRI = nullptr , |
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const TargetIntrinsicInfo * | IntrinsicInfo = nullptr |
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) | const |
Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level type to be printed the same way the full version of print(...) does it.
Definition at line 766 of file MachineOperand.cpp.
References print(), TRI, and tryToGetTargetInfo().
void MachineOperand::print | ( | raw_ostream & | os, |
ModuleSlotTracker & | MST, | ||
LLT | TypeToPrint, | ||
std::optional< unsigned > | OpIdx, | ||
bool | PrintDef, | ||
bool | IsStandalone, | ||
bool | ShouldPrintRegisterTies, | ||
unsigned | TiedOperandIdx, | ||
const TargetRegisterInfo * | TRI, | ||
const TargetIntrinsicInfo * | IntrinsicInfo | ||
) | const |
More complex way of printing a MachineOperand.
TypeToPrint | specifies the generic type to be printed on uses and defs. It can be determined using MachineInstr::getTypeToPrint. |
OpIdx | - specifies the index of the operand in machine instruction. This will be used by target dependent MIR formatter. Could be std::nullopt if the index is unknown, e.g. called by dump(). |
PrintDef | - whether we want to print def on an operand which isDef. Sometimes, if the operand is printed before '=', we don't print def . |
IsStandalone | - whether we want a verbose output of the MO. This prints extra information that can be easily inferred when printing the whole function, but not when printing only a fragment of it. |
ShouldPrintRegisterTies | - whether we want to print register ties. Sometimes they are easily determined by the instruction's descriptor (MachineInstr::hasComplexRegiterTies can determine if it's needed). |
TiedOperandIdx | - if we need to print register ties this needs to provide the index of the tied register. If not, it will be ignored. |
TRI | - provide more target-specific information to the printer. Unlike the previous function, this one will not try and get the information from it's parent. |
IntrinsicInfo | - same as TRI . |
Definition at line 777 of file MachineOperand.cpp.
References assert(), llvm::MachineRegisterInfo::def_empty(), E, llvm::ISD::FrameIndex, llvm::Intrinsic::getBaseName(), getBlockAddress(), getCFIIndex(), getCImm(), getFPImm(), llvm::BlockAddress::getFunction(), getGlobal(), getImm(), getIndex(), getInstrRefInstrIndex(), getInstrRefOpIndex(), getIntrinsicID(), getMBB(), getMCSymbol(), getMetadata(), getMFIfAvailable(), llvm::TargetIntrinsicInfo::getName(), llvm::MCRegisterInfo::getNumRegs(), getOffset(), getParent(), getPredicate(), llvm::CmpInst::getPredicateName(), getReg(), getRegLiveOut(), getRegMask(), getShuffleMask(), getSubReg(), llvm::TargetRegisterInfo::getSubRegIndexName(), getSymbolName(), getTargetIndexName(), getType(), i, isDead(), isDef(), isEarlyClobber(), isImplicit(), isInternalRead(), llvm::CmpInst::isIntPredicate(), isKill(), llvm::Register::isPhysical(), isRenamable(), isTied(), isUndef(), llvm::LLT::isValid(), llvm::BitmaskEnumDetail::Mask(), MO_BlockAddress, MO_CFIIndex, MO_CImmediate, MO_ConstantPoolIndex, MO_DbgInstrRef, MO_ExternalSymbol, MO_FPImmediate, MO_FrameIndex, MO_GlobalAddress, MO_Immediate, MO_IntrinsicID, MO_JumpTableIndex, MO_MachineBasicBlock, MO_MCSymbol, MO_Metadata, MO_Predicate, MO_Register, MO_RegisterLiveOut, MO_RegisterMask, MO_ShuffleMask, MO_TargetIndex, MRI, llvm::Metadata::printAsOperand(), llvm::Value::printAsOperand(), printCFI(), printFrameIndex(), llvm::MIRFormatter::printImm(), printIRBlockReference(), llvm::printJumpTableEntryReference(), llvm::printLLVMNameWithoutPrefix(), llvm::printMBBReference(), printOperandOffset(), llvm::printReg(), llvm::printRegClassOrBank(), PrintRegMaskNumRegs, printSymbol(), printTargetFlags(), SubReg, TII, and TRI.
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Print an IRSlotNumber.
Definition at line 639 of file MachineOperand.cpp.
Referenced by printIRBlockReference(), and llvm::MIRFormatter::printIRValue().
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Print the offset with explicit +/- signs.
Definition at line 629 of file MachineOperand.cpp.
References llvm::Offset.
Referenced by print(), and llvm::MachineMemOperand::print().
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Print a stack object reference.
Definition at line 616 of file MachineOperand.cpp.
References llvm::ISD::FrameIndex.
Referenced by llvm::yaml::ScalarTraits< FrameIndex >::output(), printFrameIndex(), and llvm::MIPrinter::printStackObjectReference().
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Print a subreg index operand.
MO_Immediate operands can also be subreg idices. If it's the case, the subreg index name will be printed. MachineInstr::isOperandSubregIdx can be called to check this.
Definition at line 551 of file MachineOperand.cpp.
References llvm::TargetRegisterInfo::getSubRegIndexName(), Index, and TRI.
Referenced by llvm::MIPrinter::print(), and llvm::MachineInstr::print().
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Print a MCSymbol as an operand.
Definition at line 612 of file MachineOperand.cpp.
Referenced by llvm::MIPrinter::print(), print(), llvm::MachineInstr::print(), and printCFI().
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Print operand target flags.
Definition at line 560 of file MachineOperand.cpp.
References assert(), llvm::HexagonInstrInfo::decomposeMachineOperandsTargetFlags(), llvm::TargetSubtargetInfo::getInstrInfo(), getMFIfAvailable(), llvm::HexagonInstrInfo::getSerializableBitmaskMachineOperandTargetFlags(), llvm::MachineFunction::getSubtarget(), getTargetFlagName(), llvm::BitmaskEnumDetail::Mask(), and TII.
Referenced by llvm::MIPrinter::print(), and print().
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readsReg - Returns true if this operand reads the previous value of its register.
A use operand with the <undef> flag set doesn't read its register. A sub-register def implicitly reads the other parts of the register being redefined unless the <undef> flag is set.
This refers to reading the register value from before the current instruction or bundle. Internal bundle reads are not included.
Definition at line 464 of file MachineOperand.h.
References assert(), getSubReg(), isInternalRead(), isReg(), isUndef(), and isUse().
Referenced by llvm::AnalyzePhysRegInBundle(), llvm::AnalyzeVirtRegInBundle(), llvm::ScheduleDAGInstrs::buildSchedGraph(), findUseIdx(), getDataDeps(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::X86InstrInfo::getPartialRegUpdateClearance(), updatePhysDepsDownwards(), and updatePhysDepsUpwards().
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Definition at line 686 of file MachineOperand.h.
References assert(), and isCImm().
Referenced by llvm::LegalizerHelper::widenScalar().
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Definition at line 691 of file MachineOperand.h.
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Definition at line 681 of file MachineOperand.h.
References assert(), and isImm().
Referenced by llvm::R600InstrInfo::addFlag(), llvm::SwingSchedulerDAG::applyInstrChange(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), llvm::R600InstrInfo::clearFlag(), llvm::ARMBaseInstrInfo::commuteInstructionImpl(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), fixupCalleeSaveRestoreStackOffset(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), fixupSEHOpcode(), llvm::R600InstrInfo::insertBranch(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::SystemZInstrInfo::prepareCompareSwapOperands(), llvm::SIRegisterInfo::resolveFrameIndex(), llvm::R600InstrInfo::reverseBranchCondition(), llvm::HexagonInstrInfo::setBundleNoShuf(), llvm::SIInstrInfo::swapSourceModifiers(), updateOperandIfDifferent(), and updateOperands().
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Definition at line 511 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::X86InstrInfo::classifyLEAReg(), llvm::SIInstrInfo::insertVectorSelect(), makeImplicit(), llvm::LanaiInstrInfo::optimizeSelect(), and llvm::ARMBaseInstrInfo::optimizeSelect().
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Definition at line 704 of file MachineOperand.h.
References assert(), isCPI(), isFI(), isJTI(), and isTargetIndex().
Referenced by ChangeToFrameIndex(), and ChangeToTargetIndex().
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Definition at line 715 of file MachineOperand.h.
References assert(), and isDbgInstrRef().
Referenced by ChangeToDbgInstrRef().
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Definition at line 719 of file MachineOperand.h.
References assert(), and isDbgInstrRef().
Referenced by ChangeToDbgInstrRef().
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Definition at line 738 of file MachineOperand.h.
References assert(), and isIntrinsicID().
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Definition at line 522 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterDead(), buildScratchExecCopy(), llvm::MachineInstr::clearRegisterDeads(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), copyRegOperand(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::LiveIntervals::handleMoveIntoNewBundle(), maybeRewriteToDrop(), llvm::SIInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::SGPRSpillBuilder::readWriteTmpVGPR(), llvm::X86FrameLowering::restoreWin32EHStackPointers(), llvm::MachineInstr::setPhysRegsDeadExcept(), llvm::X86InstrInfo::setSpecialOperandAttr(), and transferDeadCC().
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Definition at line 544 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addOperand().
void MachineOperand::setIsDef | ( | bool | Val = true | ) |
Change a def to a use, or a use to a def.
Definition at line 102 of file MachineOperand.cpp.
References llvm::MachineRegisterInfo::addRegOperandToUseList(), assert(), getMFIfAvailable(), isDebug(), isReg(), MRI, and llvm::MachineRegisterInfo::removeRegOperandFromUseList().
Referenced by llvm::RevertLoopDec(), and setIsUse().
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Definition at line 539 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addOperand().
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Definition at line 534 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::finalizeBundle(), and INITIALIZE_PASS().
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Definition at line 516 of file MachineOperand.h.
References assert(), isDebug(), and isReg().
Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterKilled(), clearKillFlags(), llvm::MachineInstr::clearKillInfo(), llvm::MachineInstr::clearRegisterKills(), combineFPFusedMultiply(), llvm::PPCInstrInfo::combineRLWINM(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::R600InstrInfo::copyPhysReg(), copyRegOperand(), llvm::SIRegisterInfo::eliminateFrameIndex(), emitLoadSRsrcFromVGPRLoop(), llvm::PPCInstrInfo::fixupIsDeadOrKill(), llvm::SIInstrInfo::FoldImmediate(), indirectCopyToAGPR(), llvm::SIInstrInfo::insertBranch(), insertDivByZeroTrap(), llvm::X86InstrInfo::loadStoreTileReg(), MoveVPNOTBeforeFirstUser(), llvm::AArch64InstrInfo::optimizeCondBranch(), preserveCondRegFlags(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::X86InstrInfo::unfoldMemoryOperand(), and updateKillStatus().
void MachineOperand::setIsRenamable | ( | bool | Val = true | ) |
Definition at line 137 of file MachineOperand.cpp.
References assert(), getReg(), and isReg().
Referenced by llvm::TargetInstrInfo::commuteInstructionImpl().
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Definition at line 527 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::TargetInstrInfo::commuteInstructionImpl(), copyRegOperand(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SIInstrInfo::insertBranch(), mergeOperations(), preserveCondRegFlags(), llvm::MachineInstr::setRegisterDefReadUndef(), and substPhysReg().
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Definition at line 506 of file MachineOperand.h.
References setIsDef().
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Definition at line 724 of file MachineOperand.h.
References assert(), isMBB(), and MBB.
Referenced by llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::LoongArchInstrInfo::insertIndirectBranch(), llvm::AMDGPULegalizerInfo::legalizeIntrinsic(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::MachineBasicBlock::replacePhiUsesWith(), splitEdge(), and updatePHIs().
Definition at line 710 of file MachineOperand.h.
References assert(), and isMetadata().
Referenced by llvm::salvageDebugInfoForDbgValue(), and llvm::updateDbgValueForSpill().
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Definition at line 696 of file MachineOperand.h.
References assert(), int, isBlockAddress(), isCPI(), isGlobal(), isMCSymbol(), isSymbol(), isTargetIndex(), and llvm::Offset.
Referenced by ChangeToES(), ChangeToGA(), and ChangeToTargetIndex().
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Definition at line 743 of file MachineOperand.h.
References assert(), and isPredicate().
Referenced by llvm::CombinerHelper::applyNotCmp().
void MachineOperand::setReg | ( | Register | Reg | ) |
Change the register this operand corresponds to.
Definition at line 56 of file MachineOperand.cpp.
References llvm::MachineRegisterInfo::addRegOperandToUseList(), getMFIfAvailable(), getReg(), MRI, and llvm::MachineRegisterInfo::removeRegOperandFromUseList().
Referenced by llvm::CombinerHelper::applyCombineExtendingLoads(), llvm::RegisterBankInfo::applyDefaultMapping(), llvm::SwingSchedulerDAG::applyInstrChange(), llvm::CombinerHelper::applyOptBrCondByInvertingCond(), llvm::LegalizerHelper::bitcastDst(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::constrainOperandRegClass(), copyRegOperand(), copySubReg(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), emitLoadSRsrcFromVGPRLoop(), llvm::M68kInstrInfo::ExpandCCR(), ExpandMOVImmSExti8(), llvm::M68kInstrInfo::ExpandMOVSZX_RM(), llvm::M68kInstrInfo::ExpandMOVX_RR(), expandNOVLXLoad(), expandNOVLXStore(), llvm::X86InstrInfo::expandPostRAPseudo(), llvm::SwingSchedulerDAG::fixupRegisterOverlaps(), llvm::SIInstrInfo::FoldImmediate(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::SIInstrInfo::legalizeOperandsFLAT(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::X86InstrInfo::loadStoreTileReg(), llvm::X86CallLowering::lowerCall(), llvm::AMDGPUCallLowering::lowerTailCall(), maybeRewriteToDrop(), llvm::LegalizerHelper::moreElementsVectorDst(), llvm::LegalizerHelper::moreElementsVectorSrc(), moveAndTeeForMultiUse(), llvm::PeelingModuloScheduleExpander::moveStageBetweenBlocks(), llvm::SIInstrInfo::moveToVALU(), llvm::LegalizerHelper::narrowScalar(), llvm::LegalizerHelper::narrowScalarDst(), llvm::LegalizerHelper::narrowScalarSrc(), llvm::PeelSingleBlockLoop(), llvm::R600InstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), processInstr(), reinsertVectorIndexAdd(), llvm::PPCFrameLowering::replaceFPWithRealFP(), llvm::CombinerHelper::replaceRegOpWith(), llvm::R600InstrInfo::reverseBranchCondition(), llvm::MachineSSAUpdater::RewriteUse(), llvm::salvageDebugInfoForDbgValue(), selectCopy(), substPhysReg(), substVirtReg(), llvm::LegalizerHelper::widenScalarDst(), and llvm::LegalizerHelper::widenScalarSrc().
Sets value of register mask operand referencing Mask.
The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand. See CreateRegMask(). Any physreg with a 0 bit in the mask is clobbered by the instruction.
Definition at line 733 of file MachineOperand.h.
References assert(), and isRegMask().
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Definition at line 487 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::TargetInstrInfo::commuteInstructionImpl(), copyRegOperand(), llvm::SIInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), insertDivByZeroTrap(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::AArch64InstrInfo::optimizeCondBranch(), substPhysReg(), substVirtReg(), and swapRegAndNonRegOperand().
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Definition at line 229 of file MachineOperand.h.
References assert(), F, and isReg().
Referenced by ChangeToDbgInstrRef(), ChangeToES(), ChangeToFPImmediate(), ChangeToFrameIndex(), ChangeToGA(), ChangeToImmediate(), ChangeToMCSymbol(), ChangeToTargetIndex(), llvm::MipsCallLowering::lowerCall(), and swapRegAndNonRegOperand().
void MachineOperand::substPhysReg | ( | MCRegister | Reg, |
const TargetRegisterInfo & | TRI | ||
) |
substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account.
For instance, substPhysReg(eax) will change reg1024:sub_8bit to al.
Definition at line 88 of file MachineOperand.cpp.
References assert(), getSubReg(), llvm::TargetRegisterInfo::getSubReg(), isDef(), llvm::Register::isPhysicalRegister(), setIsUndef(), setReg(), setSubReg(), and TRI.
Referenced by llvm::MachineInstr::substituteRegister().
void MachineOperand::substVirtReg | ( | Register | Reg, |
unsigned | SubIdx, | ||
const TargetRegisterInfo & | TRI | ||
) |
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.
Take any existing SubReg index into account, using TargetRegisterInfo to compose the subreg indices if necessary. Reg must be a virtual register, SubIdx can be 0.
Definition at line 78 of file MachineOperand.cpp.
References assert(), llvm::TargetRegisterInfo::composeSubRegIndices(), getSubReg(), setReg(), setSubReg(), and TRI.
Referenced by llvm::MachineInstr::substituteRegister().
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Definition at line 997 of file MachineOperand.h.
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MachineOperand hash_value overload.
Note that this includes the same information in the hash that isIdenticalTo uses for comparison. It is thus suited for use in hash tables which use that function for equality comparisons only. This must stay exactly in sync with isIdenticalTo above.
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Definition at line 983 of file MachineOperand.h.
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Definition at line 984 of file MachineOperand.h.
unsigned llvm::MachineOperand::OffsetLo |
Definition at line 160 of file MachineOperand.h.
unsigned llvm::MachineOperand::RegNo |
Definition at line 159 of file MachineOperand.h.