LLVM 22.0.0git
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#include "MCTargetDesc/RISCVBaseInfo.h"
#include "RISCV.h"
#include "RISCVSubtarget.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "riscv-insert-read-write-csr" |
#define | RISCV_INSERT_READ_WRITE_CSR_NAME "RISC-V Insert Read/Write CSR Pass" |
Functions | |
INITIALIZE_PASS (RISCVInsertReadWriteCSR, DEBUG_TYPE, RISCV_INSERT_READ_WRITE_CSR_NAME, false, false) bool RISCVInsertReadWriteCSR |
Variables | |
static cl::opt< bool > | DisableFRMInsertOpt ("riscv-disable-frm-insert-opt", cl::init(false), cl::Hidden, cl::desc("Disable optimized frm insertion.")) |
#define DEBUG_TYPE "riscv-insert-read-write-csr" |
Definition at line 23 of file RISCVInsertReadWriteCSR.cpp.
#define RISCV_INSERT_READ_WRITE_CSR_NAME "RISC-V Insert Read/Write CSR Pass" |
Definition at line 24 of file RISCVInsertReadWriteCSR.cpp.
Referenced by INITIALIZE_PASS().
INITIALIZE_PASS | ( | RISCVInsertReadWriteCSR | , |
DEBUG_TYPE | , | ||
RISCV_INSERT_READ_WRITE_CSR_NAME | , | ||
false | , | ||
false | ) |
Definition at line 61 of file RISCVInsertReadWriteCSR.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), Changed, llvm::MachineOperand::CreateReg(), DEBUG_TYPE, llvm::RISCVFPRndMode::DYN, llvm::RISCVII::getFRMOpNum(), llvm::Register::isValid(), MBB, MI, MRI, Register, RISCV_INSERT_READ_WRITE_CSR_NAME, and TII.