LLVM  14.0.0git
RegisterBank.cpp
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1 //===- llvm/CodeGen/GlobalISel/RegisterBank.cpp - Register Bank --*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file implements the RegisterBank class.
10 //===----------------------------------------------------------------------===//
11 
13 #include "llvm/ADT/StringExtras.h"
15 #include "llvm/Config/llvm-config.h"
16 #include "llvm/Support/Debug.h"
17 
18 #define DEBUG_TYPE "registerbank"
19 
20 using namespace llvm;
21 
22 const unsigned RegisterBank::InvalidID = UINT_MAX;
23 
25  unsigned ID, const char *Name, unsigned Size,
26  const uint32_t *CoveredClasses, unsigned NumRegClasses)
27  : ID(ID), Name(Name), Size(Size) {
28  ContainedRegClasses.resize(NumRegClasses);
29  ContainedRegClasses.setBitsInMask(CoveredClasses);
30 }
31 
33  assert(isValid() && "Invalid register bank");
34  for (unsigned RCId = 0, End = TRI.getNumRegClasses(); RCId != End; ++RCId) {
35  const TargetRegisterClass &RC = *TRI.getRegClass(RCId);
36 
37  if (!covers(RC))
38  continue;
39  // Verify that the register bank covers all the sub classes of the
40  // classes it covers.
41 
42  // Use a different (slow in that case) method than
43  // RegisterBankInfo to find the subclasses of RC, to make sure
44  // both agree on the covers.
45  for (unsigned SubRCId = 0; SubRCId != End; ++SubRCId) {
46  const TargetRegisterClass &SubRC = *TRI.getRegClass(RCId);
47 
48  if (!RC.hasSubClassEq(&SubRC))
49  continue;
50 
51  // Verify that the Size of the register bank is big enough to cover
52  // all the register classes it covers.
53  assert(getSize() >= TRI.getRegSizeInBits(SubRC) &&
54  "Size is not big enough for all the subclasses!");
55  assert(covers(SubRC) && "Not all subclasses are covered");
56  }
57  }
58  return true;
59 }
60 
62  assert(isValid() && "RB hasn't been initialized yet");
63  return ContainedRegClasses.test(RC.getID());
64 }
65 
66 bool RegisterBank::isValid() const {
67  return ID != InvalidID && Name != nullptr && Size != 0 &&
68  // A register bank that does not cover anything is useless.
69  !ContainedRegClasses.empty();
70 }
71 
72 bool RegisterBank::operator==(const RegisterBank &OtherRB) const {
73  // There must be only one instance of a given register bank alive
74  // for the whole compilation.
75  // The RegisterBankInfo is supposed to enforce that.
76  assert((OtherRB.getID() != getID() || &OtherRB == this) &&
77  "ID does not uniquely identify a RegisterBank");
78  return &OtherRB == this;
79 }
80 
81 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
83  print(dbgs(), /* IsForDebug */ true, TRI);
84 }
85 #endif
86 
87 void RegisterBank::print(raw_ostream &OS, bool IsForDebug,
88  const TargetRegisterInfo *TRI) const {
89  OS << getName();
90  if (!IsForDebug)
91  return;
92  OS << "(ID:" << getID() << ", Size:" << getSize() << ")\n"
93  << "isValid:" << isValid() << '\n'
94  << "Number of Covered register classes: " << ContainedRegClasses.count()
95  << '\n';
96  // Print all the subclasses if we can.
97  // This register classes may not be properly initialized yet.
98  if (!TRI || ContainedRegClasses.empty())
99  return;
100  assert(ContainedRegClasses.size() == TRI->getNumRegClasses() &&
101  "TRI does not match the initialization process?");
102  OS << "Covered register classes:\n";
103  ListSeparator LS;
104  for (unsigned RCId = 0, End = TRI->getNumRegClasses(); RCId != End; ++RCId) {
105  const TargetRegisterClass &RC = *TRI->getRegClass(RCId);
106 
107  if (covers(RC))
108  OS << LS << TRI->getRegClassName(&RC);
109  }
110 }
llvm::Check::Size
@ Size
Definition: FileCheck.h:73
llvm::RegisterBank::print
void print(raw_ostream &OS, bool IsForDebug=false, const TargetRegisterInfo *TRI=nullptr) const
Print the register mask on OS.
Definition: RegisterBank.cpp:87
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition: Compiler.h:491
llvm::TargetRegisterClass::getID
unsigned getID() const
Return the register class ID number.
Definition: TargetRegisterInfo.h:71
llvm
---------------------— PointerInfo ------------------------------------—
Definition: AllocatorList.h:23
llvm::TargetRegisterInfo
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Definition: TargetRegisterInfo.h:233
llvm::BitVector::resize
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
Definition: BitVector.h:333
llvm::RegisterBank::isValid
bool isValid() const
Check whether this instance is ready to be used.
Definition: RegisterBank.cpp:66
TRI
unsigned const TargetRegisterInfo * TRI
Definition: MachineSink.cpp:1567
llvm::dbgs
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
llvm::RegisterBank
This class implements the register bank concept.
Definition: RegisterBank.h:28
llvm::BitVector::count
size_type count() const
count - Returns the number of bits which are set.
Definition: BitVector.h:154
llvm::BitVector::size
size_type size() const
size - Returns the number of bits in this bitvector.
Definition: BitVector.h:151
llvm::TargetRegisterClass
Definition: TargetRegisterInfo.h:46
llvm::RegisterBank::verify
bool verify(const TargetRegisterInfo &TRI) const
Check if this register bank is valid.
Definition: RegisterBank.cpp:32
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:53
llvm::RegisterBank::getID
unsigned getID() const
Get the identifier of this register bank.
Definition: RegisterBank.h:47
llvm::BitVector::empty
bool empty() const
empty - Tests whether there are no bits in this bitvector.
Definition: BitVector.h:148
llvm::RegisterBank::operator==
bool operator==(const RegisterBank &OtherRB) const
Check whether OtherRB is the same as this.
Definition: RegisterBank.cpp:72
llvm::TargetRegisterInfo::getRegClass
const TargetRegisterClass * getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
Definition: TargetRegisterInfo.h:739
llvm::TargetRegisterInfo::getRegClassName
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
Definition: TargetRegisterInfo.h:745
StringExtras.h
llvm::RegisterBank::covers
bool covers(const TargetRegisterClass &RC) const
Check whether this register bank covers RC.
Definition: RegisterBank.cpp:61
assert
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
llvm::RegisterBank::dump
void dump(const TargetRegisterInfo *TRI=nullptr) const
Dump the register mask on dbgs() stream.
Definition: RegisterBank.cpp:82
uint32_t
llvm::BitVector::test
bool test(unsigned Idx) const
Definition: BitVector.h:447
llvm::GraphProgram::Name
Name
Definition: GraphWriter.h:52
llvm::TargetRegisterInfo::getRegSizeInBits
unsigned getRegSizeInBits(const TargetRegisterClass &RC) const
Return the size in bits of a register from class RC.
Definition: TargetRegisterInfo.h:276
llvm::RegisterBank::getName
const char * getName() const
Get a user friendly name of this register bank.
Definition: RegisterBank.h:51
llvm::BitVector::setBitsInMask
void setBitsInMask(const uint32_t *Mask, unsigned MaskWords=~0u)
setBitsInMask - Add '1' bits from Mask to this vector.
Definition: BitVector.h:687
llvm::RegisterBank::getSize
unsigned getSize() const
Get the maximal size in bits that fits in this register bank.
Definition: RegisterBank.h:54
llvm::AArch64CC::LS
@ LS
Definition: AArch64BaseInfo.h:264
llvm::TargetRegisterInfo::getNumRegClasses
unsigned getNumRegClasses() const
Definition: TargetRegisterInfo.h:733
RegisterBank.h
llvm::TargetRegisterClass::hasSubClassEq
bool hasSubClassEq(const TargetRegisterClass *RC) const
Returns true if RC is a sub-class of or equal to this class.
Definition: TargetRegisterInfo.h:126
llvm::RegisterBank::RegisterBank
RegisterBank(unsigned ID, const char *Name, unsigned Size, const uint32_t *CoveredClasses, unsigned NumRegClasses)
Definition: RegisterBank.cpp:24
TargetRegisterInfo.h
Debug.h
llvm::Intrinsic::ID
unsigned ID
Definition: TargetTransformInfo.h:37