LLVM 18.0.0git
SIProgramInfo.cpp
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1//===-- SIProgramInfo.cpp ----------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10///
11/// The SIProgramInfo tracks resource usage and hardware flags for kernels and
12/// entry functions.
13//
14//===----------------------------------------------------------------------===//
15//
16
17#include "SIProgramInfo.h"
18#include "SIDefines.h"
20
21using namespace llvm;
22
29}
30
32 if (AMDGPU::isCompute(CC)) {
33 return getComputePGMRSrc1();
34 }
39 switch (CC) {
42 break;
45 break;
48 break;
51 break;
52 default:
53 break;
54 }
55 return Reg;
56}
57
59 uint64_t Reg =
67
68 return Reg;
69}
70
73 return getComputePGMRSrc2();
74
75 return 0;
76}
#define S_00B84C_EXCP_EN(x)
Definition: SIDefines.h:1032
#define S_00B428_MEM_ORDERED(x)
Definition: SIDefines.h:993
#define S_00B028_MEM_ORDERED(x)
Definition: SIDefines.h:969
#define S_00B84C_SCRATCH_EN(x)
Definition: SIDefines.h:1000
#define S_00B84C_TGID_Z_EN(x)
Definition: SIDefines.h:1015
#define S_00B228_WGP_MODE(x)
Definition: SIDefines.h:981
#define S_00B848_MEM_ORDERED(x)
Definition: SIDefines.h:1067
#define S_00B228_MEM_ORDERED(x)
Definition: SIDefines.h:984
#define S_00B84C_TGID_X_EN(x)
Definition: SIDefines.h:1009
#define S_00B848_DEBUG_MODE(x)
Definition: SIDefines.h:1058
#define S_00B428_WGP_MODE(x)
Definition: SIDefines.h:990
#define S_00B848_PRIV(x)
Definition: SIDefines.h:1052
#define S_00B84C_TG_SIZE_EN(x)
Definition: SIDefines.h:1018
#define S_00B84C_TIDIG_COMP_CNT(x)
Definition: SIDefines.h:1021
#define S_00B84C_LDS_SIZE(x)
Definition: SIDefines.h:1029
#define S_00B84C_USER_SGPR(x)
Definition: SIDefines.h:1003
#define S_00B84C_TRAP_HANDLER(x)
Definition: SIDefines.h:1006
#define S_00B84C_TGID_Y_EN(x)
Definition: SIDefines.h:1012
#define S_00B128_MEM_ORDERED(x)
Definition: SIDefines.h:976
#define S_00B848_WGP_MODE(x)
Definition: SIDefines.h:1064
#define S_00B848_SGPRS(x)
Definition: SIDefines.h:1043
#define S_00B84C_EXCP_EN_MSB(x)
Definition: SIDefines.h:1025
#define S_00B848_DX10_CLAMP(x)
Definition: SIDefines.h:1055
#define S_00B848_VGPRS(x)
Definition: SIDefines.h:1040
#define S_00B848_PRIORITY(x)
Definition: SIDefines.h:1046
#define S_00B848_IEEE_MODE(x)
Definition: SIDefines.h:1061
#define S_00B848_FLOAT_MODE(x)
Definition: SIDefines.h:1049
Defines struct to track resource usage and hardware flags for kernels and entry functions.
bool isCompute(CallingConv::ID cc)
@ AMDGPU_VS
Used for Mesa vertex shaders, or AMDPAL last shader stage before rasterization (vertex shader if tess...
Definition: CallingConv.h:185
@ AMDGPU_HS
Used for Mesa/AMDPAL hull shaders (= tessellation control shaders).
Definition: CallingConv.h:203
@ AMDGPU_GS
Used for Mesa/AMDPAL geometry shaders.
Definition: CallingConv.h:188
@ AMDGPU_PS
Used for Mesa/AMDPAL pixel shaders.
Definition: CallingConv.h:191
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
uint64_t getPGMRSrc1(CallingConv::ID CC) const
uint32_t TrapHandlerEnable
Definition: SIProgramInfo.h:46
uint64_t getComputePGMRSrc2() const
Compute the value of the ComputePGMRsrc2 register.
uint64_t getPGMRSrc2(CallingConv::ID CC) const
uint64_t getComputePGMRSrc1() const
Compute the value of the ComputePGMRsrc1 register.